Trailing-Edge
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PDP-10 Archives
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bb-jr93d-bb
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7,6/ap015/router.c15
There are 2 other files named router.c15 in the archive. Click here to see a list.
REP 1/1 ;15C1
;TITLE ROUTER - Routing Layer Service for DECnet-36 V077
WIT
;TITLE ROUTER - Routing Layer Service for DECnet-36 V100
REP 16/2 ;15C2
XP ROUTER,077
WIT
XP ROUTER,100
REP 15/16 ;15C3
PARAMETER(^D910,,,,<%RTTM1>,<CALL [IMULI T2,TIMBAS
MOVEM T2,RTRTM1
RNMXOK ]>,<
CALL [MOVE T2,RTRTM1
IDIVI T2,TIMBAS
RNMXOK ]>,<
CALL [IMULI T2,TIMBAS
MOVEM T2,RTRTM1
RNMXOK ]>,<Maximum update interval timer>)
PARAMETER(^D912,,,,<%RTBT1>,<CALL [IMULI T2,TIMBAS
MOVEM T2,RTRBT1
RNMXOK ]>,<
CALL [MOVE T2,RTRBT1
IDIVI T2,TIMBAS
RNMXOK ]>,<
CALL [IMULI T2,TIMBAS
MOVEM T2,RTRBT1
RNMXOK ]>,<Max broadcast update int. timer>)
WIT
PARAMETER(^D910,,^D65535*TIMBAS,,<%RTTM1>,<MOVEM T2,RTRTM1>,<MOVE T2,RTRTM1>,<MOVEM T2,RTRTM1>,<Maximum update interval timer>)
PARAMETER(^D912,,^D65535*TIMBAS,,<%RTBT1>,<MOVEM T2,RTRBT1>,<MOVE T2,RTRBT1>,<MOVEM T2,RTRBT1>,<Max broadcast update int. timer>)
REP 25/17 ;15C4
PARAMETER(^D906,,<^D8191>,<1>,<%RTTM3>,<CALL [IMULI T2,TIMBAS
STOR T2,RCTM3,(RC)
RNMXOK ]>,<
CALL [LOAD T2,RCTM3,(RC)
IDIVI T2,TIMBAS
RNMXOK ]>,<
CALL [IMULI T2,TIMBAS
STOR T2,RCTM3,(RC)
RNMXOK ]>,<Hello timer>)
WIT
PARAMETER(^D906,,<^D8191*TIMBAS>,<1*TIMBAS>,<%RTTM3>,<STOR T2,RCTM3,(RC)>,<LOAD T2,RCTM3,(RC)>,<STOR T2,RCTM3,(RC)>,<Hello timer>)
REP 23/103 ;15C5
STOR T1,MBSRC,(MB) ; And save
SKIPN ENFLG ; Endnode?
IFSKP.
LOAD T1,MBDST,(MB)
CAME T1,RTRNAD ; Destined for us?
WIT
STOR T1,MBSRC,(MB) ; and save that
SKIPN ENFLG ; Endnode?
IFSKP.
LOAD T2,MBDST,(MB)
CAME T2,RTRNAD ; Destined for us?
DEL 31/103 ;15C6
LOAD T1,MBSRC,(MB) ; Get the source node's address
REP 35/103 ;15C7
;** What if we are the source?
IFSKP. ; Find our slot in vector
EXCH T1,T2
ADD T2,RTRNRV ; Offset into vector
SETONE RNCCH,(T2) ; Set the on-ethenet cache bit
WIT
IFSKP. ; Find our slot in vector
CAMLE T1,RTRMXN ; Higher than our maximum address?
RET ; Yes, drop it
EXCH T1,T2
ADD T2,RTRNRV ; Offset into vector
SETONE RNCCH,(T2) ; Set the on-ethernet cache bit
SUM 259967