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BB-F492Z-DD_1986
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10,7/703anf/s.p11
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.SBTTL S - VARIOUS SYMBOL AND MACRO DEFINITIONS 21 JUL 82
;THIS SOFTWARE IS FURNISHED UNDER A LICENSE AND MAY ONLY BE USED
; OR COPIED IN ACCORDANCE WITH THE TERMS OF SUCH LICENSE.
;
;COPYRIGHT (C) 1974,1975,1976,1977,1978,1979,1980,1981,1984 BY DIGITAL EQUIPMENT CORPORATION, MAYNARD, MASS.
VRS=024 ;FILE EDIT NUMBER
; Sept 25,1974 - DMCC/EGF/LAD/EJW/DRL/KR/DRL
.ENABL LC ; LOWER CASE IS LOWER CASE
.ENABL ABS,AMA ; ABSOLUTE PROGRAM, ABS ADDRESSES
; DGUTS NON ZERO REQUESTS THE "DON'T GIVE UP THE SHIP" FAILSOFT FEATURE
.IIF NDF DGUTS,DGUTS=0
.IF NE DGUTS
; IF WE'RE NOT TO GIVE UP THE SHIP, TURN OFF DEBUGGING TRAPS
; THEN WE'LL DIE ONLY ON HARD ERRORS.
DEBUG=0
FTASRT=0
FT.CHK=0
.ENDC
.IIF NDF FT.HLP,FT.HLP= 1 ; 1 = TYPE OUT STOPCD INFORMATION
.IIF NDF FTGLOM,FTGLOM=0 ; GET ALL WE CAN FOR BIGLST
.IIF NDF DEBUG,DEBUG=0 ; LEVEL OF DEBUG CODE INCLUDED
; 0 = NONE = KEEP AS SMALL AS POSSIBLE
; 1 = SOME - KEEP TRACKS, DIE ON SOME ERRORS
; -1 = DIE ON ALL ERRORS
.IIF NDF FT.DDT,FT.DDT=0 ; DON'T LOAD DDT BY DEFAULT
.IIF NDF FTETR,FTETR=0 ;DON'T DO EXECUTION TRACE UNLESS TOLD TO
.IIF NDF FTECHO,FTECHO=0 ;Don't do TSK device unless asked
.IIF NDF STKLEN,STKLEN= 200 ; LENGTH OF SYSTEM STACK
.IIF NDF FT.CHK,FT.CHK= 1 ; 1 EQUALS CHECK STUFF ON FLY
.IIF NDF FTASRT,FTASRT= 1 ; 1 ENABLES ASSERT MACROS
; DEFINE MODEL PDP11 WE ARE TO EXECUTE ON
; 15 FOR DC75, 40 FOR DAS85 AND DAS78
.IF NDF PDP11
.IF DF FT.D20
.IIF NE FT.D20,PDP11=34
.ENDC
.IF DF FT.D22
.IIF NE FT.D22,PDP11=04
.ENDC
.IF DF FT.200
.IIF NE FT.200,PDP11=34
.ENDC
.IF DF FT.D75
.IIF NE FT.D75,PDP11=15
.ENDC
.IIF NDF PDP11,PDP11=40
.ENDC; .IF NDF PDP11
.IIF NDF PASS,PASS=0 ; COUNT ASSEMBLER PASSES
PASS=PASS+1
.SBTTL STOPCD'S
S..AMC= 0 ; ASSERT MACRO CALL - DEFAULT CODE
S..NXM= 1 ; BUS TRAPS'S, ADDRESS ERROR'S, ETC.
S..DL10=2 ; DL10 ERRORS
S..DTE= 2 ; DTE20 ERRORS (NOTE - SAME AS DL10)
S..CNK= 3 ; CHUNKS ARE MESSED UP
S..ILS= 4 ; ILLEGAL INSTRUCTION
S..CTY= 5 ; NO CTY
S..MEM= 6 ; MEMORY ERROR (E.G. PARITY, OR CAN'T READ WRITE BITS)
S..KW11=7 ; KW11 ERROR
S..NCN=10 ; NO CONNECTION FOR RECEIVED DATA
; OR CONNECTION NUMBER USED BY SOME OTHER NODE
S..BDT=11 ; BAD DATA TYPE REQUESTED BY 10
S..CHK=12 ; CHECK 11 ERROR
S..DCP=13 ; DECNET COMPATIBLE PORT ERROR
; STOP CODE MACRO
; FIRST ARGUMENT IS CODE FOR STOP
; SECOND ARGUMENT IS SEVERITY
.MACRO STOPCD CD,TYPE
.IIF NB <CD>, S.....=S..'CD
.IIF B <CD>, S.....=0
Z=1
.IIF IDN <.'TYPE>,<.DEBUG>,Z=DEBUG
.IIF NE Z, TRAP S.....
S.....=0
.ENDM STOPCD
.SBTTL SYMBOL DEFINITIONS
;
;
;
; REGISTER DEFINITIONS
;
R0= %0
R1= %1
R2= %2
R3= %3
R4= %4
R5= %5
P= %6 ; STACK POINTER
SP= %6 ; STACK POINTER
PC= %7
PS=177776 ; PROCESSOR STATUS WORD
; 000001 ; C (CARRY)
; 000002 ; V (OVERFLOW)
; 000004 ; Z (ZERO)
; 000010 ; N (NEGATIVE)
; 000020 ; T (TRAP)
; 000340 ; PRIORITY LEVEL (0-7)
; 004000 ; REGISTER SET
; 030000 ; PREVIOUS MODE
; 140000 ; CURRENT MODE
; ; MODE: 00=KERNAL, 01=SUPERVISOR, 11=USER
SW=177570 ; ADDRESS OF SWTCHES
.SBTTL BIT DEFINES
;
B0= 1
B1= 2
B2= 4
B3= 10
B4= 20
B5= 40
B6= 100
B7= 200
B8= 400
B9= 1000
B10= 2000
B11= 4000
B12= 10000
B13= 20000
B14= 40000
B15= 100000
; OCTAL BIT NUMBERS
OB0= B0
OB1= B1
OB2= B2
OB3= B3
OB4= B4
OB5= B5
OB6= B6
OB7= B7
OB10= B8
OB11= B9
OB12= B10
OB13= B11
OB14= B12
OB15= B13
OB16= B14
OB17= B15
; DEFINE PROCESSOR LEVELS
;
BR0= 0
BR1= 1*40
BR2= 2*40
BR3= 3*40
BR4= 4*40
BR5= 5*40
BR6= 6*40
BR7= 7*40
.SBTTL VECTORS
.MACRO X TYP,VQ,LQ
.IIF NDF TYP'INT, TYP'INT= ERRINT
TYP'VEC= VQ ; VECTOR FOR TYP IS VQ
.IF B LQ
TYP'LVL= 7 ; DEFAULT LEVEL IS LEVEL 7
.IFF
TYP'LVL= LQ ; LEVEL OF TYP IS LQ
.ENDC
.ENDM X
X NXM,04 ; BUS-TIMEOUT INTERRUPT
X ILS,10 ; ILLEGAL INSTRUCTION INTERRUPT
X BPT,14 ; BPT
X IOT,20 ; IOT INSTRUCTION
X PWF,24 ; POWER FAIL INT'S
X EMT,30 ; EMT CALL'S
X TRP,34 ; TRAP INSTRUCTION
.SBTTL CR11 HARDWARE BITS
CR.LVL= 6 ; PROCESSOR LEVEL FOR CR11 INTERRUPTS
CR.VEC= 230
CR0STS= 177160 ; CR11 STATUS REGISTER
CR0DAT= CR0STS+2
CR.STS= CR0STS
CR.ERR= B15 ; ERROR
CR.DNE= B14 ; CARD DONE
CR.HCK= B13 ; HOPPER CHECK
CR.MCK= B12 ; MOTION CHECK
CR.TIM= B11 ; TIMING ERROR
CR.OLN= B10 ; BACK ONLINE AFTER BEING OFF
CR.BSY= B9 ; BUSY
CR.RDY= B8 ; NOT READY
CR.CDN= B7 ; COLUMN DONE
CR.INE= B6 ; INTERRUPT ENABLE
CR.EJT= B1 ; EJECT
CR.CFD= B0 ; CARD FEED
CR.DAT= CR0DAT ; 12 LOW ORDER BITS ARE DATA
.SBTTL CTY HARDWARE BITS
; CTY HARDWARE BITS
CTISTS= 177560
CTICHR= CTISTS+2
CTOSTS= CTICHR+2
CTOCHR= CTOSTS+2
CTIVEC= 60
CTILVL= 4 ; PRIORITY LEVEL
CI.INE= B6 ; CTY INPUT INTERUPT ENABLE
CTOVEC= CTIVEC+4
CTOLVL= 4 ; PRIORITY LEVEL
CO.INE= B6 ; CTY OUTPUT INTERRUPT ENABLE
CO..MM= B2 ; CTY OUTPUT MAINT MODE
.SBTTL DH11 HARDWARE BITS
DHBASE= 160020 ; HARDWARE ADR OF FIRST DH11
DH.LVL= 5 ; DH11 INTERRUPT LEVEL
; 1ST WORD IS SYSTEM CONTROL REGISTER
DH.RIE= B6 ; RECEIVE INTERRUPT ENABLE
DH..RI= B7 ; RECEIVE INTERRUPT
DH.CNX= B8 ; CLEAR NON EX MEM INT
DH..MM= B9 ; MAINTANCE MODE
DH.NXM= B10 ; NON EXISTENCE MEMORY
DH..MC= B11 ; MASTER CLEAR
DH.SIE= B12 ; STORAGE INTERRUPT ENABLE
DH.TIE= B13 ; TRANSMIT INTERRUPT ENABLE
DH..SI= B14 ; STORAGE INTERRUPT
DH..TI= B15 ; TRANSMIT INTERRUPT
DH.NRC=2 ; 2ND WORD IS NEXT RECEIVED CHAR REGISTER
DH.LPR=4 ; 3RD WORD IS LINE PARAMETER REGISTER
DH.CAR=6 ; 4TH WORD IS CURRENT ADDRESS REGISTER
DH.BCR=10 ; 5TH WORD IS BUFFER COUNT REGISTER
DH.BAR=12 ; 6TH WORD IS BUFFER ACTIVE REGISTER
DH.BRK=14 ; 7TH WORD IS BREAK CONTROL REGISTER
DH.SSR=16 ; 8TH WORD IS SILO STATUS REGISTER
; ON CHARS OUT OF SILO
DHROVR= B14 ; DATA OVERRUN
DHRFER= B13 ; FRAMMING ERROR
DH.VDP= B15 ; VALID DATA PRESENT
DH.DOV= B14 ; DATA OVER RUN
DH..FE= B13 ; FRAMING ERROR
DH..PE= B12 ; PARITY ERROR
; FOR LINE PARAMETERS
DH.AEE= B15 ; AUTO ECHO ENABLE
DH..HD= B14 ; HALF DUPLEX
DH..OP= B5 ; ODD PARITY
DH.PEN= B4 ; PARITY ENABLED
DH.2SB= B2 ; 2 STOP BITS
DH.CL5= 0 ; 5 BIT
DH.CL6= B0 ; 6 BIT
DH.CL7= B1 ; 7 BIT
DH.CL8= B1!B0 ; 8 BIT
.SBTTL DL10 HARDWARE BITS
;
; DL10 - UNIBUS TO DECSYSTEM-10 MEMORY BUS INTERFACE
;
.IIF NDF DL.VEC,DL.VEC= 170 ; VECTOR ADR FOR DL10
DL.LVL= 4 ; CHANNEL FIVE
DL.11I= B15 ; BIT 15 - 11 INT(INTERRUPTS IF 11-INT-ENB SET)
DL.11C= B14 ; BIT 14 - CLEAR 11 INT
DL.10I= B13 ; BIT 13 - 10 INT
DL.10C= B12 ; BIT 12 - CLEAR 10 INT
DL.NXM= B11 ; BIT 11 - NXM(INTERRUPTS IF ERR ENB SET)
DL.CNX= B10 ; BIT 10 - CLEAR NXM
DL.PAR= B9 ; BIT 09 - PAR ERR(INTERRUPTS IF ERR ENB SET)
DL.CPE= B8 ; BIT 08 - CLEAR PAR ERR
DL.WCO= B7 ; BIT 07 - WCOV(INTERRUPTS IF ERR ENB SET)
DL.CWC= B6 ; BIT 06 - CLEAR WCOV
DL.PEN= B5 ; BIT 05 - PORT ENABLE
DLPENB= DL.PEN ;
DL.B04= B4 ; BIT 04 - (GUESS !)
DL.ERE= B3 ; BIT 03 - ERR ENABLE
DL.INE= B2 ; BIT 02 - 11 INT ENB
DL.B01= B1 ; BITS 00 & 01 - PIA
DL.B00= B0 ;
.SBTTL DL11 HARDWARE BITS
DLDADR=175610 ; DL11 NUMBER ZERO DEVICE ADDRESS
DLDSIZ=10 ; LENGTH OF DEVICE ADDRESS ASSIGNMENT
; CONTROL REGISTERS
;
DLRSTS=0 ; RECEIVER STATUS AND CONTROL
; BIT ASSIGNMENTS
DL..RE=B0 ; PAPER TAPE READER ENABLE (R/W)
DL.DTR=B1 ; DATA TERMINAL READY (R/W)
DL.RTS=B2 ; REQUEST TO SEND (R/W)
DL.2XM=B3 ; SECONDARY XMIT (R/W)
DL.DIE=B5 ; DATASET INTERRUPTS ENABLE (R/W)
DL.RIE=B6 ; RECEIVER INTERRUPTS ENABLE (R/W)
DL.ROK=B7 ; RECEIVER DONE (R)
DL.2RC=B10 ; SECONDARY RECEIVE (R)
DL.RGO=B11 ; RECEIVER ACTIVE (R)
DL.CAR=B12 ; CARRIER PRESENT (R)
DL.CTS=B13 ; CLEAR TO SEND (R)
DL.RNG=B14 ; DATASET RING (R)
DL.DSC=B15 ; DATASET STATUS CHANGE (R)
DLRBUF=2 ; RECEIVED CHARACTER BUFFER
; BIT ASSIGNMENTS
DL..RC=B0!B1!B2!B3!B4!B5!B6!B7 ; THE RECEIVED CHARACTER (R)
DL..PE=B12 ; PARITY ERROR (R)
DL..FE=B13 ; FRAMING ERROR (R)
DL.OVR=B14 ; RECEIVER OVER RUN (R)
DL.ERR=B15 ; RECEIVER ERROR DETECTED (R)
DLXSTS=4 ; XMITTER STATUS AND CONTROL REGISTER
; BIT ASSIGNMENTS
DL.BRK=B0 ; SEND BREAK (W)
DL..MM=B2 ; MAINTAINANCE MODE (R/W)
DL.XIE=B6 ; XMITTER INTERRUPTS ENABLE (R/W)
DL.XOK=B7 ; XMITTER READY FOR NEXT CHARACTDER (R)
DLXBUF=6 ; XMITTER CHARACTER BUFFER
; BIT ASSSIGNMENT
DL..XC=B0!B1!B2!B3!B4!B5!B6!B7 ; CHARACTER BEING XMITTED (W)
.SBTTL DM11B HARDWARE BITS
DMBASE= 170500 ; HDW ADR OF FIRST DM11
DM.LVL= 4 ; PROCESSOR LEVEL FOR DM11BB INTERRUPTS
B.DM11= 170500 ; FIRST DM11 ADR
DM.SCN= B11 ; CLEAR SCANNER
DM.INI= B10 ; CLER MULTIPLEXER
DM..MM= B9 ; MAINTANCE MODE
DM.STP= B8 ; STEP TO NEXT LINE
DM.DNE= B7
DM.IEN= B6 ; INTERRUPT ENABLE
DM.ENB= B5 ; SCAN ENABLE
DM.BSY= B4 ; CLEAR SCAN STILL PERCOLATING
DM.ALI= B0!B1!B2!B3 ; LINE NUMBER FIELD
DM.LE= B0 ; LINE ENABLE
DM.DTR= B1 ; DATA TERMINAL READY
.IF NDF DM.RTS
DM.RTS= B2 ; REQUEST TO SEND
.ENDC
DM.ST= B3 ; SECONDARY TRANSMIT
DM.SR= B4 ; SECONDARY RECEIVE
DM.CTS= B5 ; CLEAR TO SEND
DM.CAR= B6 ; CARRIER
DM.RNG= B7 ; RING
.SBTTL DN11 HARDWARE BITS
DN.LVL= 4 ; PROCESSOR LEVEL FOR DN INTERRUPTS
DNBASE=175200
DN.PWI= B15 ; POWER INDICATE
DN.ACR= B14 ; ABANDON CALL AND RETRY
DN.DLO= B12 ; DATA LINE OCCUPIED
DN.DNE= B7 ; DONE
DN..IE= B6 ; INTERRUPT ENABLE
DN.DSS= B5 ; DATA SET STATUS
DN.PND= B4 ; PRESENT NEXT DIGIT
DN..MM= B3 ; MAINTENANCE MODE
DN..ME= B2 ; MASTER ENABLE
DN..DP= B1 ; DIGIT PRESENT
DN..CR= B0 ; CALL REQUEST
DN.DGT=B8+B9+B10+B11 ; DIGIT BITS
.SBTTL DP11 HARDWARE BITS
DP.LVL= 7 ; PROCESSOR LEVEL FOR DP11 INTERRUPTS
; A) RECEIVER STATUS REGISTER (ADR = XXXXX0)
DP..CP= B12 ; CHARACTER PARITY; 1=ODD, 0=EVEN
DP..RA= B11 ; RECEIVE ACTIVE
DP..RD= B7 ; RECEIVE DONE
DP.RIE= B6 ; RECEIVE DONE INTERRUPT ENABLE
DP..MR= B3 ; MISCELLANEOUS RECEIVE
DP..MM= B2 ; MAINTENANCE MODE
DP..HD= B1 ; HALF DUPLEX
DP..SS= B0 ; STRIP SYNC
; B) TRANSMIT AND CONTROL STATUS REG (ADR = XXXXX2)
DP..CF= B15 ; CARRIER FLAG
DP.ROF= B14 ; RECEIVE OVERRUN FLAG
DP.RNG= B13 ; RING FLAG
DP.MRY= B12 ; MODEM READY
DP.CAR= B11 ; CARRIER
DP.CTS= B10 ; CLEAR TO SEND
DP.RTS= B9 ; REQUEST TO SEND
DP..TD= B7 ; TRANSMIT DONE
DP.TIE= B6 ; TRANSMIT DONE INTERRUPT ENABLE
DP.SIE= B5 ; STATUS INTERRUPT ENABLE
DP.MIS= B4 ; MISCELLANEOUS
DP..MT= B3 ; MISCELLANEOUS TRANSMIT
DP..IS= B1 ; IDLE SYNC
DP.DTR= B0 ; TERMINAL READY
.SBTTL DQ11 HARDWARE BITS
DQ.LVL= 6 ; PROCESSOR LEVEL FOR DQ11 INTERRUPTS
; THE BASE ADR FOR THE DQ11 IS CONTAINED IN THE LINE BLOCK
; RECEIVE STATUS ( ADR =XXXXX0 )
DQ.RGO= B0 ; RECEIVE GO
DQ.SSY= B1 ; STRIP SYNC
DQ.SEC= B2 ; 0= PRIMARY,1=SECONDARY
DQ.HD= B3 ; HALF DUPLEX(= MASK INPUT WHEN XMT ACTIVE)
DQ.CIE= B4 ; CHAR INTERRUPT ENABLE
DQ.RIE= B5 ; RECEIVE DONE INTERRUPT ENABLE
DQ.RDS= B6 ; RECEIVE DONE (SECONDARY) FLAG
DQ.RDP= B7 ; RECEIVE DONE (PRIMARY) FLAG
DQ.CHR= 7400 ; CHAR DETECTED
DQ.ETB= B8 ; CHAR WAS AN ETB
DQ.ETX= B9 ; CHAR WAS AN ETX
DQ.ENQ= B10 ; CHAR WAS AN ENQ
DQ.SYN= B11 ; SPECIAL CHAR WAS A SYNC
DQ.RAC= B12 ; RECEIVE ACTIVE
; 060000 ; USER OPTION
DQ.VCH= B15 ; VCHAR FLAG
DQ.RKL= DQ.RAC!DQ.VCH!DQ.RGO!DQ.CIE ; BITS TO STOP RECEIVER
;
; TRANSMIT STATUS ( ADR = XXXXX2 )
DQ.XGO= B0 ; TRANSMIT GO
; B1 ; IDLE MODE
DQ.SEC= B2 ; 0= PRIMARY ACTIVE,1=SECONDARY ACTIVE
DQ.EIE= B3 ; ERR INTERRUPT ENABLE
DQ.DIE= B4 ; DATA SET INTERRUPT ENABLE
DQ.XIE= B5 ; TRANSMIT DONE INTERRUPT ENABLE
DQ.XDS= B6 ; TRANSMIT DONE(SECONDARY)
DQ.XDP= B7 ; TRANSMIT DONE(PRIMARY)
DQ.RTS= B8 ; REQUEST TO SEND
DQ.DTR= B9 ; DATA TERMINAL READY
DQ.DSR= B10 ; DATA SET READY
DQ.RNG= B11 ; RING
DQ.CAR= B12 ; CARRIER
DQ.CTS= B13 ; CLEAR TO SEND
; B14 ; USER OPTION
DQ.DSF= B15 ; DATA SET FLAG
; MORE DQ11 BITS
; REG/ERR REGISTER ( ADR =XXXXX4 )
DQ.XCL= B0 ; TRANSMIT CLOCK LOSS
DQ.RCL= B1 ; RECEIVE CLOCK LOSS
DQ.XLE= B2 ; TRANSMIT LATENCY ERROR
DQ.RLE= B3 ; RECEIVE LATENCY ERROR
DQ.XNX= B4 ; TRANSMIT NONEX MEM
DQ.RNX= B5 ; RECEIVE NONEX MEM
DQ.BCC= B6 ; RECEIVE BCC ERROR
DQ.VRC= B7 ; RECEIVE VRC ERROR
; 007400 ; REG SELECT FOR REFERENCE TO XXXXX6
DQ.MEM= B12 ; WRENABLE 060000
DQ.MBM= 020 ; BYTE EQUIVALENT OF ABOVE
; 060000 ; MEM EXT OR ENTER T/EXIT T
; B15 ; ERROR INTERRUPT
; SECONDARY REGISTERS ( ADR = XXXXX6 )
RG.PRA= 0 ; PRIMARY RECEIVE BA
RG.PRC= 1 ; PRIMARY RECEIVE CC
RG.PTA= 2 ; PRIMARY TRANSMIT BA
RG.PTC= 3 ; PRIMARY TRANSMIT CC
RG.SRA= 4 ; SECONDARY RECEIVE BA
RG.SRC= 5 ; SECONDARY RECEIVE CC
RG.STA= 6 ; SECONDARY TRANSMIT BA
RG.STC= 7 ; SECONDARY TRANSMIT CC
; 10 ; CHAR DET REG
RG.SYN= 11 ; SYNC REG
RG.MSC= 12 ; MISC REG
DQ.MC= B5 ; MASTER CLEAR (SORT OF)
; 13 ; TRANSMIT BUF
; 14 ; SEQUENCE REGISTER
; 15 ; RECEIVE BCC
; 16 ; TRANSMIT BCC
; 17 ; RECEIVE/TRANSMIT POLYNOMIAL
.MACRO DQREGS REG,QQ
Z= RG.'REG
.IIF EQ <Z&10>,Z= Z+DQ.MBM
.IF B,QQ
MOVB #Z,5(DQ) ; SET TO ADDRESS SECONDARY REGISTER RG.'REG
.IFF
MOVB #Z,5QQ ; SET TO ADDRESS SECONDARY REGISTER RG.'REG
.ENDC
.ENDM DQREGS
; THE SEVEN SWITCHES (PACKAGES) WILL BE LOCATED
; ON BOARD #M7818 WITHIN THE DQ11 LOGIC BLOCK
;
;
; PACKAGE # SWITCH #'S SWITCH SETTINGS ON RESPECTIVE PACKAGES
;
; 1 8 - 1 ALL OFF
;
; 2 16 - 9 ALL OFF
;
; 3 24 - 17 ALL OFF
;
; 4 32 - 25 DAS78 ON, ON,OFF, ON,OFF,OFF, ON,OFF
; CHARACTER = 055 (ENQ)
; 4 32 - 25 DAS85 ON, ON, ON, ON, ON,OFF, ON,OFF
; CHARACTER = 005 (ENQ)
;
; 5 40 - 33 DAS78 ON, ON,OFF,OFF,OFF, ON, ON, ON
; DAS85 ON,OFF,OFF,OFF,OFF, ON, ON, ON
;
; 6 48 - 41 DAS78 ON, ON, ON, ON, ON, ON,OFF,OFF
; CHARACTER = 03 (ETX)
; DAS85 OFF, ON, ON,OFF, ON, ON,ON, ON
; CHARACTER = 220 (DLE)
;
; 7 56 - 49 DAS78 ON, ON, OFF, ON, ON,OFF,OFF, ON
; CHARACTER = 46 (ETB)
; DAS85 OFF, ON, ON, ON, ON, ON, ON,OFF
; CHARACTER = 201 (SOH)
.SBTTL DS11 HARDWARE BITS
; HARDWARE ADDRESSES
DS.AUX= 175600 ; AUXILLARY REGISTER
DS.DVA= 175400 ; BEGINNING OF LINE DEVICE REGISTERS
DS.VEC= 400 ; FIRST DS11 VECTOR
DS.LVL= 7 ; PROCESSOR LEVEL OR DS11 INTERRUPTS
; BITS IN AUXILLARY REGISTER
DS.AD3=B15 ; ADAPTER 3 IS PRRSENT IF SET
DS.AD2=B14 ; ADAPTER 2 IS PRESENT IF SET
DS.AD1=B13 ; ADAPTER 1 IS PRESENT IF SET
; B12 ; NOT USED
; B11 ; NOT USED
; B10 ; NOT USED
; B9 ; PROGRAM VECTOR 9
DS.IVA=B8 ; PROGRAM VECTOR 8 - INTERRUPTS START AT 400
; B7 ; DIAG MODE
; B6 ; PROGRAM CLOCK ALLOW
; B5 ; NOT USED
; B4 ; DIAG BIT CNTR CLEAR
; B3 ; DIAG BIT COUNTER 4
; B2 ; DIAG BIT COUNTER 3
; B1 ; DIAG BIT COUNTER 2
; B0 ; DIAG BIT COUNTER 1
; OFFSETS OF REGISTERS FROM LINE BASE ADDRESS
DS.XDR=6 ; TRANSMIT DATA REGISTER
DS.XST=4 ; TRANSMIT STATUS REGISTER
DS.RDR=2 ; RECEIVE DATA REGISTER
DS.RST=0 ; RECEIVE STATUS REGISTER
; PRIORITY INTERRUPT LEVELS
I.DSRD=7 ; RECEIVE DATA INTERRUPT
I.DSRS=6 ; RECEIVE STATUS INTERRUPT
I.DSXD=7 ; A TRANSMIT DATA INTERRUPT
I.DSXS=6 ; A TRANSMIT STATUS INTERRUPT
; BITS IN XMIT STATUS REGISTER & RECEIVE REG.
DS.DTR=000440 ; BOTH XMT & RCV REG.
DS.ZAP=170000 ; CLEAR ALL OVERRUN FLAGS
DS.XGO=DS.DTR+<<I.DSXD/2>*4>+1 ; REQUEST TO SEND
DS.RGO=B11!B10!DS.DTR!<<I.DSRD/2>*4>+1 ; RECEIVE
; BITS IN TRANSMIT STATUS REGISTER
;
; B15 ; NOT USED
; B14 ; XMIT BIT OVERRUN
; B13 ; XMIT CHAR OVERRUN
; B12 ; CLEAR TO SEND FLAG
; B11 ; NOT USED
; B10 ; NOT USED
; B9 ; CLEAR TO SEND
; B8 ; DATA TERM READY
; B7 ; XMIT CHAR DONE
; B6 ; DATA SET READY
; B5 ; CODE SIZE 2
; B4 ; CODE SIZE 1
; B3 ; PRIORITY REQUEST 2
; B2 ; PRIORITY REQUEST 1
; B1 ; IDLE
; B0 ; REQUEST TO SEND
; BITS IN RECEIVE STATUS REGISTER
;
; B15 ; RING FLAG
; B14 ; REC BIT OVERRUN
; B13 ; REC CHAR OVERRUN
; B12 ; LINE SIGNAL FLAG
; B11 ; SYN STATE 2
; B10 ; SYN STATE 1
; B9 ; LINE SIGNAL
; B8 ; DATA TERMINAL READY
; B7 ; REC CHAR DONE
; B6 ; DATA SET READY
; B5 ; CODE SIZE 2
; B4 ; CODE SIZE 1
; B3 ; PRIORITY REQUEST 2
; B2 ; PRIORITY REQUEST 1
; B1 ; RING ALLOW
; B0 ; RECEIVE
.SBTTL EIA PIN DEFINITIONS
; 1 PROTECTIVE GROUND
; 2 TRANSMITTED DATA
; 3 RECEIVED DATA
; 4 REQUEST TO SEND
; 5 CLEAR TO SEND
; 6 DATA SET READY
; 7 SIGNAL GROUND
; 8 RECEIVED LINE SIGNAL DECTECTOR
; 17 RECEIVED SIGNAL ELEMENT TIMING
; 20 DATA TERMINAL READY
; 21 SIGNAL QUALITY DETECTOR
; 22 RING INDICATOR
; 24 TRANSMIT SIGNAL ELEMENT TIMING
.SBTTL KG11 HARDWARE BITS
KG.STS= 170700
KG.DNE=200 ; CALCULATION DONE
KG.SEN=100 ; NOT SINGLE CYCLE
KG.STP=040 ; STEP
KG.CLR=020 ; CLEAR
KG.DDB=010 ; WORD MODE
; 007 ; TYPE OF CALCULATION
KG.CRC=001 ; 1 = CRC-16
KG.LRC=003 ; 3 = LRC-16
KG.CCI=005 ; 5 = CRC-CCITT
KG.INI= KG.SEN!KG.CLR!KG.CRC
KGBCC= KG.STS+2
KGDATA= KGBCC+2
KG.BCC=KGBCC
KG.DTA=KGDATA
.MACRO KGLOAD X,MODE
Z=101
.IF NB MODE
.IIF IDN <MODE>,<WORD>,Z=Z!KG.DDB ; SET WORD MODE
.IIF IDN <MODE>,<BYTE>,Z=Z&<^CKG.DDB>
.ENDC; .IF NB MODE
.IF IDN <#0>,<X>
Z=Z!KG.CLR
.IFF
MOV #133,KG.STS ; CLEAN OUT KG11
MOV X,KGDATA ; LOAD WITH DATA ( X )
.ENDC; .IF IDN <#0>,<X>
MOV #Z,KG.STS ; AND SET CRC MODE
.ENDM KGLOAD
.SBTTL KW11 HARDWARE BITS
; KW11 LINE FREQUENCY CLOCK DEFINITIONS
.IIF NDF FT.D75,FT.D75=0
.IF EQ FT.D75
CLKLVL= 6 ; DN87 USES STANDARD PRIORITY LEVEL
.IFF
CLKLVL= 4 ; CLOCK INTERRUPT PRIORITY LEVEL
.ENDC
CLKVEC= 100 ; CLOCK VECTOR
CLKWRD= 177546
KW.INE=B6 ; ENABLE INTERRUPTS
CLKENB=B6 ; ENABLE INTERRUPTS
KW.TIC=B7 ; CLOCK MONITOR TOGGLE (CLEARED BY PROGRAM)
.SBTTL LP11 HARDWARE BITS
LP.LVL= 4 ; PROCESSOR LEVEL FOR LP11 INTERRUPTS
LP.VEC= 200 ; VECTOR LOCATION
LP0STS= 177514 ; STATUS FOR FIRST LP11
LP.STS=LP0STS
LP.ERR= B15 ; ERROR BIT(POWER OFF, NO PAPER, GATE, TEMP, OFFLINE)
LP.DNE= B7 ; READY FOR NEXT CHARACTER
LP.INE= B6 ; INTERRUPT ENABLE
LP0DAT= LP0STS+2 ; DATA REGISTER FOR FIRST LP11
LP.DAT=LP0DAT
; FOR THE SECOND LP11
LP1STS= LP0STS+10
LP1DAT= LP1STS+2
.SBTTL LP20 HARDWARE BITS
; NOTATION:
; (R) ==> READ
; (W) ==> WRITE
; (RW) ==> READ/WRITE
L2.LVL= 4 ; INTERUPT AT LEVEL 4 (DEFAULT)
L2.VEC= 754 ; VECTOR FOR LP20
L20STS= 175400 ; ADDRESS OF FIRST LP20
L21STS= 175420 ; ADDRESS OF SECOND LP20
L20CRA= 0 ; CONTROL REGISTER A FOR LP20
L2.ERR= 100000 ; (R) ERROR
L2.PZE= 40000 ; (R) PAGE COUNT WENT ZERO
L2.UCD= 20000 ; (R) UNDEFINED CHAR DETECTED
L2.DR= 10000 ; (R) DAVFU READY
L2.ONL= 4000 ; (R) ON LINE
L2.DH= 2000 ; (RW)DELIMIT HOLD
L2.ERE= 1000 ; (W) ERROR RESET
L2.INI= 400 ; (W) LOCAL INIT
L2.DON= 200 ; (R) DONE
L2.ENB= 100 ; (RW)INTERUPT ENABLE
L2.A17= 40 ; (RW)BAU ADDR BIT 17
L2.A16= 20 ; (RW)BUS ADDR BIT 16
L2.DL= 10 ; (RW)DAVFU LOAD
L2.TM= 4 ; (RW)TEST MODE
L2.PEN= 2 ; (RW)PARITY ENABLE
L2.GO= 1 ; (RW)THE GO BIT
L20CRB= L20CRA+2
L2.VD= 100000 ; (R) VALID DATA
L2.SPR= 40000 ; (R) SPARE
L2.PNR= 20000 ; (R) PRINTER NOT READY
L2.LDP= 10000 ; (R) LPT DATA PARITY
L2.OVF= 4000 ; (R) OPTICAL VFU ON LPT
L2.TB2= 2000 ; (RW)TEST BIT 2
L2.TB1= 1000 ; (RW)TEST BIT 1
L2.TB0= 400 ; (RW)TEST BIT 0
L2.POL= 200 ; (R) PRINTER OFF LINE
L2.DNR= 100 ; (R) DAVFU NOT READY
L2.LPE= 40 ; (R) LPT DATA PARITY ERROR
L2.MPE= 20 ; (R) MEMORY PARITY ERROR
L2.RPE= 10 ; (R) RAM PARITY ERROR
L2.MST= 4 ; (R) MASTER SYNC TIMEOUT
L2.DTE= 2 ; (R) DEMAND TIMEOUT ERROR
L2.GER= 1 ; (RW)GO ERROR
; NON STATUS BIT LOCATIONS
L20ADR= L20CRB+2 ; BUS ADDRESS REGISTER
L20BCT= L20ADR+2 ; BYTE COUNT REGISTER
L2.BCM= 7777 ; BYTE COUNT MASK
L20PCT= L20BCT+2 ; PAGE COUNT REGISTER
L2.PCM= 7777 ; PAGE COUNT MASK
L20RAM= L20PCT+2 ; RAM DATA REGISTER
L2.RPB= 10000 ; (R) RAM PARITY BIT
L2.RDB= 7777 ; (RW)RAM DATA BYTE
L2.INT=4000 ; (RW)INTERUPT BIT
L2.DEL=2000 ; (RW)DELIMIT BIT
L2.TRN=1000 ; (RW)TRANSLATE BIT
L2.PI=400 ; (RW)PAPER INSTRUCTION
L2.DB=377 ; (RW)DATA BITS
L20BUF= L20RAM+2 ; CHARACTER BUFFER (1 BYTE)
L20COL= L20BUF+1 ; COLUMN COUNTER (1 BYTE)
L20PDA= L20COL+1 ; PRINTER DATA (1 BYTE, READ ONLY)
L20CHK= L20PDA+1 ; CHECKSUM (1 BYTE, READ ONLY)
.SBTTL MM11-LP PARITY MEMORY
MP.VEC=114
MP.LVL=7
MP.REG=172100 ; ADR OF PARITY REGISTER
MP.ERR=100000 ; ERROR BIT
; BITS 11-5 ERROR ADDRESS
MP.WWP=000004 ; WRITE WRONG PARITY
MP.ENB=000001 ; ENABLE
.SBTTL KT11-D Memory Management Option
MM.SR0=177572 ; Memory management Status Register
KPAR0=172340
KPAR1=172342
KPAR2=172344
KPAR3=172346
KPAR4=172350
KPAR5=172352
KPAR6=172354
KPAR7=172356
MM.PDR=-40 ; difference to get PDR from PAR
.SBTTL PA611 HARDWARE BITS
P6.LVL= 7 ; PROCESSOR LEVEL FOR PA611P INTERRUPTS
R6.LVL= 7 ; PROCESSOR LEVEL FOR PA611R INTERRUPTS
.SBTTL PC11 HARDWARE BITS
PR.LVL= 4 ; PROCESSOR LEVEL FOR PC11 READER INTERRUPTS
PR.VEC= 70 ; VECTOR FOR PC11 READER
PP.LVL= 4 ; PROCESSOR LEVEL FOR PC11 PUNCH INTERRUPTS
PP.VEC= 74 ; VECTOR FOR PC11 PUNCH
PP.STS= 177554 ; PUNCH STATUS REGISTER
PP0STS= PP.STS
PP.ERR= B15 ; ERROR BIT (NO TAPE OR NO POWER)
PP.RDY= B7 ; SET WHEN RREADY TO PUNCH A CHARACTER
PP.INE= B6 ; INTERRUPT ENABLE
PP.DAT= PP.STS+2 ; PUNCH BUFFER REGISTER
PR.STS= 177550 ; READER STATUS REGISTER
PR0STS= PR.STS
PR.ERR= B15 ; ERROR BIT (NO TAPE, NO POWER, OR OFF-LINE)
PR.BSY= B11 ; SET WHEN A CHARACTER IS BEING READ
PR.DNE= B7 ; CHARACTER IS AVAILABLE IN THE READER BUFFER
PR.INE= B6 ; INTERRUPT ENABLE
PR..RE= B0 ; READER ENABLE
PR.DAT= PR.STS+2 ; READER BUFFER REGISTER
.SBTTL XY11 HARDWARE BITS
; THE DEFAULT INTERFACE FOR THE PLOTTER IS THE XY11 INTERFACE
; BY ADDING THE PARAMETER ADL11=1 A DL11 INTERFACE CAN BE USED TO DRIVE THE PLOTTER
.IIF DF ADL11 XY.LVL= 4 ; PROCESSOR LEVEL FOR DL11 PLOTTER INTERRUPTS
.IIF NDF ADL11 XY.LVL= 5 ; PROCESSOR LEVEL FOR XY11 PLOTTER INTERRUPTS
.IIF NDF,ADL11,XY.VEC= 120 ; VECTOR FOR XY11 PLOTTER
.IIF DF,ADL11,XY.VEC= 124 ; VECTOR FOR DL11 PLOTTER
.IF NDF,ADL11
Z=172554
.ENDC; NDF ADL11
.IF DF ADL11
Z=176554
.ENDC; DF ADL11
XY0STS= Z ; STATUS FOR XY11 PLOTTER
XY.STS=XY0STS
XY.RDY= B7 ; PLOTTER READY TO ACCEPT COMMAND
XY.INE= B6 ; INTERRUPT ENABLE
XY.DAT=XY.STS+2 ; DATA REGISTER FOR XY11 PLOTTER
.SBTTL TC11 HARDWARE BITS
TC.VEC= 214 ; TC11 INTERRUPT VECTOR ADDRESS
TC.LVL= 6 ; TC11 PRIORITY LEVEL
TC.STS= 177340 ; TC11 CONTROL AND STATUS REGISTER
TC..EZ= B15 ; END ZONE
TC.PAR= B14 ; PARITY ERROR
TC.MTE= B13 ; MARK TRACK ERROR
TC.ILO= B12 ; ILLEGAL OPERATION
TC..SE= B11 ; SELECTION ERROR
TC..BM= B10 ; BLOCK MISSED
TC..DM= B9 ; DATA MISSED
TC.NXM= B8 ; NON-EX MEM
TC.UPS= B7 ; TAPE IS UP TO SPEED
TC.CLK= B6 ; USED TO SIMULATE TIMING TRACK
TC.MMT= B5 ; MAINT MARK TRACK
TC.DT0= B4 ; DATA TRACK 0
TC.DT1= B3 ; DATA TRACK 1
TC.DT2= B2 ; DATA TRACK 2
TC.D17= B1 ; EXTENDED DATA 17
TC.D16= B0 ; EXTENDED DATA 16
TC.CMD= 177342 ; TC11 COMMAND REGISTER
TC.ERR= B15 ; ERROR
TC..MM= B13 ; MAINT MODE
TC..DI= B12 ; DELAY INHIBIT
TC.REV= B11 ; SET = REVERSE MOTION; CLEAR = FORWARD MOTION
TC.US0= 0 ; SELECT UNIT 0
TC.US1= B8 ; SELECT UNIT 1
TC.US2= B9 ; SELECT UNIT 2
TC.US3= B9!B8 ; SELECT UNIT 3
TC.US4= B10 ; SELECT UNIT 4
TC.US5= B10!B8 ; SELECT UNIT 5
TC.US6= B10!B9 ; SELECT UNIT 6
TC.US7= B10!B9!B8 ; SELECT UNIT 7
TC.RDY= B7 ; READY
TC.INE= B6 ; INTERRUPT ENABLE
TC.A17= B5 ; EXTENDED MEM BIT BA17
TC.A16= B4 ; EXTENDED MEM BIT BA16
TC.SAT= 0 ; STOP ALL TAPE MOTION
TC.RMT= B1 ; FINDS MARK TRACK CODE
TC..RD= B2 ; READ
TC.RDA= B2!B1 ; READ ALL
TC.SST= B3 ; STOP ALL TAPE MOTION IN SELECTED TRANSPORT ONLY
TC.WTM= B3!B1 ; WRITE TIMING AND MARK TRACK
TC..WR= B3!B2 ; WRITE
TC.WRA= B3!B2!B1 ; WRITE ALL
TC.WCR= 177344 ; TC11 WORD COUNT REGISTER
TC.BAR= 177346 ; TC11 BUS ADDRESS REGISTER
TC.DAT= 177350 ; TC11 DATA REGISTER
.SBTTL TM11 HARDWARE BITS
TM.VEC= 224 ; TM11 VECTOR ADDRESS
TM.LVL= 5 ; TM11 PRIORITY LEVEL
TM.STS= 172520 ; STATUS REGISTER
TM..IC= B15 ; ILLEGAL COMMAND
TM.EOF= B14 ; END OF FILE
TM.CRE= B13 ; CYCLICAL REDUNDANCY
TM.PAE= B12 ; PARITY ERROR
TM.BGL= B11 ; BUS GRANT LATE
TM.EOT= B10 ; END OF TAPE
TM.RLE= B9 ; RECORD LENGTH ERROR
TM.BTE= B8 ; BAD TAPE ERROR
TM.NXM= B7 ; NON-EXISTENT MEMORY
TM.SLR= B6 ; SELECT REMOTE
TM.BOT= B5 ; BEGINNING OF TAPE
TM.7CH= B4 ; SEVEN CHANNEL
TM.TSD= B3 ; TAPE SETTLE DOWN
TM.WRL= B2 ; WRITE LOCK
TM.RWS= B1 ; REWIND STATUS
TM.TUR= B0 ; TAPE UNIT READY
TM.MTC= 172522 ; COMMAND REGISTER
TM.ERR= B15 ; ERROR
TM.D72= 0 ; 200 BPI 7 CHANNEL
TM.D75= B13 ; 556 BPI 7 CHANNEL
TM.D78= B14 ; 800 PBI 7 CHANNEL
TM.D98= B14!B13 ; 800 BPI 9 CHANNEL
TM..PC= B12 ; POWER CLEAR
TM..LP= B11 ; LATERAL PARITY
TM..US= B10!B9!B8 ; UNIT SELECT FIELD
TM.US0= 0 ; SELECT UNIT 0
TM.US1= B8 ; SELECT UNIT 1
TM.US2= B9 ; SELECT UNIT 2
TM.US3= B8!B9 ; SELECT UNIT 3
TM.US4= B10 ; SELECT UNIT 4
TM.US5= B10!B8 ; SELECT UNIT 5
TM.US6= B10!B9 ; SELECT UNIT 6
TM.US7= B10!B9!B8 ; SELECT UNIT 7
TM.CUR= B7 ; CU READY
TM.INE= B6 ; INTERRUPT ENABLE
TM.A17= B5 ; EXTENDED MEM BIT BA17
TM.A16= B4 ; EXTENDED MEM BIT BA16
TM.OFL= 0 ; OFF-LINE
TM..RD= B1 ; READ
TM..WR= B2 ; WRITE
TM.WEF= B1!B2 ; WRITE EOF
TM..SF= B3 ; SPACE FORWARD
TM..SR= B3!B1 ; SPACE REVERSE
TM.WEG= B3!B2 ; WRITE WITH EXTENDED GAP
TM.REW= B3!B2!B1 ; REWIND
TM..GO= B0 ; GO
; NON CONTROL/STATUS WORDS FOR TM11
TM.BCR= 172524 ; BYTE COUNT REGISTER
TM.BAR= 172526 ; BYTE ADDRESS REGISTER
TM.DAT= 172530 ; DATA BUFFER
TM.RDL= 172532 ; TU 10 READ LINES
.SBTTL DUP11 HARDWARE BITS
UP.LVL=6 ; DUP11 INTERRUPT LEVEL
DY.LVL= UP.LVL ; DUPINTERUPT LEVEL FOR CHK11
UP.RSR=0 ; RECEIVER STATUS REGISTER
UP.DCB=B0 ; DATA SET CHANGE B
UP.DTR=B1 ; DATA TERMINAL READY
UP.RTS=B2 ; REQUEST TO SEND
UP.STD=B3 ; SECONDARY TRANSMIT DATA
UP.REN=B4 ; RECEIVER ENABLE
UP.DIE=B5 ; DATASET INTERRUPT ENABLE
UP.RIE=B6 ; RECEIVER INTERRUPT ENABLE
UP.RDN=B7 ; RECEIVER DONE
UP.SSY=B8 ; STRIP SYNC
UP.DSR=B9 ; DATA SET READY
UP.SRD=B10 ; SECONDARY RECEIVED DATA
UP.RAT=B11 ; RECEIVE ACTIVE
UP.CAR=B12 ; CARRIER
UP.CTS=B13 ; CLEAR TO SEND
UP.RNG=B14 ; RING
UP.DCA=B15 ; DATA SET CHANGE A
UP.RBF=2 ; RECEIVER DATA BUFFER
; B0-B7 ; CHARACTER RECEIVED
UP.RSM=B8 ; RECEIVE START OF MESSAGE
UP.REM=B9 ; RECEIVE END OF MESSAGE
UP.RAB=B10 ; RECEIVE ABORT
UP.RCR=B12 ; CRC
UP.OVR=B14 ; OVERRUN
UP.ERR=B15 ; SUMMARY ERROR
UP.PAR=2 ; PARAMETER STATUS REGISTER
; B0-B7 ; SYNC CHARACTER
UP.CCI=B9 ; CRC INHIBIT
UP.SMS=B12 ; SECONDARY MODE SELECT
UP.DMD=B15 ; DEC (I.E., BYTE) MODE
UP.XSR=4 ; TRANSMITTER STATUS REGISTER
UP.HDX=B3 ; HALF DUPLEX
UP.SND=B4 ; SEND
UP.XIE=B6 ; TRANSMITTER INTERRUPT ENABLE
UP.XDN=B7 ; TRANSMITTER DONE
UP.INI=B8 ; INITIALIZE (DEVICE RESET)
UP.XAT=B9 ; TRANSMITTER ACTIVE
UP.XDL=B15 ; TRANSMITTER DATA LATE
UP.XBF=6 ; TRANSMITTER DATA BUFFER
; B0-B7 ; CHARACTER TO TRANSMIT
UP.XSM=B8 ; TRANSMIT START OF MESSAGE
UP.XEM=B9 ; TRANSMIT END OF MESSAGE
UP.XAB=B10 ; TRANSMIT ABORT
.SBTTL DMC11 Hardware Bits
MC.LVL=5 ; hardware level for DMC11 interrupts
MC.CSI=0 ; Input (i.e. to DMC11) control register
MC.TPI=B0+B1 ; Type of input transaction
; 00=BA/CC In; 01=Cntrl In; 11=Base In
MC.BCI=0
MC.CTI=1
MC.BSI=3
MC.IOI=B2 ; 1=Input, 0=Output Buffer
MC.RQI=B5 ; Request Input transaction
MC.IEI=B6 ; Input transaction interrupt enable
MC.RDI=B7 ; Input transaction ready
;Maintenance Bits
MC.SMP=B8 ;Step microprocessor
MC.RMI=B9 ;ROM in
MC.RMO=B10 ;ROM out
MC.MCL=B14 ; Master Clear
MC.RUN=B15 ; Run
MC.CSO=2 ; Output (i.e. from DMC11) control register
MC.TPO=B0+B1 ; type of output transaction
; 00=BA/CC Out; 01=Cntrl Out
MC.BCO=0
MC.CTO=1
MC.IOO=B2 ; 1=Input, 2=Output
MC.IEO=B6 ; Out transaction interrupt enable
MC.RDO=B7 ; Ready Out
MC.DT0=4 ; first data word
; For BA/CC I, BA/CC O, CNTL I, CNTL O and Base I formats
MC.BA=B0 ; 16 bit bus address
MC.DT2=6 ; second data word
; For BA/CC I, BA/CC O, BASE I, CNTL I and CNTL O formats
MC.HBA=B15 ; the two high order bits of bus address
; For BA/CC I and BA/CC O formats
MC.CC=B0 ; 14-bit positive character count
; For BASE I format
MC.RES=B14 ; resume bit: 0=clear base table, 1=use old base table
; For CNTL I format
MC.SCA=B0 ; 8-bit secondary address
MC.MAI=B8 ; maintenance bit: 1=go into maintenance mode
MC.HD=B10 ; 1=go into DDCMP half-duplex mode
MC.SEC=B11 ; 1=become a secondary station
; For CNTL O format
MC.DCK=B0 ; data check
MC.TMO=B1 ; time out
MC.OVR=B2 ; overrun
MC.RMA=B3 ; received maintenance message
MC.LOS=B4 ; lost data
MC.DSC=B6 ; disconnect
MC.RST=B7 ; received start mesage
MC.NXM=B8 ; non-existent memory
MC.ERR=B9 ; processor error
.SBTTL DZ11 Hardware Bits
DZ.LVL=5 ; DZ11 interrupt level
DZ.CSR=0 ; 1st word is control and status register
DZ.MAI=B3 ; maintenance mode bit
DZ.CLR=B4 ; clears silo, all UARTs and CSR
DZ.MSE=B5 ; master scan enable
DZ.RIE=B6 ; receive interrupt enable
DZ..RI=B7 ; receive done (RO)
; causes interrupt if DZ.RIE=1 and
; DZ.SAE=0
DZ.TLN=B8!B9!b10 ; transmit line number (RO) when DZ..TI=1
DZ.SAE=B12 ; Silo alarm enable; if 1 prevents
; DZ..RI from interrupting and if
; DZ.RIE=1, allows DZ..SA to interrupt
DZ..SA=B13 ; Silo alarm (RO), set to 1 after 16 chars enter silo
DZ.TIE=B14 ; transmit interrupt enable
DZ..TI=B15 ; transmit ready (RO)
DZ.RBF=2 ; Receive buffer register (RO)
DZ.RCH=B0!B1!B2!B3!B4!B5!B6!B7 ; received character
DZ.RLN=B8!B9!B10 ; received line number
DZ..PE=B12 ; parity error
DZ..FE=B13 ; framing error
DZ.DOV=B14 ; overrun
DZ.VDP=B15 ; valid data
DZ.LPR=2 ; Line parameter register (WO)
DZ.PLN=B0!B1!B2 ; line number for parameter loading
DZ.CL5=0 ; 5 bit characters
DZ.CL6=B3 ; 6 bit characters
DZ.CL7=B4 ; 7 bit characters
DZ.CL8=B3!B4 ; 8 bit characters
DZ.2SB=B5 ; send 2 stop bits (or 1.5 for 5 bit chars)
DZ.PEN=B6 ; parity enabled on transmit and receive
DZ..OP=B7 ; 1=odd parity, 0=even parity
DZ.SPD=B8!B9!B10!B11 ; code for transmit and receive speed
; 0=50; 1=75; 2=110; 3=134.5; 4=150; 5=300; 6=600; 7=1200
; 10=1800; 11=2000; 12=2400; 13=3600; 14=4800; 15=7200; 16=9600
; 17=unused
DZ.RON=B12 ; receiver on (setting to 1 turns on receiver clock)
DZ.TCR=4 ; transmit control register
; bits 0-7 are transmit enables for lines 0-7
; bits 8-15 are DTR for lines 0-7
DZ.MSR=6 ; modem status register (RO)
; bits 0-7 are ring indicators for lines 0-7
; bits 8-15 are carrier indicators for lines 0-7
DZ.TDR=6 ; transmit data register (WO)
DZ.TCH=B0!B1!B2!B3!B4!B5!B6!B7 ; character to be transmitted
; bits 8-15 are transmit break bits for lines 0-7
.SBTTL KMC11 HARDWARE BITS
;
MD.LVL=5 ; PROCESSOR LEVEL FOR KMC11 INTERRUPTS
DX.LVL= MD.LVL ; INTERUPT LEVEL FOR DNLBLK
;
; BIT ASSIGNMENTS FOR THE KMC11 MAINTENENCE REGISTER - BSEL 1
;
MD.RUN=B15 ; RUN THE MICROPROCESSOR
MD.CLR=B14 ; CLEAR THE KMC11
MD.CWR=B13 ; CRAM WRITE
MD.SLU=B12 ; STEP LINE UNIT
MD.LLU=B11 ; LOOP LINE UNIT
MD.RMO=B10 ; ROM OUTPUT
MD.RMI=B9 ; ROM INPUT
MD.SMP=B8 ; STEP MICROPROCESSOR
;
.SBTTL DTE20 HARDWARE BITS
;
TE.LVL=6 ; PROCESSOR LEVEL FOR DTE20 INTERRUPTS
TE.VEC=774 ; VECTOR FOR DTE20 INTERRUPTS
TE.NNN=4 ; NUMBER OF DTE'S MAXIMUM
TE.BAS=174400 ; BASE OF FIRST DTE HARDWARE REGISTERS
TE.BNX=40 ; OFFSET TO NEXT DTE HARDWARE REGISTERS
TE.DYC=0 ; DELAY COUNTER
TE.XW3=2 ; DEPOSIT OR EXAMINE WORD 3
TE.XW2=4 ; DEPOSIT OR EXAMINE WORD 2
TE.XW1=6 ; DEPOSIT OR EXAMINE WORD 1
TE.XA1=10 ; TEN ADDRESS WORD 1
;
TS.DEP=B12 ; DEPOSIT
TS.POF=B11 ; EXAMINE/DEPOSIT PROTECT OFF
TS.PEX=B15 ; PHYSICAL EXAMINE
;
TE.XA2=12 ; TEN ADDRESS WORD 2
TE.XBC=14 ; TO-10 BYTE COUNT (?)
TE.EBC=16 ; TO-11 BYTE COUNT
;
TS.IFB=B15 ; I FLIPFLOP BIT
TS.ZST=B14 ; ZSTOP
TS.EBM=B13 ; TO 11 BYTE MODE
;
TE.XAD=20 ; TO-10 PDP-11 MEMORY ADDRESS
TE.EAD=22 ; TO-11 PDP-11 MEMORY ADDRESS
TE.XDT=24 ; TO-10 PDP-11 DATA WORD
TE.EDT=26 ; TO-11 PDP-11 DATA WORD
TE.DG1=30 ; DIAGNOSTIC WORD 1
TE.DG2=32 ; DIAGNOSTIC WORD 2
TS.RST=B6 ; RESET DTE20
;
;
TE.STW=34 ; STATUS WORD
;
TS.XNT=B15 ; TO-10 NORMAL TERMINATION
TS.XTS=B14 ; TO-10 NORMAL TERMINATION STATUS
TS.XER=B13 ; TO-10 ERROR TERMINATION (AND STATUS)
TS.XEC=B12 ; CLEAR TO-10 ERROR TERMINATION
TS.XEE=B11 ; 10 REQUESTED -11 INTERRUPT
TS.RES=B11 ; REQUEST -11 STATUS
TS.EIS=B10 ; 10 REQUESTS 11 INTERRUPT STATUS
TS.MPE=B9 ; 11 MEMORY PARITY ERROR
TS.EEX=B8 ; 11 REQUESTED 10 INTERRUPT
TS.ETD=B7 ; TO-11 TRANSFER DONE
TS.ENT=B6 ; TO-11 NORMAL TERMINATION
TS.EEE=B5 ; 11 INTERRUPT ENABLE
TS.EPE=B4 ; E-BUS PARITY ERROR
TS.RM=B3 ; RESTRICTED MODE
TS.DEI=B3 ; DISABLE -11 INTERRUPT
TS.XDN=B2 ; DEPOSIT/EXAMINE DONE
TS.EET=B1 ; TO-11 ERROR TERMINATION (AND STATUS)
TS.IEN=B0 ; INTERRUPTS ENABLED
TS.CET=B0 ; CLEAR TO-11 ERROR TERMINATION
;
TE.DG3=36 ; STATUS WORD 3
TS.TBM=B0 ; TO TEN BYTE MODE
;