PDP-10 Archive: 10,7/703anf/dncddq.p11 from BB-F492Z-DD

Trailing-Edge - PDP-10 Archives - BB-F492Z-DD_1986 - 10,7/703anf/dncddq.p11

There are 3 other files named dncddq.p11 in the archive. Click here to see a list.

.SBTTL	DNCDDQ - DQ11 SYNCHRONOUS LINE INTERFACE  28 MAR 79

;THIS SOFTWARE IS FURNISHED UNDER A LICENSE AND MAY ONLY BE USED
;  OR COPIED IN ACCORDANCE WITH THE TERMS OF SUCH LICENSE.
;
;COPYRIGHT (C) 1976,1977,1978.1979,1980,1981,1984 BY DIGITAL EQUIPMENT CORP., MAYNARD, MASS.

VRCDDQ=005			;FILE EDIT NUMBER

.IF NE DQN	;IF SYNCHRONOUS LINES PRESENT, AND THEY HAVE DQ11S
.IF NE FTDQ11

;HERE TO INITIALIZE A DQ11 LINE

;HERE TO RESET THE DQ11 LINE
DQDINI:
;	MOV	LB.SLA(J),DQ		;GET DQ11 HDW ADR
	DQREGS	MSC			;SELECT MISC REGISTER
	MOV	#DQ.MC,6(DQ)		;MASTER CLEAR THE DQ11
	DQREGS	MSC			;SELECT MISC REGISTER
	MOV	#DQ.MC,6(DQ)		;MASTER CLEAR THE DQ11
	;DQREGS	SRC			;SECONDARY RECEIVE COUNT
	;CLR	6(DQ)			;CLEAR BYTE COUNT
	DQREGS	MSC			;SELECT MISC REGISTER
	MOV	#10*400,6(DQ)		;SET 8 BIT CHARS
	DQREGS	SYN			;SELECT SYNC REGISTER
	MOV	#SYN*401,6(DQ)
	MOV	#DQ.RIE,@DQ		;SET INTERRUPT ENABLES
	DQ.IDL=2			;FLAG TO MAKE XMITTER IDLE SYNCHS
	DQ.BIE=DQ.EIE+DQ.DIE+DQ.XIE	;FLAGS TO ENABLE VECTOR B INTERRUPTS
	MOV	#DQ.BIE+DQ.DTR+DQ.IDL,2(DQ)
	TRACE	DQ
	RTS	PC

;HERE TO ENABLE DQ11 RECEIVER

DQRBEG:	BIS	#LS..RG,@J		;FLAG RECEIVER HAS BEEN ENABLED
	MOV	LB.SLA(J),DQ		;GET DQ11 HDW ADR
	MOV	LB.IPT(J),R0		;GET RELATIVE INPUT BUFFER ADDRESS
	ADD	J,R0			;MAKE INPUT BUFFER ADR ABS
;	SLR	(DQ)
;	SLR	R0
;	SLR	#52525
	BIT	#DQ.SEC,@DQ		;PRIMARY/2NDARY NEXT ?
	BNE	20$			;BRANCH FOR 2NDARY
	DQREGS	PRA			;SELECT PRIMARY RCV ADR REG
	BR	22$
20$:	DQREGS	SRA			;SELECT 2NDARY RCV ADR REG
22$:	MOV	R0,6(DQ)
	INCB	5(DQ)			;ADVANCE TO COUNT REG
	MOV	#-4,6(DQ)		;SET LENGTH
	BITB	#4,5(DQ)		;PRIMARY/2NDARY ?
	BEQ	30$
	DQREGS	PRA			;SELECT PRIMARY RCV ADR REG
	BR	32$
30$:	DQREGS	SRA			;SELECT 2NDARY RCV ADR REG
32$:	ADD	#4,R0			;POINT TO 2ND HALF OF HEADER
	MOV	R0,6(DQ)
	INCB	5(DQ)			;SELECT COUNT REG
	MOV	#-4,6(DQ)		;SET LENGTH
	MOV	#DDRJNK,LB.RDN(J)	;WHERE TO GO WHEN HAVE RECEIVED MSG
	BIC	#DQ.RAC!DQ.RGO,(DQ)	;BE SURE THE RECEIVER IS STOPPED
	BIS	#DQ.RGO,@DQ	;SET RECEIVER GOING
	BIC	#LS.SSY,(J)		;RESET REQUEST STRIP SYNCH FLAG
	RTS	PC

;HERE TO ENABLE TRANSMITTER
;  MUST BE CALLED WITH INTERRUPTS DISABLED
; CALL:	MOV	<BLK ADR>,J
;	JSR	PC,DQXBEG

DQXBEG:	MOV	LB.SLA(J),DQ		;GET DQ11 HDW ADR
	TRACE	DQ			;FOR THOSE WHO FOLLOW HDW

	ASSERT #4*40 SET IN PS		;CHECK PROCESSOR LEVEL
	ASSERT #DQ.XGO CLEAR IN 2(DQ)	;IS DQ ALREADY RUNNING ?

;DQ11 NOT GOING SO START BY JAMING OUT SOME SYNCHS
30$:	BIT	#DQ.SEC,2(DQ)		;CHECK PRIMARY/2NDARY BIT
	BEQ	40$			;BRANCH TO SET UP PRIMARY
	DQREGS	STA			;ADDRESS 2NDARY TRANS ADR REG
	BR	45$
40$:	DQREGS	PTA			;ADDRESS PRIMARY TRANS ADR REG
45$:	MOV	#SYNCHS,6(DQ)		;SET PRIMARY TRANSMIT ADDRESS
	INCB	5(DQ)			;ADDRESS TRANS COUNT REG
	MOV	#-FTNSYN,6(DQ)		;SET TRANSMIT COUNT
	JSR	PC,@LB.XDN(J)		;GET WHAT TO SEND NEXT
	TRACE	DQ
	BIT	#DQ.SEC,2(DQ)		;CHECK PRIMARY/2NDARY BIT AGAIN
	BEQ	50$
	DQREGS	PTA			;ADDRESS PRIMARY TRANS ADR REG
	BR	55$
50$:	DQREGS	STA			;ADDRESS 2NDARY TRANS ADR REG
55$:	MOV	R0,6(DQ)		;SET ADDRESS OF BUFFER
	INCB	5(DQ)			;ADDRESS BYTE COUNT REG
	MOV	R1,6(DQ)		;SET BUFFER LENGTH
	BIS	#DQ.DTR+DQ.RTS+DQ.IDL,2(DQ) ;ENABLE TRANSMITTER
	BIT	#DQ.CTS,2(DQ)		;IF MODEM SAYS CLEAR TO SEND
	BEQ	.+10
	BIS	#DQ.XGO,2(DQ)		;START THE XMISSION
	BIS	#LS..XG,@J		;SET FLAG XMITTER IS GOING
	RTS	PC

.MACRO	X	Q
DQVA'Q:
DQA.'Q:	SAVE	<J>
	MOV	#FLBDQ+<LB.SIZ*'Q>,J
.ENDM	X

	Z=DQN-1
.REPT	DQN
	X	\Z
.IIF NE Z,BR	DQAINT
Z=Z-1
.ENDR

;DQ11 VECTOR A INTERRUPT - RECEIVER
DQAINT:	SAVE	<DQ,R0,R1,R2>
	MOV	LB.SLA(J),DQ		;GET DQ11 HDW ADR
;	SLR	@DQ
;	SLR	@J
;	SLR	LB.RDN(J)
;	BIC	#DQ.SSY,@DQ		;IF SOMETHING HAPPENED,
					;BETTER STOP STRIPPING SYNCHS
					;SHOULDN'T HAVE BEEN SET IN THE FIRST
					;PLACE - WE'RE NOT IN TRANSPARENT MODE

DQA.I0:
	BIT	#DQ.RDP+DQ.RDS,@DQ	;IF NO END OF BUF, TEST DSR
	BEQ	20$
	BIT	#LS.SSY,@J		;WANT TO STRIP SYNCH AGAIN ?
	BEQ	5$
	BIC	#DQ.RAC,@DQ		;STOP STUFFING BUFFER, AND
	BIS	#DQ.RGO,@DQ		;TO STRIP SYNCHS AGAIN, BE SURE TO SET GO
	BIC	#LS.SSY,@J		;CLEAR FLAG
5$:	MOV	@DQ,R0			;GET RECEIVER STATUS REGISTER
	ROLB	R0
	BCS	10$			;BRANCH IF PRIMARY FINISHED
	DQREGS	SRA			;ADDRESS 2NDARY BUFFER
	BR	12$
10$:	BMI	16$			;STOP RECEIVER IF BOTH FINISHED
	DQREGS	PRA			;ADDRESS PRIMARY RCV BUF ADR REG
12$:	JSR	PC,@LB.RDN(J)		;DISPATCH TO RIGHT ROUTINE
;	SLR	@DQ
;	SLR	R1
;	SLR	R0
	TRACE	DQ
	MOV	R0,6(DQ)		;SET RCV BUF ADR REG
	BIS	#<DQ.MBM+1>*400,4(DQ)	;ADVANCE TO COUNT REG
	MOV	R1,6(DQ)		;SET COUNT REG
	BEQ	16$			;IF COUNT IS ZERO HALT RECEIVER
	MOV	#DQ.RDP,R0		;BIT TO CLEAR FLAG
	BIT	#4*400,4(DQ)		;WAS THAT PRIMARY/2NDARY
	BEQ	14$
	ASR	R0			;BIT TO CLEAR 2NDARY FLAG
14$:	BIC	R0,@DQ			;CLEAR FLAG
	BIT	#DQ.RGO,@DQ		;RECEIVER STILL RUNNING ?
	BEQ	15$
	BR	DQA.I0			;IF STILL RUNNING, SEE IF WE
					;CAN STILL BE OF SERVICE
15$:
	TWIDDLE				;COUNT TIMES GO DROPPED
;HERE BECAUSE NEED TO STOP RECEIVER
16$:
;	SLR	@DQ
;	SLR	R1
;	SLR	#0
	BIC	#DQ.RKL!DQ.RDP!DQ.RDS,@DQ	;STOP RECEIVER
	BIC	#LS..RG,@J		;CLEAR RECEIVE ACTIVE FLAG
	QUEPUT	QI 89$
	JSR	PC,DDCIGO
51$:	RESTORE	<R2,R1,R0,DQ,J>
	RTI

;HERE WHEN HAVE CLEARED ALL INTERRUPTING CONDITIONS
20$:	BIT	#DQ.DSR,2(DQ)		;IF NOT DATA SET READY,
	BNE	51$			;BETTER STOP THE RECEIVER
	BR	16$

;DQ11 VECTOR B INTERRUPT PROCESSING

.MACRO	X	Q
DQVB'Q:
DQB.'Q:	SAVE	<J>
	MOV	#FLBDQ+<LB.SIZ*'Q>,J
.ENDM	X

	Z=DQN-1
.REPT	DQN
	X	\Z
.IIF NE Z,BR	DQBINT
Z=Z-1
.ENDR

;VECTOR B INTERRUPT FOR DQ11 - TRANSMIT OR DATASET CONTROL
DQBINT:	SAVE	<DQ,R0,R1,R2>
	MOV	LB.SLA(J),DQ		;GET DQ11 HDW ADR
DQB.I0:	TRACE	DQ
	MOV	@DQ,R0
	MOV	2(DQ),R1		;GET TRANSMIT STATUS WORD
	TST	4(DQ)			;CHECK FOR ERROR BIT
	BMI	40$
	BIT	#DQ.XDP+DQ.XDS,R1	;CHECK FOR TRANSMIT DONE
	BEQ	20$			;BRANCH IF NOT XMT-DONE
	BIT	#DQ.XDP,R1		;JUST FIN PRIMARY TRANS BUF ?
	BEQ	10$			; BRANCH ON 2NDARY
	BIT	#DQ.XDS,R1
	BNE	17$			;IF BOTH WENT OFF STOP TRANSMITTER
	DQREGS	PTA			;ADDRESS PRIMARY TRANS BUF ADR REG
	BR	12$
10$:	DQREGS	STA			;ADDRESS 2NDARY TRANS BUF ADR REG
12$:
.IF NE 0	;NOT READY TO TRY THIS NOW
	CMP	#DDCI20,LB.XDN(J)	;IF IDLING, USE HDW IDLE FEATURE
	BNE	13$
	BIS	#DQ.IDL,2(DQ)
	BR	18$
.ENDC
13$:
	JSR	PC,@LB.XDN(J)		;GET WHAT TO PUT IN THE OTHER BUFFER
	TRACE	DQ
	MOV	R0,6(DQ)		;SET UP ADR REG
	INCB	5(DQ)			;ADVANCE TO COUNT REG
	MOV	R1,6(DQ)		;SET COUNT REGISTER
	BEQ	17$			;IN CASE NEED TO STOP IT
	MOV	#DQ.XDP,R0		;BIT TO CLEAR FLAG
	BITB	#4,5(DQ)		;WERE WE SETTING PRIMARY ?
	BEQ	15$			;AND BRANCH IF SO
	MOV	#DQ.XDS,R0		;BIT TO CLEAR FLAG
15$:	BIC	R0,2(DQ)		;CLEAR FLAG
	BIT	#DQ.XGO,2(DQ)		;WERE WE TOO SLOW FOR TRANSMITER ?
	BNE	DQB.I0			;CHECK FOR MORE THINGS TO DO
	BR	17$			;EXECUTE STOP ROUTINE

;HERE BECAUSE NOT TRANSMIT DONE INTERRUPT
20$:	BIT	#DQ.DSF,R1		;DID WE WIN A DATASET FLAG ?
	BNE	30$			;BRANCH IF SO
25$:	RESTORE	<R2,R1,R0,DQ,J>
	RTI

;HERE ON A DATASET INTERRUPT
30$:	BIC	#DQ.DSF,2(DQ)		;CLEAR DATASET FLAG
	BIT	#DQ.CTS,2(DQ)		;DID CLEAR TO SEND COME UP ?
	BEQ	31$
	BIT	#LS..XG,(J)		;IF BUFFERS INITIALIZED
	BEQ	.+10
	BIS	#DQ.XGO,2(DQ)		;START TRANSMITTER
	BR	DQB.I0			;CHECK FOR MORE INTERESTING THINGS
31$:	BIT	#LS..XG,(J)		;IF XMMITTER WAS GOING
	BNE	17$			;ITS STOPPED NOW
	BR	DQB.I0			;CHECK FOR MORE INTERESTING THINGS

;HERE ON AN ERROR INTERRUPT
40$:
.IIF EQ FT.SLB,	INC	LB.SLE(J)	;COUNT ERROR INTERRUPTS
	MOV	4(DQ),R0		;GET ERROR STATUS
.IIF EQ FT.SLB,	MOV	R0,LB.SLE+2(J)	;SAVE ERROR BITS
	BIT	#DQ.RNX!DQ.XNX,R0	;NON EX MEM ?
	BEQ	.+4
	STOPCD	NXM
	BIT	#DQ.RCL!DQ.RLE!DQ.RNX,R0	;RECEIVER ERROR ?
	BEQ	42$
	BIC	#DQ.RDS!DQ.RDP!DQ.RKL,@DQ	;STOP RECEIVER
	BIC	#DQ.RCL!DQ.RLE!DQ.RNX,4(DQ)	;CLEAR FLAG
	BIC	#LS..RG,@J		;CLEAR RECEIVER ACTIVE FLAG
	QUEPUT	QI 87$
	BR	DQB.I0
42$:
.IF NE FTASRT
	BIT	#DQ.XCL!DQ.XLE!DQ.XNX,R0	;WAS IT A TRANSMIT ERROR ?
	ASSERT	NE			;ZAPPED IF NOT
.ENDC

;HERE TO STOP THE DQ11 TRANSMITTER
17$:
;	BIC	#DQ.RTS,2(DQ)		;CLEAR REQUEST TO SEND
18$:	BIC	#DQ.XDP+DQ.XDS+DQ.XGO,2(DQ)	;CLEAR & STOP XMITTER
	BIC	#DQ.XCL!DQ.XLE!DQ.XNX,4(DQ)	;CLEAR ERRORS IF ANY
	BIC	#LS.XCT!LS.XDT!LS..XG,@J	;FLAG WE STOPPED THE TRANSMITTER
	QUEPUT	QO 86$
	JMP	DQB.I0

.ENDC	;.IF NE FTDQ11
.ENDC	;.IF NE DQN