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klad.sources/msdped.xrf
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1 %TITLE 'STIRS FAULT ISOLATION DATA FOR M8620 (DPE) BOARD'
2
3 MODULE MSDPED (
4 LANGUAGE(BLISS36)
5 ) =
6
7 BEGIN
8
9 !
10 ! COPYRIGHT (C) 1979 BY
11 ! DIGITAL EQUIPMENT CORPORATION, MAYNARD, MASS.
12 !
13 ! THIS SOFTWARE IS FURNISHED UNDER A LICENSE AND MAY BE USED AND COPIED
14 ! ONLY IN ACCORDANCE WITH THE TERMS OF SUCH LICENSE AND WITH THE
15 ! INCLUSION OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE OR ANY OTHER
16 ! COPIES THEREOF MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE TO ANY
17 ! OTHER PERSON. NO TITLE TO AND OWNERSHIP OF THE SOFTWARE IS HEREBY
18 ! TRANSFERRED.
19 !
20 ! THE INFORMATION IN THIS SOFTWARE IS SUBJECT TO CHANGE WITHOUT NOTICE
21 ! AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL EQUIPMENT
22 ! CORPORATION.
23 !
24 ! DIGITAL ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF ITS
25 ! SOFTWARE ON EQUIPMENT WHICH IS NOT SUPPLIED BY DIGITAL.
26 !
27
28 !++
29 ! FACILITY: DECSYSTEM 2020 DIAGNOSTIC RELEASE TAPE 'DSTIR'
30 !
31 ! ABSTRACT:
32 !
33 ! THIS MODULE CONTAINS THE FAULT ISOLATION DATA FOR THE KS10
34 ! STIMULUS/RESPONSE (STIRS) DIAGNOSTIC FOR THE M8620 (DPE) BOARD.
35 ! IT IS LINKED TO THE 'MSSTRC' AND 'MSDPET' MODULES TO PRODUCE
36 ! THE 'MSDPE.EXE' FILE.
37 !
38 ! ENVIRONMENT: RUNS UNDER 'CSL' ON A TOPS-20 SYSTEM.
39 !
40 ! AUTHOR: JEAN BASMAJI , CREATION DATE: 23-MAY-79
41 !
42 ! MODIFIED BY:
43 !
44 ! JEAN BASMAJI, 23-MAY-79; VERSION 0.1
45 !--
46 !
47 ! EQUATED SYMBOLS:
48 !
49
50 GLOBAL LITERAL
51 DATA_VERSION = 1,
52 DATA_EDIT = 0,
53 MAXNETS = 108;
54
55 !
56 ! MACROS:
57 !
58
59 MACRO
60 !DEFINING NETWORKS TO CORRESPOND TO BITS FOR WORD W_0
61
62 MSKIP = %ASSIGN (W_0,W_0 OR 1^0)%,
63 SKIP = %ASSIGN (W_0,W_0 OR 1^1)%,
64 MDISP = %ASSIGN (W_0,W_0 OR 1^2)%,
65 DISP = %ASSIGN (W_0,W_0 OR 1^3)%,
66 M2901S = %ASSIGN (W_0,W_0 OR 1^4)%,
67 MEMVMA = %ASSIGN (W_0,W_0 OR 1^5)%,
68 SWPVMA = %ASSIGN (W_0,W_0 OR 1^6)%,
69 DPDBUS = %ASSIGN (W_0,W_0 OR 1^7)%,
70 DBMDBUS = %ASSIGN (W_0,W_0 OR 1^8)%,
71 PCDBUS = %ASSIGN (W_0,W_0 OR 1^9)%,
72 RAMDBUS = %ASSIGN (W_0,W_0 OR 1^10)%,
73 SHIFT = %ASSIGN (W_0,W_0 OR 1^11)%,
74 M2902S = %ASSIGN (W_0,W_0 OR 1^12)%,
75 DPCLKS = %ASSIGN (W_0,W_0 OR 1^13)%,
76 DPSCFLG = %ASSIGN (W_0,W_0 OR 1^14)%,
77 RAMPAR = %ASSIGN (W_0,W_0 OR 1^15)%,
78 BITE = %ASSIGN (W_0,W_0 OR 1^16)%,
79 TBVMACPY = %ASSIGN (W_0,W_0 OR 1^17)%,
80 ADEQ0 = %ASSIGN (W_0,W_0 OR 1^18)%,
81 DRMCNTRL = %ASSIGN (W_0,W_0 OR 1^19)%,
82 PIBUS = %ASSIGN (W_0,W_0 OR 1^20)%,
83 PINEW = %ASSIGN (W_0,W_0 OR 1^21)%,
84 PICURNT = %ASSIGN (W_0,W_0 OR 1^22)%,
85 PISOFT = %ASSIGN (W_0,W_0 OR 1^23)%,
86 PIACTV = %ASSIGN (W_0,W_0 OR 1^24)%,
87 ORPI = %ASSIGN (W_0,W_0 OR 1^25)%,
88 ANDPI = %ASSIGN (W_0,W_0 OR 1^26)%,
89 PIREQ = %ASSIGN (W_0,W_0 OR 1^27)%,
90 TRNCVR = %ASSIGN (W_0,W_0 OR 1^28)%,
91 PIENC = %ASSIGN (W_0,W_0 OR 1^29)%,
92 DPCRY1 = %ASSIGN (W_0,W_0 OR 1^30)%,
93 ACLK = %ASSIGN (W_0,W_0 OR 1^31)%,
94 BCLK = %ASSIGN (W_0,W_0 OR 1^32)%,
95 CCLK = %ASSIGN (W_0,W_0 OR 1^33)%,
96 FCLK = %ASSIGN (W_0,W_0 OR 1^34)%,
97 HCLK = %ASSIGN (W_0,W_0 OR 1^35)%,
98
99 !DEFINING NETWORKS TO CORRESPOND TO BITS FOR WORD W_1
100
101 A = %ASSIGN (W_1,W_1 OR 1^0)%,
102 B = %ASSIGN (W_1,W_1 OR 1^1)%,
103 C = %ASSIGN (W_1,W_1 OR 1^2)%,
104 D = %ASSIGN (W_1,W_1 OR 1^3)%,
105 E = %ASSIGN (W_1,W_1 OR 1^4)%,
106 F = %ASSIGN (W_1,W_1 OR 1^5)%,
107 G = %ASSIGN (W_1,W_1 OR 1^6)%,
108 H = %ASSIGN (W_1,W_1 OR 1^7)%,
109 I = %ASSIGN (W_1,W_1 OR 1^8)%,
110 J = %ASSIGN (W_1,W_1 OR 1^9)%,
111 K = %ASSIGN (W_1,W_1 OR 1^10)%,
112 L = %ASSIGN (W_1,W_1 OR 1^11)%,
113 M = %ASSIGN (W_1,W_1 OR 1^12)%,
114 N = %ASSIGN (W_1,W_1 OR 1^13)%,
115 O = %ASSIGN (W_1,W_1 OR 1^14)%,
116 P = %ASSIGN (W_1,W_1 OR 1^15)%,
117 Q = %ASSIGN (W_1,W_1 OR 1^16)%,
118 R = %ASSIGN (W_1,W_1 OR 1^17)%,
119 S = %ASSIGN (W_1,W_1 OR 1^18)%,
120 T = %ASSIGN (W_1,W_1 OR 1^19)%,
121 U = %ASSIGN (W_1,W_1 OR 1^20)%,
122 V = %ASSIGN (W_1,W_1 OR 1^21)%,
123 W = %ASSIGN (W_1,W_1 OR 1^22)%,
124 X = %ASSIGN (W_1,W_1 OR 1^23)%,
125 Y = %ASSIGN (W_1,W_1 OR 1^24)%,
126 Z = %ASSIGN (W_1,W_1 OR 1^25)%,
127 TRAP = %ASSIGN (W_1,W_1 OR 1^26)%,
128 AC0 = %ASSIGN (W_1,W_1 OR 1^27)%,
129 XR0 = %ASSIGN (W_1,W_1 OR 1^28)%,
130 JRST0 = %ASSIGN (W_1,W_1 OR 1^29)%,
131 XR = %ASSIGN (W_1,W_1 OR 1^30)%,
132 IR = %ASSIGN (W_1,W_1 OR 1^31)%,
133 DBUSSEL = %ASSIGN (W_1,W_1 OR 1^32)%,
134 DRMAB = %ASSIGN (W_1,W_1 OR 1^33)%,
135 DRMJ = %ASSIGN (W_1,W_1 OR 1^34)%,
136 ACDISP = %ASSIGN (W_1,W_1 OR 1^35)%,
137
138 !DEFINING NETWORKS TO CORRESPOND TO BITS FOR WORD W_2
139
140 DBUSPER = %ASSIGN (W_2,W_2 OR 1^0)%,
141 DBUSPEL = %ASSIGN (W_2,W_2 OR 1^1)%,
142 DBUSPR = %ASSIGN (W_2,W_2 OR 1^2)%,
143 DBUSPL = %ASSIGN (W_2,W_2 OR 1^3)%,
144 PE = %ASSIGN (W_2,W_2 OR 1^4)%,
145 PWRITE = %ASSIGN (W_2,W_2 OR 1^5)%,
146 DPPE = %ASSIGN (W_2,W_2 OR 1^6)%,
147 RAM = %ASSIGN (W_2,W_2 OR 1^7)%,
148 RAMWRITE = %ASSIGN (W_2,W_2 OR 1^8)%,
149 RAMSEL = %ASSIGN (W_2,W_2 OR 1^9)%,
150 ACALU = %ASSIGN (W_2,W_2 OR 1^10)%,
151 RAMADRS = %ASSIGN (W_2,W_2 OR 1^11)%,
152 ACBLK = %ASSIGN (W_2,W_2 OR 1^12)%,
153 SPEC18CRY= %ASSIGN (W_2,W_2 OR 1^13)%,
154 SPECIR = %ASSIGN (W_2,W_2 OR 1^14)%,
155 SPECPI = %ASSIGN (W_2,W_2 OR 1^15)%,
156 SPECASH = %ASSIGN (W_2,W_2 OR 1^16)%,
157 SPECEXP = %ASSIGN (W_2,W_2 OR 1^17)%,
158 SPECPC = %ASSIGN (W_2,W_2 OR 1^18)%,
159 SPECAC = %ASSIGN (W_2,W_2 OR 1^19)%,
160 SPECXR = %ASSIGN (W_2,W_2 OR 1^20)%,
161 SPECSWEEP= %ASSIGN (W_2,W_2 OR 1^21)%,
162 SPECAPR = %ASSIGN (W_2,W_2 OR 1^22)%,
163 AEQLJ = %ASSIGN (W_2,W_2 OR 1^23)%,
164 TXXX = %ASSIGN (W_2,W_2 OR 1^24)%,
165
166
167
168 !WORD BEING GENERATED
169 NTWK = W_0,W_1,W_2
170 %ASSIGN (W_0,0)
171 %ASSIGN (W_1,0)
172 %ASSIGN (W_2,0)%,
173 UPAZ (TEXT) = UPLIT (%ASCIZ TEXT)%;
174
175 GLOBAL BIND
176 SKIP_NAME = UPAZ('DPEA: SKIP MIXS'),
177 DBUS_NAME = UPAZ('DPE3&4: DBUS MIXS'),
178 DISP_NAME = UPAZ('DPEA: DISP MIXS'),
179 VMA_NAME = UPAZ('DPE5: VMA EN LOGIC'),
180 SPEC40_NAME = UPAZ('DPE5: SPEC EN 40 DECODER'),
181 SPEC20_NAME = UPAZ('DPE5: SPEC EN 20 DECODER'),
182
183
184
185 !NETWORK NAMES FOR W_0
186
187 NET_NAMES = UPLIT (SKIP_NAME,
188 SKIP_NAME,
189 DISP_NAME,
190 DISP_NAME,
191 UPAZ('DPE1&2&5: 2901S'),
192 VMA_NAME,
193 VMA_NAME,
194 DBUS_NAME,
195 DBUS_NAME,
196 DBUS_NAME,
197 DBUS_NAME,
198 UPAZ('DPE1: SHIFT MIXS'),
199 UPAZ('DPE2: 2902S LOOK AHEAD LOGIC'),
200 UPAZ('DPE5: L\R OF DP CLK ENABLES'),
201 UPAZ('DPE5: DP SHIFT & CRY FLAGS'),
202 UPAZ('DPE7&8: RAMFILE PARITY RAM'),
203 UPAZ('DPE3: BYTE DISP LOGIC'),
204 UPAZ('DPE5: 10 BIT VMA CPY FLOPS'),
205 UPAZ('DPEA: AD = 0 AND GATE'),
206 UPAZ('DPEA: RANDOM CONTROL BIT ROM'),
207 UPAZ('DPEB: BUS PI REQ D FF AND DECODER'),
208 UPAZ('DPEB: PI NEW PRI ENCODER'),
209 UPAZ('DPEB: PI CURRENT D FLOP AND ENCODER'),
210 UPAZ('DPEB: PI SOFT D FLOP'),
211 UPAZ('DPEB: PI ACTIVE D FLOP'),
212 UPAZ('DPEB: THE OR GATES INPUT TO PI NEW PRI ENC'),
213 UPAZ('DPEB: THE AND GATES OUTPUT OF PI ACTIVE'),
214 UPAZ('DPEB: INTERRUPT REQ D FLOP'),
215 UPAZ('DPEB: THE 4 BIT TRNCVR LATCH'),
216 UPAZ('DPEB: PI COMPARE CHIP'),
217 UPAZ('DPE9: DP CRY1 GATES'),
218 UPAZ('DPE5: T CLK A'),
219 UPAZ('DPE5: CLK B'),
220 UPAZ('DPE5: CLK C'),
221 UPAZ('DPE5: CLK F'),
222 UPAZ('DPE5: CLK H'),
223
224
225 !NETWORK NAMES FOR W_1
226
227 UPAZ('DPE9: OV,TRAP1,FOV & FXU D FF'),
228 UPAZ('DPE9: B OR GATES'),
229 UPAZ('DPE9: C OR GATE'),
230 UPAZ('DPE9: D AND GATE '),
231 UPAZ('DPE9: E OR GATE '),
232 UPAZ('DPE9: JFCL LOGIC GATES'),
233 UPAZ('DPE9: G FLAGS EN AND GATES'),
234 UPAZ('DPE9: H FLAG MIX'),
235 UPAZ('DPE9: PC FLAG EN L OR GATE'),
236 UPAZ('DPE9: CRY0,CRY1 & FPD D FF'),
237 UPAZ('DPE9: K OR GATE'),
238 UPAZ('DPE9: L FLAG MIX'),
239 UPAZ('DPE9: M OR GATE'),
240 UPAZ('DPE9: N OR GATE'),
241 UPAZ('DPE9: CLR FPD FLAG GATE'),
242 UPAZ('DPE9: SET FPD FLAG GATE'),
243 UPAZ('DPE9: USER,USER I/O TRAP 2 & NO DIV D FF'),
244 UPAZ('DPE9: R OR GATE'),
245 UPAZ('DPE9: S USER I/O GATES'),
246 UPAZ('DPE9: T HOLD USER I/O AND GATE'),
247 UPAZ('DPE9: U OR GATE'),
248 UPAZ('DPE9: V TRAP 2 OR GATE'),
249 UPAZ('DPE9: W FXU OR GATE'),
250 UPAZ('DPE9: X SET NO DIV OR GATE'),
251 UPAZ('DPE9: Y XOR GATE'),
252 UPAZ('DPE9: Z INVERTERS'),
253 UPAZ('DPE9&B: TRAP DECODER & D FF'),
254 UPAZ('DPEB: AC = 0 AND GATE'),
255 UPAZ('DPEB: XR = 0 AND GATE'),
256 UPAZ('DPEB: JRST,0 AND GATE'),
257 UPAZ('DPEB: XR D FF'),
258 UPAZ('DPEA: ACS & IR D FLOPS'),
259 UPAZ('DPE3: DBUS SEL GATES'),
260 UPAZ('DPEA: DROM A&B ROM'),
261 UPAZ('DPEA: DROM J ROM'),
262 UPAZ('DPEA: DROM AC DISP MIX'),
263
264 !NETWORK NAMES FOR W_2
265
266 UPAZ('DPE4: RIGHT HALF OF DBUS PAR GENS'),
267 UPAZ('DPE3: LEFT HALF OF DBUS PAR GENS'),
268 UPAZ('DPE4: RIGHT HALF OF DBUS PAR MIX'),
269 UPAZ('DPE3: LEFT HALF OF DBUS PAR MIX'),
270 UPAZ('DPE4: PARITY IMPLEMENT D FF'),
271 UPAZ('DPE5: WRITE PARITY GATES'),
272 UPAZ('DPE4: DP PARITY RAM'),
273 UPAZ('DPE7&8: 36 BIT RAMFILE'),
274 UPAZ('DPE5: RAMFILE WRITE AND GATES'),
275 UPAZ('DPE6: RAMFILE ADRS SELCT GATES'),
276 UPAZ('DPE6: AC ALU'),
277 UPAZ('DPE6: RAMFILE ADRS MIXS'),
278 UPAZ('DPE5: AC BLOCKS D FF'),
279 SPEC40_NAME,
280 SPEC40_NAME,
281 SPEC40_NAME,
282 SPEC40_NAME,
283 SPEC40_NAME,
284 SPEC40_NAME,
285 SPEC40_NAME,
286 SPEC20_NAME,
287 SPEC20_NAME,
288 SPEC20_NAME,
289 UPAZ('DPEA: DROM A = J MIX'),
290 UPAZ('DPEA: TXXX XOR GATE'));
291
292
293 COMPILETIME
294 W_0 = 0,
295 W_1 = 0,
296 W_2 = 0;
297
298 BIND T1_E1 = UPLIT(MSKIP MDISP NTWK);
299 BIND T1_E2 = UPLIT(MDISP NTWK);
300 BIND T1_E3 = UPLIT(MDISP NTWK);
301 BIND T1_E4 = UPLIT(MDISP NTWK);
302
303 BIND T1_ES = PLIT( T1_E1,
304 T1_E2,
305 T1_E3,
306 T1_E4);
307
308
309 BIND T2_E1 = UPLIT(ADEQ0 M2901S NTWK);
310
311 BIND T2_ES = PLIT( T2_E1);
312
313
314 BIND T3_E1 = UPLIT(M2901S MEMVMA NTWK);
315
316 BIND T3_ES = PLIT( T3_E1);
317
318
319 BIND T4_E1 = UPLIT(M2901S DPCLKS MEMVMA NTWK);
320
321 BIND T4_ES = PLIT( T4_E1);
322
323
324 BIND T5_E1 = UPLIT(DBMDBUS DBUSSEL M2901S DPCLKS MEMVMA NTWK);
325 BIND T5_NE1 = UPLIT(DBMDBUS NTWK);
326
327 BIND T5_ES = PLIT( T5_E1);
328 BIND T5_NES = PLIT( T5_NE1);
329
330
331 BIND T6_E1 = UPLIT(MEMVMA M2901S DPCLKS DBMDBUS DBUSSEL NTWK);
332
333 BIND T6_ES = PLIT( T6_E1);
334
335
336 BIND T7_E1 = UPLIT(DBMDBUS DBUSSEL M2901S DPCLKS MEMVMA NTWK);
337
338 BIND T7_ES = PLIT( T7_E1);
339
340
341 BIND T8_E1 = UPLIT(DBMDBUS DBUSSEL M2901S DPCLKS MEMVMA SHIFT NTWK);
342
343 BIND T8_ES = PLIT( T8_E1);
344
345
346 BIND T9_E1 = UPLIT(DBMDBUS DBUSSEL M2901S DPCLKS MEMVMA SHIFT NTWK);
347
348 BIND T9_ES = PLIT( T9_E1);
349
350
351 BIND T10_E1 = UPLIT(DBMDBUS DBUSSEL M2901S DPCLKS SHIFT MEMVMA NTWK);
352
353 BIND T10_ES = PLIT( T10_E1);
354
355
356 BIND T11_E1 = UPLIT(DBMDBUS DBUSSEL M2901S DPCLKS MEMVMA NTWK);
357 BIND T11_E2 = UPLIT(DBMDBUS DBUSSEL M2901S DPCLKS MEMVMA SHIFT NTWK);
358
359 BIND T11_ES = PLIT( T11_E1,
360 T11_E2);
361
362
363 BIND T12_E1 = UPLIT(DBMDBUS DBUSSEL M2901S DPCLKS SHIFT MEMVMA NTWK);
364
365 BIND T12_ES = PLIT( T12_E1);
366
367
368 BIND T13_E1 = UPLIT(DBMDBUS DBUSSEL M2901S DPCLKS SHIFT MEMVMA NTWK);
369
370 BIND T13_ES = PLIT( T13_E1);
371
372
373 BIND T14_E1 = UPLIT(M2901S DPCLKS SHIFT DBMDBUS DBUSSEL MEMVMA NTWK);
374
375 BIND T14_ES = PLIT( T14_E1);
376
377
378 BIND T15_E1 = UPLIT(M2901S DPCLKS SHIFT DBMDBUS DBUSSEL MEMVMA M2902S SPEC18CRY NTWK);
379
380 BIND T15_ES = PLIT( T15_E1);
381
382
383 BIND T16_E1 = UPLIT(M2901S DPCLKS SHIFT DBMDBUS DBUSSEL MEMVMA M2902S SPEC18CRY NTWK);
384
385 BIND T16_ES = PLIT( T16_E1);
386
387
388 BIND T17_E1 = UPLIT(M2901S DPCLKS DBMDBUS DBUSSEL SHIFT MEMVMA M2902S SPEC18CRY NTWK);
389
390 BIND T17_ES = PLIT( T17_E1);
391
392
393 BIND T18_E1 = UPLIT(M2901S DPCLKS DBMDBUS DBUSSEL SHIFT MEMVMA NTWK);
394
395 BIND T18_ES = PLIT( T18_E1);
396
397
398 BIND T19_E1 = UPLIT(M2901S DPCLKS DBMDBUS DBUSSEL SHIFT MEMVMA NTWK);
399
400 BIND T19_ES = PLIT( T19_E1);
401
402
403 BIND T20_E1 = UPLIT(M2901S DPCLKS DBMDBUS DBUSSEL SHIFT MEMVMA NTWK);
404
405 BIND T20_ES = PLIT( T20_E1);
406
407
408 BIND T21_E1 = UPLIT(M2901S DPCLKS DBMDBUS DBUSSEL SHIFT MEMVMA NTWK);
409
410 BIND T21_ES = PLIT( T21_E1);
411
412
413 BIND T22_E1 = UPLIT(M2901S M2902S SHIFT DBMDBUS DBUSSEL SKIP DPCRY1 NTWK);
414 BIND T22_NE1 = UPLIT(DPCRY1 NTWK);
415
416 BIND T22_ES = PLIT( T22_E1);
417 BIND T22_NES = PLIT( T22_NE1);
418
419
420 BIND T23_E1 = UPLIT(M2902S SKIP NTWK);
421 BIND T23_E2 = UPLIT(M2902S SKIP NTWK);
422 BIND T23_E3 = UPLIT(SKIP NTWK);
423 BIND T23_E4 = UPLIT(SKIP NTWK);
424 BIND T23_E5 = UPLIT(SKIP NTWK);
425 BIND T23_E6 = UPLIT(SKIP NTWK);
426 BIND T23_E7 = UPLIT(M2902S SKIP NTWK);
427 BIND T23_E8 = UPLIT(M2902S SKIP NTWK);
428
429 BIND T23_ES = PLIT( T23_E1,
430 T23_E2,
431 T23_E3,
432 T23_E4,
433 T23_E5,
434 T23_E6,
435 T23_E7,
436 T23_E8);
437
438
439 BIND T24_E1 = UPLIT(DPCLKS M2901S MEMVMA NTWK);
440 BIND T24_NE1 = UPLIT(DPCLKS NTWK);
441
442 BIND T24_ES = PLIT( T24_E1);
443 BIND T24_NES = PLIT( T24_NE1);
444
445
446 BIND T25_E1 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA DPSCFLG HCLK NTWK);
447 BIND T25_E2 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA DPSCFLG HCLK NTWK);
448 BIND T25_E3 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
449 BIND T25_E4 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
450 BIND T25_E5 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
451 BIND T25_E6 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
452 BIND T25_E7 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
453 BIND T25_E8 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
454 BIND T25_E9 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
455 BIND T25_E10 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
456 BIND T25_E11 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
457 BIND T25_E12 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
458 BIND T25_E13 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
459 BIND T25_E14 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
460 BIND T25_E15 = UPLIT(M2902S M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA DPSCFLG HCLK NTWK);
461 BIND T25_E16 = UPLIT(M2902S M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA DPSCFLG HCLK NTWK);
462 BIND T25_NE1 = UPLIT(HCLK NTWK);
463
464 BIND T25_ES = PLIT( T25_E1,
465 T25_E2,
466 T25_E3,
467 T25_E4,
468 T25_E5,
469 T25_E6,
470 T25_E7,
471 T25_E8,
472 T25_E9,
473 T25_E10,
474 T25_E11,
475 T25_E12,
476 T25_E13,
477 T25_E14,
478 T25_E15,
479 T25_E16);
480 BIND T25_NES = PLIT( T25_NE1);
481
482
483 BIND T26_E1 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
484 BIND T26_E2 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
485 BIND T26_E3 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
486 BIND T26_E4 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
487 BIND T26_E5 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
488 BIND T26_E6 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
489 BIND T26_E7 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
490 BIND T26_E8 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
491 BIND T26_E9 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
492 BIND T26_E10 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
493 BIND T26_E11 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
494 BIND T26_E12 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
495 BIND T26_E13 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
496 BIND T26_E14 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
497 BIND T26_E15 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
498 BIND T26_E16 = UPLIT(M2901S DBMDBUS DBUSSEL DPCLKS SHIFT MEMVMA NTWK);
499
500 BIND T26_ES = PLIT( T26_E1,
501 T26_E2,
502 T26_E3,
503 T26_E4,
504 T26_E5,
505 T26_E6,
506 T26_E7,
507 T26_E8,
508 T26_E9,
509 T26_E10,
510 T26_E11,
511 T26_E12,
512 T26_E13,
513 T26_E14,
514 T26_E15,
515 T26_E16);
516
517
518 BIND T27_E1 = UPLIT(M2902S SPEC18CRY NTWK);
519 BIND T27_E2 = UPLIT(M2902S SPEC18CRY NTWK);
520 BIND T27_NE1 = UPLIT(SPEC18CRY NTWK);
521
522 BIND T27_ES = PLIT( T27_E1,
523 T27_E2);
524 BIND T27_NES = PLIT( T27_NE1);
525
526
527 BIND T28_NE1 = UPLIT(ADEQ0 NTWK);
528 BIND T28_E1 = UPLIT(SKIP NTWK);
529 BIND T28_E2 = UPLIT(ADEQ0 NTWK);
530
531 BIND T28_ES = PLIT( T28_E1,
532 T28_E2);
533 BIND T28_NES = PLIT( T28_NE1);
534
535
536 BIND T29_E1 = UPLIT(BITE NTWK);
537
538 BIND T29_ES = PLIT( T29_E1);
539
540
541 BIND T30_E1 = UPLIT(PCDBUS DBUSSEL NTWK);
542 BIND T30_NE1 = UPLIT(DBUSSEL NTWK);
543 BIND T30_E2 = UPLIT(PE DBUSSEL DBUSPL NTWK);
544 BIND T30_E3 = UPLIT(PE DBUSSEL DBUSPR NTWK);
545
546 BIND T30_ES = PLIT( T30_E1,
547 T30_E2,
548 T30_E3);
549 BIND T30_NES = PLIT( T30_NE1);
550
551
552 BIND T31_E1 = UPLIT(DBMDBUS DPDBUS DBUSSEL NTWK);
553 BIND T31_NE1 = UPLIT(DPDBUS NTWK);
554
555 BIND T31_ES = PLIT( T31_E1);
556 BIND T31_NES = PLIT( T31_NE1);
557
558
559 BIND T32_E1 = UPLIT(TBVMACPY PCDBUS BCLK CCLK NTWK);
560 BIND T32_NE1 = UPLIT(TBVMACPY BCLK CCLK NTWK);
561
562 BIND T32_ES = PLIT( T32_E1);
563 BIND T32_NES = PLIT( T32_NE1);
564
565
566 BIND T33_E1 = UPLIT(DISP NTWK);
567 BIND T33_E2 = UPLIT(ADEQ0 DISP NTWK);
568
569 BIND T33_ES = PLIT( T33_E1,
570 T33_E2);
571
572
573 BIND T34_E1 = UPLIT(CCLK SPECAPR PIBUS NTWK);
574 BIND T34_NE1 = UPLIT(CCLK PIBUS NTWK);
575
576 BIND T34_ES = PLIT( T34_E1);
577 BIND T34_NES = PLIT( T34_NE1);
578
579
580 BIND T35_E1 = UPLIT(CCLK BCLK PCDBUS PINEW PISOFT SPECPI ORPI NTWK);
581 BIND T35_NE1 = UPLIT(PISOFT BCLK CCLK NTWK);
582
583 BIND T35_ES = PLIT( T35_E1);
584 BIND T35_NES = PLIT( T35_NE1);
585
586
587 BIND T36_E1 = UPLIT(PINEW BCLK CCLK PCDBUS ORPI ANDPI PIACTV PISOFT PIREQ PIBUS SPECPI SPECAPR NTWK);
588 BIND T36_NE1 = UPLIT(PIACTV ANDPI NTWK);
589 BIND T36_NE2 = UPLIT(PIACTV ORPI ANDPI PISOFT CCLK BCLK NTWK);
590
591 BIND T36_ES = PLIT( T36_E1);
592 BIND T36_NES = PLIT( T36_NE1,
593 T36_NE2);
594
595
596 BIND T37_E1 = UPLIT(BCLK SPECPI PICURNT TRNCVR NTWK);
597 BIND T37_E2 = UPLIT(TRNCVR NTWK);
598 BIND T37_NE1 = UPLIT(SPECPI TRNCVR BCLK NTWK);
599
600 BIND T37_ES = PLIT( T37_E1,
601 T37_E2);
602 BIND T37_NES = PLIT( T37_NE1);
603
604
605 BIND T38_E1 = UPLIT(BCLK CCLK SKIP PINEW PIENC PICURNT PISOFT PIACTV ORPI ANDPI SPECPI NTWK);
606
607 BIND T38_ES = PLIT( T38_E1);
608
609
610 BIND T39_NE1 = UPLIT(PCDBUS NTWK);
611 BIND T39_NE2 = UPLIT(SPECPC FCLK NTWK);
612 BIND T39_E1 = UPLIT(PCDBUS A B C D E H G I SPECPC FCLK NTWK);
613 BIND T39_E2 = UPLIT(PCDBUS J K L G SPECPC FCLK NTWK);
614 BIND T39_E3 = UPLIT(PCDBUS FCLK J L M G SPECPC NTWK);
615 BIND T39_E4 = UPLIT(PCDBUS FCLK A G I B D N H SPECPC NTWK);
616 BIND T39_E5 = UPLIT(PCDBUS FCLK J O P L G SPECPC NTWK);
617 BIND T39_E6 = UPLIT(PCDBUS FCLK Q G R SPECPC NTWK);
618 BIND T39_E7 = UPLIT(PCDBUS FCLK SPECPC Q S G NTWK);
619 BIND T39_E8 = UPLIT(PCDBUS FCLK SPECPC Q V NTWK);
620 BIND T39_E9 = UPLIT(PCDBUS FCLK SPECPC A I G B C D U NTWK);
621 BIND T39_E10 = UPLIT(PCDBUS FCLK SPECPC A I G W H NTWK);
622 BIND T39_E11 = UPLIT(PCDBUS FCLK SPECPC Q X H G NTWK);
623 BIND T39_E12 = UPLIT(G H NTWK);
624 BIND T39_E13 = UPLIT(G L NTWK);
625 BIND T39_E14 = UPLIT(R G NTWK);
626 BIND T39_E15 = UPLIT(S NTWK);
627 BIND T39_E16 = UPLIT(V NTWK);
628 BIND T39_E17 = UPLIT(U G NTWK);
629 BIND T39_E18 = UPLIT(C H G NTWK);
630 BIND T39_E19 = UPLIT(L G NTWK);
631 BIND T39_E20 = UPLIT(M L G NTWK);
632 BIND T39_E21 = UPLIT(H G NTWK);
633 BIND T39_E22 = UPLIT(L G NTWK);
634 BIND T39_E23 = UPLIT(S G NTWK);
635 BIND T39_E24 = UPLIT(C U G NTWK);
636 BIND T39_E25 = UPLIT(PCDBUS FCLK SPECPC A B E F H G I NTWK);
637 BIND T39_E26 = UPLIT(PCDBUS FCLK SPECPC J K L F G NTWK);
638 BIND T39_E27 = UPLIT(PCDBUS FCLK J M F L G NTWK);
639 BIND T39_E28 = UPLIT(PCDBUS FCLK SPECPC A I G B N F H NTWK);
640 BIND T39_E29 = UPLIT(PCDBUS FCLK SPECPC Q S G NTWK);
641 BIND T39_E30 = UPLIT(PCDBUS FCLK SPECPC A I G U NTWK);
642 BIND T39_E31 = UPLIT(PCDBUS FCLK Z S NTWK);
643
644 BIND T39_ES = PLIT( T39_E1,
645 T39_E2,
646 T39_E3,
647 T39_E4,
648 T39_E5,
649 T39_E6,
650 T39_E7,
651 T39_E8,
652 T39_E9,
653 T39_E10,
654 T39_E11,
655 T39_E12,
656 T39_E13,
657 T39_E14,
658 T39_E15,
659 T39_E16,
660 T39_E17,
661 T39_E18,
662 T39_E19,
663 T39_E20,
664 T39_E21,
665 T39_E22,
666 T39_E23,
667 T39_E24,
668 T39_E25,
669 T39_E26,
670 T39_E27,
671 T39_E28,
672 T39_E29,
673 T39_E30,
674 T39_E31);
675 BIND T39_NES = PLIT( T39_NE1,
676 T39_NE2);
677
678
679 BIND T40_NE1 = UPLIT(FCLK SPECIR SPECPC NTWK);
680 BIND T40_E1 = UPLIT(SKIP SPECPC F IR SPECIR FCLK NTWK);
681 BIND T40_E2 = UPLIT(SKIP SPECPC FCLK A B C D E F G H I NTWK);
682 BIND T40_E3 = UPLIT(SKIP G F NTWK);
683 BIND T40_E4 = UPLIT(SKIP SPECPC IR SPECIR FCLK F A B E H G I NTWK);
684 BIND T40_E5 = UPLIT(SKIP SPECPC FCLK F J K L G NTWK);
685 BIND T40_E6 = UPLIT(SKIP SPECPC FCLK IR SPECIR J K F L G NTWK);
686 BIND T40_E7 = UPLIT(SKIP SPECPC FCLK F J M L G NTWK);
687 BIND T40_E8 = UPLIT(SKIP FCLK K IR SPECIR SPECPC F L G J M NTWK);
688 BIND T40_E9 = UPLIT(SKIP SPECPC FCLK A B I G D N H F NTWK);
689 BIND T40_E10 = UPLIT(SKIP FCLK SPECPC IR SPECIR A I G B N F H NTWK);
690 BIND T40_E11 = UPLIT(PCDBUS IR SPECIR SPECPC FCLK F A B C D E I G NTWK);
691 BIND T40_E12 = UPLIT(PCDBUS IR SPECIR SPECPC FCLK F J K G NTWK);
692 BIND T40_E13 = UPLIT(PCDBUS IR SPECIR SPECPC FCLK F J M G NTWK);
693 BIND T40_E14 = UPLIT(PCDBUS IR SPECIR SPECPC FCLK F A B G D N NTWK);
694
695 BIND T40_ES = PLIT( T40_E1,
696 T40_E2,
697 T40_E3,
698 T40_E4,
699 T40_E5,
700 T40_E6,
701 T40_E7,
702 T40_E8,
703 T40_E9,
704 T40_E10,
705 T40_E11,
706 T40_E12,
707 T40_E13,
708 T40_E14);
709 BIND T40_NES = PLIT( T40_NE1);
710
711
712 BIND T41_E1 = UPLIT(PCDBUS FCLK SPECPC J K G NTWK);
713 BIND T41_E2 = UPLIT(PCDBUS FCLK SPECPC G J M NTWK);
714 BIND T41_E3 = UPLIT(PCDBUS FCLK SPECPC J P O NTWK);
715 BIND T41_E4 = UPLIT(PCDBUS SPECPC FCLK V Q NTWK);
716 BIND T41_E5 = UPLIT(PCDBUS FCLK SPECPC IR SPECIR G J K L NTWK);
717 BIND T41_E6 = UPLIT(PCDBUS SPECPC IR SPECIR G FCLK J M L NTWK);
718 BIND T41_E7 = UPLIT(PCDBUS FCLK SPECPC IR SPECIR O J NTWK);
719 BIND T41_E8 = UPLIT(PCDBUS FCLK SPECPC IR SPECIR Q V NTWK);
720 BIND T41_NE1 = UPLIT(FCLK SPECPC SPECIR NTWK);
721 BIND T41_E9 = UPLIT(PCDBUS FCLK SPECPC IR SPECIR G J K L NTWK);
722 BIND T41_E10 = UPLIT(PCDBUS SPECPC IR SPECIR FCLK G J M L NTWK);
723 BIND T41_E11 = UPLIT(PCDBUS FCLK SPECPC IR SPECIR G P J O L NTWK);
724 BIND T41_E12 = UPLIT(PCDBUS SPECPC IR SPECIR FCLK Q V NTWK);
725
726 BIND T41_ES = PLIT( T41_E1,
727 T41_E2,
728 T41_E3,
729 T41_E4,
730 T41_E5,
731 T41_E6,
732 T41_E7,
733 T41_E8,
734 T41_E9,
735 T41_E10,
736 T41_E11,
737 T41_E12);
738 BIND T41_NES = PLIT( T41_NE1);
739
740
741 BIND T42_E1 = UPLIT(PCDBUS FCLK SPECPC A I G B E NTWK);
742 BIND T42_E2 = UPLIT(PCDBUS SPECPC FCLK A I G B N NTWK);
743 BIND T42_E3 = UPLIT(PCDBUS SPECPC FCLK A I G B U NTWK);
744 BIND T42_E4 = UPLIT(PCDBUS SPECPC FCLK Q X NTWK);
745 BIND T42_E5 = UPLIT(PCDBUS FCLK SPECPC IR SPECIR I A B C D E G NTWK);
746 BIND T42_E6 = UPLIT(PCDBUS FCLK SPECPC IR SPECIR A B D N I G NTWK);
747 BIND T42_E7 = UPLIT(PCDBUS FCLK SPECPC I G A B C D U NTWK);
748 BIND T42_E8 = UPLIT(PCDBUS FCLK SPECPC Q X H G NTWK);
749 BIND T42_NE1 = UPLIT(FCLK SPECPC SPECIR NTWK);
750 BIND T42_E9 = UPLIT(PCDBUS FCLK SPECPC IR SPECIR A B C D E I G NTWK);
751 BIND T42_E10 = UPLIT(PCDBUS FCLK SPECPC SPECIR IR A B D N I G NTWK);
752 BIND T42_E11 = UPLIT(PCDBUS FCLK SPECPC I G A B C D U NTWK);
753
754 BIND T42_ES = PLIT( T42_E1,
755 T42_E2,
756 T42_E3,
757 T42_E4,
758 T42_E5,
759 T42_E6,
760 T42_E7,
761 T42_E8,
762 T42_E9,
763 T42_E10,
764 T42_E11);
765 BIND T42_NES = PLIT( T42_NE1);
766
767
768 BIND T43_E1 = UPLIT(PCDBUS SPECPC SPECEXP FCLK A I Z B C D E H G NTWK);
769 BIND T43_E2 = UPLIT(PCDBUS FCLK SPECPC SPECEXP A I Z B D N H G NTWK);
770 BIND T43_E3 = UPLIT(PCDBUS FCLK SPECPC SPECEXP A I Z G B C D U NTWK);
771 BIND T43_E4 = UPLIT(PCDBUS FCLK SPECPC SPECEXP A I Z G W H NTWK);
772 BIND T43_E5 = UPLIT(PCDBUS FCLK SPECPC SPECEXP A I Z B D NTWK);
773 BIND T43_E6 = UPLIT(PCDBUS FCLK SPECPC SPECEXP A I Z B W NTWK);
774 BIND T43_NE1 = UPLIT(FCLK SPECPC SPECEXP NTWK);
775 BIND T43_E7 = UPLIT(PCDBUS SPECPC SPECEXP FCLK A I Z G B C D E H NTWK);
776 BIND T43_E8 = UPLIT(PCDBUS FCLK SPECPC SPECEXP A B D N H G I Z NTWK);
777 BIND T43_E9 = UPLIT(PCDBUS FCLK SPECPC SPECEXP I Z G A B C D U NTWK);
778 BIND T43_E10 = UPLIT(PCDBUS FCLK SPECPC SPECEXP A I Z G W H NTWK);
779
780 BIND T43_ES = PLIT( T43_E1,
781 T43_E2,
782 T43_E3,
783 T43_E4,
784 T43_E5,
785 T43_E6,
786 T43_E7,
787 T43_E8,
788 T43_E9,
789 T43_E10);
790 BIND T43_NES = PLIT( T43_NE1);
791
792
793 BIND T44_E1 = UPLIT(PCDBUS FCLK SPECPC SPECASH Y G I Z A B C D E H NTWK);
794 BIND T44_E2 = UPLIT(PCDBUS FCLK SPECPC SPECASH I Z Y A B C D U G NTWK);
795 BIND T44_E3 = UPLIT(PCDBUS FCLK SPECPC SPECASH A B C D E I Z G Y H NTWK);
796 BIND T44_E4 = UPLIT(PCDBUS FCLK SPECPC SPECASH I Z Y G A B C D U NTWK);
797 BIND T44_E5 = UPLIT(PCDBUS FCLK SPECPC SPECASH I Z A B C Y NTWK);
798 BIND T44_E6 = UPLIT(PCDBUS FCLK SPECPC SPECASH I Z A B C Y NTWK);
799 BIND T44_E7 = UPLIT(PCDBUS FCLK SPECPC SPECASH I G Z A B C D E H NTWK);
800 BIND T44_E8 = UPLIT(PCDBUS FCLK SPECPC SPECASH G A B I Z C D U NTWK);
801 BIND T44_E9 = UPLIT(PCDBUS FCLK SPECPC SPECASH G A B C I Z D E H NTWK);
802 BIND T44_E10 = UPLIT(PCDBUS FCLK SPECPC SPECASH G A B C D U I Z NTWK);
803 BIND T44_E11 = UPLIT(PCDBUS FCLK SPECPC SPECASH Y I G Z A B C NTWK);
804 BIND T44_NE1 = UPLIT(FCLK SPECPC SPECASH NTWK);
805 BIND T44_E12 = UPLIT(PCDBUS FCLK SPECPC SPECASH Y G I Z A B C D E H NTWK);
806 BIND T44_E13 = UPLIT(PCDBUS FCLK SPECPC SPECASH A B I Z C D Y U NTWK);
807
808 BIND T44_ES = PLIT( T44_E1,
809 T44_E2,
810 T44_E3,
811 T44_E4,
812 T44_E5,
813 T44_E6,
814 T44_E7,
815 T44_E8,
816 T44_E9,
817 T44_E10,
818 T44_E11,
819 T44_E12,
820 T44_E13);
821 BIND T44_NES = PLIT( T44_NE1);
822
823
824 BIND T45_E1 = UPLIT(PCDBUS FCLK SPECPC Q R G S NTWK);
825 BIND T45_E2 = UPLIT(PCDBUS FCLK SPECPC Q R G S NTWK);
826 BIND T45_E3 = UPLIT(PCDBUS FCLK SPECPC Q G S NTWK);
827 BIND T45_E4 = UPLIT(PCDBUS FCLK SPECPC R Q G S NTWK);
828 BIND T45_E5 = UPLIT(PCDBUS FCLK SPECPC R Q S G NTWK);
829 BIND T45_E6 = UPLIT(PCDBUS FCLK SPECPC Q G S NTWK);
830 BIND T45_E7 = UPLIT(PCDBUS FCLK SPECPC Q G R S NTWK);
831 BIND T45_E8 = UPLIT(PCDBUS FCLK SPECPC Q G S Z NTWK);
832 BIND T45_E9 = UPLIT(PCDBUS G FCLK SPECPC Q S Z NTWK);
833 BIND T45_E10 = UPLIT(PCDBUS FCLK SPECPC Q G S NTWK);
834 BIND T45_E11 = UPLIT(PCDBUS FCLK SPECPC Q R S G T NTWK);
835 BIND T45_E12 = UPLIT(PCDBUS FCLK SPECPC Q R G S T NTWK);
836 BIND T45_E13 = UPLIT(PCDBUS FCLK SPECPC Q G S T NTWK);
837 BIND T45_NE1 = UPLIT(FCLK SPECPC NTWK);
838 BIND T45_E14 = UPLIT(PCDBUS FCLK SPECPC Q G S NTWK);
839
840 BIND T45_ES = PLIT( T45_E1,
841 T45_E2,
842 T45_E3,
843 T45_E4,
844 T45_E5,
845 T45_E6,
846 T45_E7,
847 T45_E8,
848 T45_E9,
849 T45_E10,
850 T45_E11,
851 T45_E12,
852 T45_E13,
853 T45_E14);
854 BIND T45_NES = PLIT( T45_NE1);
855
856
857 BIND T46_E1 = UPLIT(PIBUS SPECPC SPECAPR TRAP Q FCLK V A B I G C D U NTWK);
858 BIND T46_E2 = UPLIT(PIBUS SPECPC SPECAPR TRAP FCLK NTWK);
859 BIND T46_NE1 = UPLIT(TRAP FCLK CCLK SPECPC SPECAPR NTWK);
860
861 BIND T46_ES = PLIT( T46_E1,
862 T46_E2);
863 BIND T46_NES = PLIT( T46_NE1);
864
865
866 BIND T47_NE1 = UPLIT(FCLK SPECIR SPECXR AC0 XR0 IR JRST0 NTWK);
867 BIND T47_E1 = UPLIT(FCLK SPECIR AC0 IR SKIP NTWK);
868 BIND T47_E2 = UPLIT(FCLK SPECXR XR0 XR NTWK);
869 BIND T47_E3 = UPLIT(FCLK SPECXR XR NTWK);
870 BIND T47_E4 = UPLIT(FCLK AC0 JRST0 IR SPECIR NTWK);
871 BIND T47_E5 = UPLIT(FCLK IR JRST0 SPECIR NTWK);
872
873 BIND T47_ES = PLIT( T47_E1,
874 T47_E2,
875 T47_E3,
876 T47_E4,
877 T47_E5);
878 BIND T47_NES = PLIT( T47_NE1);
879
880
881 BIND T48_E1 = UPLIT(SKIP NTWK);
882 BIND T48_E2 = UPLIT(SKIP NTWK);
883 BIND T48_E3 = UPLIT(SKIP NTWK);
884 BIND T48_E4 = UPLIT(SKIP NTWK);
885 BIND T48_E5 = UPLIT(SKIP NTWK);
886 BIND T48_E6 = UPLIT(SKIP NTWK);
887
888 BIND T48_ES = PLIT( T48_E1,
889 T48_E2,
890 T48_E3,
891 T48_E4,
892 T48_E5,
893 T48_E6);
894
895
896 BIND T49_NE1 = UPLIT(DBUSPER NTWK);
897 BIND T49_NE2 = UPLIT(DBUSPEL NTWK);
898 BIND T49_NE3 = UPLIT(DBUSPER DBUSPEL PE BCLK NTWK);
899 BIND T49_E1 = UPLIT(BCLK DBUSPR DBUSPER PE NTWK);
900 BIND T49_E2 = UPLIT(BCLK DBUSPL DBUSPEL PE NTWK);
901 BIND T49_E3 = UPLIT(BCLK PE NTWK);
902
903 BIND T49_ES = PLIT( T49_E1,
904 T49_E2,
905 T49_E3);
906 BIND T49_NES = PLIT( T49_NE1,
907 T49_NE2,
908 T49_NE3);
909
910
911 BIND T50_NE1 = UPLIT(DPPE NTWK);
912 BIND T50_E1 = UPLIT(DPDBUS BCLK PE DBUSPER DBUSPR PWRITE DPPE NTWK);
913 BIND T50_E2 = UPLIT(DPDBUS BCLK PE DBUSPEL DBUSPL PWRITE DPPE NTWK);
914 BIND T50_E3 = UPLIT(DPDBUS DPPE PE DBUSPR BCLK PWRITE NTWK);
915 BIND T50_E4 = UPLIT(DPDBUS DPPE PE DBUSPL BCLK PWRITE NTWK);
916 BIND T50_E5 = UPLIT(PWRITE PE BCLK DPPE NTWK);
917 BIND T50_NE2 = UPLIT(PWRITE NTWK);
918 BIND T50_E6 = UPLIT(PWRITE NTWK);
919
920 BIND T50_ES = PLIT( T50_E1,
921 T50_E2,
922 T50_E3,
923 T50_E4,
924 T50_E5,
925 T50_E6);
926 BIND T50_NES = PLIT( T50_NE1,
927 T50_NE2);
928
929
930 BIND T51_E1 = UPLIT(ADEQ0 RAMDBUS RAMWRITE RAM BCLK NTWK);
931 BIND T51_NE1 = UPLIT(RAMWRITE BCLK RAMDBUS RAM NTWK);
932
933 BIND T51_ES = PLIT( T51_E1);
934 BIND T51_NES = PLIT( T51_NE1);
935
936
937 BIND T52_E1 = UPLIT(RAM RAMDBUS RAMPAR RAMADRS RAMSEL RAMWRITE DBUSPEL DBUSPER DBUSPL DBUSPR PE BCLK NTWK);
938 BIND T52_NE1 = UPLIT(BCLK RAMWRITE RAMPAR NTWK);
939
940 BIND T52_ES = PLIT( T52_E1);
941 BIND T52_NES = PLIT( T52_NE1);
942
943
944 BIND T53_E1 = UPLIT(ADEQ0 RAM RAMADRS RAMSEL RAMDBUS TBVMACPY RAMWRITE BCLK NTWK);
945
946 BIND T53_ES = PLIT( T53_E1);
947
948
949 BIND T54_E1 = UPLIT(ADEQ0 RAM RAMADRS RAMSEL RAMDBUS TBVMACPY RAMWRITE BCLK NTWK);
950
951 BIND T54_ES = PLIT( T54_E1);
952
953
954 BIND T55_NE1 = UPLIT(HCLK FCLK SPECAC SPECIR NTWK);
955 BIND T55_NE2 = UPLIT(RAMDBUS NTWK);
956 BIND T55_E1 = UPLIT(RAM RAMADRS RAMSEL BCLK HCLK TBVMACPY SPECAC SPECIR ADEQ0 IR FCLK ACBLK RAMDBUS RAMWRITE NTWK);
957
958 BIND T55_ES = PLIT( T55_E1);
959 BIND T55_NES = PLIT( T55_NE1,
960 T55_NE2);
961
962
963 BIND T56_NE1 = UPLIT(BCLK HCLK SPECAC SPECXR NTWK);
964 BIND T56_NE2 = UPLIT(ACBLK BCLK HCLK SPECAC SPECXR NTWK);
965 BIND T56_NE3 = UPLIT(RAMDBUS NTWK);
966 BIND T56_E1 = UPLIT(ADEQ0 RAM XR HCLK SPECAC SPECXR ACBLK RAMWRITE RAMADRS RAMSEL BCLK TBVMACPY RAMDBUS NTWK);
967
968 BIND T56_ES = PLIT( T56_E1);
969 BIND T56_NES = PLIT( T56_NE1,
970 T56_NE2,
971 T56_NE3);
972
973
974 BIND T57_NE1 = UPLIT(CCLK BCLK HCLK SPECAC NTWK);
975 BIND T57_NE2 = UPLIT(RAMDBUS NTWK);
976 BIND T57_E1 = UPLIT(CCLK RAM HCLK SPECAC ADEQ0 ACBLK RAMWRITE RAMADRS RAMSEL BCLK TBVMACPY RAMDBUS NTWK);
977
978 BIND T57_ES = PLIT( T57_E1);
979 BIND T57_NES = PLIT( T57_NE1,
980 T57_NE2);
981
982
983 BIND T58_NE1 = UPLIT(RAMDBUS NTWK);
984 BIND T58_E1 = UPLIT(ADEQ0 CCLK RAM RAMWRITE RAMADRS RAMSEL BCLK TBVMACPY RAMDBUS NTWK);
985
986 BIND T58_ES = PLIT( T58_E1);
987 BIND T58_NES = PLIT( T58_NE1);
988
989
990 BIND T59_E1 = UPLIT(ADEQ0 RAM ACBLK RAMWRITE RAMADRS RAMSEL BCLK TBVMACPY RAMDBUS NTWK);
991 BIND T59_NE1 = UPLIT(RAMSEL NTWK);
992 BIND T59_NE2 = UPLIT(RAMDBUS NTWK);
993
994 BIND T59_ES = PLIT( T59_E1);
995 BIND T59_NES = PLIT( T59_NE1,
996 T59_NE2);
997
998
999 BIND T60_NE1 = UPLIT(FCLK BCLK ACALU SPECIR SPECAC FCLK NTWK);
1000 BIND T60_NE2 = UPLIT(RAMDBUS NTWK);
1001 BIND T60_E1 = UPLIT(ADEQ0 IR FCLK RAM HCLK SPECIR SPECAC ACALU ACBLK RAMWRITE RAMADRS RAMSEL BCLK TBVMACPY RAMDBUS NTWK);
1002
1003 BIND T60_ES = PLIT( T60_E1);
1004 BIND T60_NES = PLIT( T60_NE1,
1005 T60_NE2);
1006
1007
1008 BIND T61_E1 = UPLIT(SPECSWEEP SWPVMA NTWK);
1009 BIND T61_NE1 = UPLIT(SPECSWEEP SWPVMA NTWK);
1010
1011 BIND T61_ES = PLIT( T61_E1);
1012 BIND T61_NES = PLIT( T61_NE1);
1013
1014
1015 BIND T62_E1 = UPLIT(ADEQ0 SPECSWEEP SWPVMA RAMADRS RAMWRITE RAM RAMDBUS NTWK);
1016 BIND T62_NE1 = UPLIT(ADEQ0 RAMWRITE NTWK);
1017
1018 BIND T62_ES = PLIT( T62_E1);
1019 BIND T62_NES = PLIT( T62_NE1);
1020
1021
1022 BIND T63_E1 = UPLIT(ACDISP IR FCLK SPECIR DRMJ DRMCNTRL DISP NTWK);
1023 BIND T63_E2 = UPLIT(IR SPECIR FCLK DRMCNTRL DRMJ AEQLJ DISP ACDISP NTWK);
1024 BIND T63_E3 = UPLIT(IR FCLK SPECIR DRMAB DISP NTWK);
1025 BIND T63_E4 = UPLIT(IR FCLK SPECIR DRMAB DISP NTWK);
1026 BIND T63_E5 = UPLIT(IR FCLK SPECIR DRMCNTRL TXXX ADEQ0 SKIP NTWK);
1027 BIND T63_E6 = UPLIT(IR FCLK SPECIR DRMCNTRL MEMVMA NTWK);
1028 BIND T63_E7 = UPLIT(IR FCLK SPECIR DRMCNTRL NTWK);
1029 BIND T63_E8 = UPLIT(IR FCLK SPECIR DRMCNTRL NTWK);
1030
1031 BIND T63_ES = PLIT( T63_E1,
1032 T63_E2,
1033 T63_E3,
1034 T63_E4,
1035 T63_E5,
1036 T63_E6,
1037 T63_E7,
1038 T63_E8);
1039
1040
1041 BIND T64_E1 = UPLIT(IR FCLK SPECIR ACDISP DRMCNTRL DISP DRMJ NTWK);
1042 BIND T64_E2 = UPLIT(IR FCLK SPECIR DISP ACDISP AEQLJ DRMJ DRMCNTRL NTWK);
1043 BIND T64_E3 = UPLIT(IR FCLK SPECIR DRMAB DISP NTWK);
1044 BIND T64_E4 = UPLIT(IR FCLK SPECIR DRMAB DISP NTWK);
1045 BIND T64_E5 = UPLIT(IR SPECIR FCLK DRMCNTRL TXXX ADEQ0 SKIP NTWK);
1046 BIND T64_E6 = UPLIT(IR FCLK SPECIR DRMCNTRL MEMVMA NTWK);
1047 BIND T64_E7 = UPLIT(IR FCLK SPECIR DRMCNTRL NTWK);
1048 BIND T64_E8 = UPLIT(IR FCLK SPECIR DRMCNTRL NTWK);
1049
1050 BIND T64_ES = PLIT( T64_E1,
1051 T64_E2,
1052 T64_E3,
1053 T64_E4,
1054 T64_E5,
1055 T64_E6,
1056 T64_E7,
1057 T64_E8);
1058
1059
1060 BIND T65_E1 = UPLIT(IR FCLK SPECIR DRMCNTRL ACDISP DRMJ DISP NTWK);
1061 BIND T65_E2 = UPLIT(IR FCLK SPECIR DRMCNTRL AEQLJ DRMAB DISP NTWK);
1062 BIND T65_E3 = UPLIT(IR FCLK SPECIR DISP DRMAB NTWK);
1063 BIND T65_E4 = UPLIT(IR FCLK SPECIR DISP DRMAB NTWK);
1064
1065 BIND T65_ES = PLIT( T65_E1,
1066 T65_E2,
1067 T65_E3,
1068 T65_E4);
1069
1070
1071 BIND T66_E1 = UPLIT(IR FCLK SPECIR DRMCNTRL ACDISP DISP DRMJ NTWK);
1072 BIND T66_E2 = UPLIT(IR FCLK SPECIR ACDISP DRMCNTRL DISP DRMJ NTWK);
1073 BIND T66_E3 = UPLIT(IR FCLK SPECIR DRMCNTRL DISP DRMAB AEQLJ NTWK);
1074 BIND T66_E4 = UPLIT(IR FCLK SPECIR DRMAB DISP NTWK);
1075 BIND T66_E5 = UPLIT(IR SPECIR FCLK DISP DRMAB NTWK);
1076
1077 BIND T66_ES = PLIT( T66_E1,
1078 T66_E2,
1079 T66_E3,
1080 T66_E4,
1081 T66_E5);
1082
1083
1084 BIND T67_E1 = UPLIT(IR FCLK SPECIR DRMCNTRL MEMVMA NTWK);
1085
1086 BIND T67_ES = PLIT( T67_E1);
1087
1088
1089 BIND T68_E1 = UPLIT(IR SPECIR FCLK DRMCNTRL MEMVMA NTWK);
1090 BIND T68_E2 = UPLIT(IR FCLK SPECIR DRMCNTRL NTWK);
1091
1092 BIND T68_ES = PLIT( T68_E1,
1093 T68_E2);
1094
1095
1096 BIND T69_E1 = UPLIT(IR FCLK SPECIR ACDISP DRMJ DRMCNTRL DISP NTWK);
1097
1098 BIND T69_ES = PLIT( T69_E1);
1099
1100
1101 BIND T70_E1 = UPLIT(IR SPECIR FCLK ACDISP DISP AEQLJ DRMCNTRL DRMJ NTWK);
1102 BIND T70_E2 = UPLIT(IR FCLK SPECIR AEQLJ DRMCNTRL DRMAB NTWK);
1103
1104 BIND T70_ES = PLIT( T70_E1,
1105 T70_E2);
1106
1107
1108 BIND T71_E1 = UPLIT(IR FCLK SPECIR TXXX DRMCNTRL SKIP ADEQ0 NTWK);
1109
1110 BIND T71_ES = PLIT( T71_E1);
1111
1112
1113 BIND T72_E1 = UPLIT(IR FCLK SPECIR DRMCNTRL MEMVMA NTWK);
1114
1115 BIND T72_ES = PLIT( T72_E1);
1116
1117
1118 BIND T73_E1 = UPLIT(IR FCLK SPECIR DRMCNTRL NTWK);
1119
1120 BIND T73_ES = PLIT( T73_E1);
1121
1122
1123 BIND T74_E1 = UPLIT(IR FCLK SPECIR DRMCNTRL NTWK);
1124
1125 BIND T74_ES = PLIT( T74_E1);
1126
1127
1128 BIND T75_E1 = UPLIT(IR FCLK SPECIR DRMAB DISP NTWK);
1129
1130 BIND T75_ES = PLIT( T75_E1);
1131
1132
1133 BIND T76_E1 = UPLIT(IR FCLK SPECIR DRMAB DISP NTWK);
1134
1135 BIND T76_ES = PLIT( T76_E1);
1136 GLOBAL BIND ES_TBL = UPLIT( T1_ES,
1137 T2_ES,
1138 T3_ES,
1139 T4_ES,
1140 T5_ES,
1141 T6_ES,
1142 T7_ES,
1143 T8_ES,
1144 T9_ES,
1145 T10_ES,
1146 T11_ES,
1147 T12_ES,
1148 T13_ES,
1149 T14_ES,
1150 T15_ES,
1151 T16_ES,
1152 T17_ES,
1153 T18_ES,
1154 T19_ES,
1155 T20_ES,
1156 T21_ES,
1157 T22_ES,
1158 T23_ES,
1159 T24_ES,
1160 T25_ES,
1161 T26_ES,
1162 T27_ES,
1163 T28_ES,
1164 T29_ES,
1165 T30_ES,
1166 T31_ES,
1167 T32_ES,
1168 T33_ES,
1169 T34_ES,
1170 T35_ES,
1171 T36_ES,
1172 T37_ES,
1173 T38_ES,
1174 T39_ES,
1175 T40_ES,
1176 T41_ES,
1177 T42_ES,
1178 T43_ES,
1179 T44_ES,
1180 T45_ES,
1181 T46_ES,
1182 T47_ES,
1183 T48_ES,
1184 T49_ES,
1185 T50_ES,
1186 T51_ES,
1187 T52_ES,
1188 T53_ES,
1189 T54_ES,
1190 T55_ES,
1191 T56_ES,
1192 T57_ES,
1193 T58_ES,
1194 T59_ES,
1195 T60_ES,
1196 T61_ES,
1197 T62_ES,
1198 T63_ES,
1199 T64_ES,
1200 T65_ES,
1201 T66_ES,
1202 T67_ES,
1203 T68_ES,
1204 T69_ES,
1205 T70_ES,
1206 T71_ES,
1207 T72_ES,
1208 T73_ES,
1209 T74_ES,
1210 T75_ES,
1211 T76_ES);
1212
1213 GLOBAL BIND NES_TBL = UPLIT( 0,
1214 0,
1215 0,
1216 0,
1217 T5_NES,
1218 0,
1219 0,
1220 0,
1221 0,
1222 0,
1223 0,
1224 0,
1225 0,
1226 0,
1227 0,
1228 0,
1229 0,
1230 0,
1231 0,
1232 0,
1233 0,
1234 T22_NES,
1235 0,
1236 T24_NES,
1237 T25_NES,
1238 0,
1239 T27_NES,
1240 T28_NES,
1241 0,
1242 T30_NES,
1243 T31_NES,
1244 T32_NES,
1245 0,
1246 T34_NES,
1247 T35_NES,
1248 T36_NES,
1249 T37_NES,
1250 0,
1251 T39_NES,
1252 T40_NES,
1253 T41_NES,
1254 T42_NES,
1255 T43_NES,
1256 T44_NES,
1257 T45_NES,
1258 T46_NES,
1259 T47_NES,
1260 0,
1261 T49_NES,
1262 T50_NES,
1263 T51_NES,
1264 T52_NES,
1265 0,
1266 0,
1267 T55_NES,
1268 T56_NES,
1269 T57_NES,
1270 T58_NES,
1271 T59_NES,
1272 T60_NES,
1273 T61_NES,
1274 T62_NES,
1275 0,
1276 0,
1277 0,
1278 0,
1279 0,
1280 0,
1281 0,
1282 0,
1283 0,
1284 0,
1285 0,
1286 0,
1287 0,
1288 0);
1289
1290 EXTERNAL ROUTINE
1291 TST1,
1292 TST2,
1293 TST3,
1294 TST4,
1295 TST5,
1296 TST6,
1297 TST7,
1298 TST8,
1299 TST9,
1300 TST10,
1301 TST11,
1302 TST12,
1303 TST13,
1304 TST14,
1305 TST15,
1306 TST16,
1307 TST17,
1308 TST18,
1309 TST19,
1310 TST20,
1311 TST21,
1312 TST22,
1313 TST23,
1314 TST24,
1315 TST25,
1316 TST26,
1317 TST27,
1318 TST28,
1319 TST29,
1320 TST30,
1321 TST31,
1322 TST32,
1323 TST33,
1324 TST34,
1325 TST35,
1326 TST36,
1327 TST37,
1328 TST38,
1329 TST39,
1330 TST40,
1331 TST41,
1332 TST42,
1333 TST43,
1334 TST44,
1335 TST45,
1336 TST46,
1337 TST47,
1338 TST48,
1339 TST49,
1340 TST50,
1341 TST51,
1342 TST52,
1343 TST53,
1344 TST54,
1345 TST55,
1346 TST56,
1347 TST57,
1348 TST58,
1349 TST59,
1350 TST60,
1351 TST61,
1352 TST62,
1353 TST63,
1354 TST64,
1355 TST65,
1356 TST66,
1357 TST67,
1358 TST68,
1359 TST69,
1360 TST70,
1361 TST71,
1362 TST72,
1363 TST73,
1364 TST74,
1365 TST75,
1366 TST76;
1367
1368
1369 GLOBAL BIND TEST_DISP = PLIT( TST1,
1370 TST2,
1371 TST3,
1372 TST4,
1373 TST5,
1374 TST6,
1375 TST7,
1376 TST8,
1377 TST9,
1378 TST10,
1379 TST11,
1380 TST12,
1381 TST13,
1382 TST14,
1383 TST15,
1384 TST16,
1385 TST17,
1386 TST18,
1387 TST19,
1388 TST20,
1389 TST21,
1390 TST22,
1391 TST23,
1392 TST24,
1393 TST25,
1394 TST26,
1395 TST27,
1396 TST28,
1397 TST29,
1398 TST30,
1399 TST31,
1400 TST32,
1401 TST33,
1402 TST34,
1403 TST35,
1404 TST36,
1405 TST37,
1406 TST38,
1407 TST39,
1408 TST40,
1409 TST41,
1410 TST42,
1411 TST43,
1412 TST44,
1413 TST45,
1414 TST46,
1415 TST47,
1416 TST48,
1417 TST49,
1418 TST50,
1419 TST51,
1420 TST52,
1421 TST53,
1422 TST54,
1423 TST55,
1424 TST56,
1425 TST57,
1426 TST58,
1427 TST59,
1428 TST60,
1429 TST61,
1430 TST62,
1431 TST63,
1432 TST64,
1433 TST65,
1434 TST66,
1435 TST67,
1436 TST68,
1437 TST69,
1438 TST70,
1439 TST71,
1440 TST72,
1441 TST73,
1442 TST74,
1443 TST75,
1444 TST76);
1445 GLOBAL LITERAL MAXTEST = 76;
1446
1447 GLOBAL
1448 TESTS_FAILED: BITVECTOR[MAXTEST];
1449
1450 GLOBAL
1451 NET_FAULTS: BITVECTOR[MAXNETS];
1452
1453 END
1454 ELUDOM
A 101# 612 615 620 621 636 639 641 681 683 688 689
690 693 741 742 743 745 746 747 750 751 752 768
769 770 771 772 773 775 776 777 778 793 794 795
796 797 798 799 800 801 802 803 805 806 857
AC0 128# 866 867 870
ACALU 150# 999 1001
ACBLK 152# 956 964 966 976 990 1001
ACDISP 136# 1022 1023 1041 1042 1060 1071 1072 1096 1101
ACLK 93#
ADEQ0 80# 309 527 529 567 930 944 949 956 966 976 984
990 1001 1015 1016 1026 1045 1108
AEQLJ 163# 1023 1042 1061 1073 1101 1102
ANDPI 88# 587 588 589 605
B 102# 612 615 620 636 639 681 683 688 689 690 693
741 742 743 745 746 747 750 751 752 768 769 770
772 773 775 776 777 793 794 795 796 797 798 799
800 801 802 803 805 806 857
BCLK 94# 559 560 580 581 587 589 596 598 605 898 899
900 901 912 913 914 915 916 930 931 937 938 944
949 956 963 964 966 974 976 984 990 999 1001
BITE 78# 536
BLISS36 4
C 103# 612 620 629 635 681 690 745 747 750 752 768
770 775 777 793 794 795 796 797 798 799 800 801
802 803 805 806 857
CCLK 95# 559 560 573 574 580 581 587 589 605 859 974
976 984
D 104# 612 615 620 681 688 690 693 745 746 747 750
751 752 768 769 770 772 775 776 777 793 794 795
796 799 800 801 802 805 806 857
DATA_EDIT 52#
DATA_VERSION 51#
DBMDBUS 70# 324 325 331 336 341 346 351 356 357 363 368
373 378 383 388 393 398 403 408 413 446 447 448
449 450 451 452 453 454 455 456 457 458 459 460
461 483 484 485 486 487 488 489 490 491 492 493
494 495 496 497 498 552
DBUSPEL 141# 897 898 900 913 937
DBUSPER 140# 896 898 899 912 937
DBUSPL 143# 543 900 913 915 937
DBUSPR 142# 544 899 912 914 937
DBUSSEL 133# 324 331 336 341 346 351 356 357 363 368 373
378 383 388 393 398 403 408 413 446 447 448 449
450 451 452 453 454 455 456 457 458 459 460 461
483 484 485 486 487 488 489 490 491 492 493 494
495 496 497 498 541 542 543 544 552
DBUS_NAME 177# 194 195 196 197
DISP 65# 566 567 1022 1023 1024 1025 1041 1042 1043 1044 1060
1061 1062 1063 1071 1072 1073 1074 1075 1096 1101 1128 1133
DISP_NAME 178# 189 190
DPCLKS 75# 319 324 331 336 341 346 351 356 357 363 368
373 378 383 388 393 398 403 408 439 440 446 447
448 449 450 451 452 453 454 455 456 457 458 459
460 461 483 484 485 486 487 488 489 490 491 492
493 494 495 496 497 498
DPCRY1 92# 413 414
DPDBUS 69# 552 553 912 913 914 915
DPPE 146# 911 912 913 914 915 916
DPSCFLG 76# 446 447 460 461
DRMAB 134# 1024 1025 1043 1044 1061 1062 1063 1073 1074 1075 1102
1128 1133
DRMCNTRL 81# 1022 1023 1026 1027 1028 1029 1041 1042 1045 1046 1047
1048 1060 1061 1071 1072 1073 1084 1089 1090 1096 1101 1102
1108 1113 1118 1123
DRMJ 135# 1022 1023 1041 1042 1060 1071 1072 1096 1101
E 105# 612 636 681 683 690 741 745 750 768 775 793
795 799 801 805
ES_TBL 1136#
F 106# 636 637 638 639 680 681 682 683 684 685 686
687 688 689 690 691 692 693
FCLK 96# 611 612 613 614 615 616 617 618 619 620 621
622 636 637 638 639 640 641 642 679 680 681 683
684 685 686 687 688 689 690 691 692 693 712 713
714 715 716 717 718 719 720 721 722 723 724 741
742 743 744 745 746 747 748 749 750 751 752 768
769 770 771 772 773 774 775 776 777 778 793 794
795 796 797 798 799 800 801 802 803 804 805 806
824 825 826 827 828 829 830 831 832 833 834 835
836 837 838 857 858 859 866 867 868 869 870 871
954 956 999 1001 1022 1023 1024 1025 1026 1027 1028 1029
1041 1042 1043 1044 1045 1046 1047 1048 1060 1061 1062 1063
1071 1072 1073 1074 1075 1084 1089 1090 1096 1101 1102 1108
1113 1118 1123 1128 1133
G 107# 612 613 614 615 616 617 618 620 621 622 623
624 625 628 629 630 631 632 633 634 635 636 637
638 639 640 641 681 682 683 684 685 686 687 688
689 690 691 692 693 712 713 716 717 721 722 723
741 742 743 745 746 747 748 750 751 752 768 769
770 771 775 776 777 778 793 794 795 796 799 800
801 802 803 805 824 825 826 827 828 829 830 831
832 833 834 835 836 838 857
H 108# 612 615 621 622 623 629 632 636 639 681 683
688 689 748 768 769 771 775 776 778 793 795 799
801 805
HCLK 97# 446 447 460 461 462 954 956 963 964 966 974
976 1001
I 109# 612 615 620 621 636 639 641 681 683 688 689
690 741 742 743 745 746 747 750 751 752 768 769
770 771 772 773 775 776 777 778 793 794 795 796
797 798 799 800 801 802 803 805 806 857
IR 132# 680 683 685 687 689 690 691 692 693 716 717
718 719 721 722 723 724 745 746 750 751 866 867
870 871 956 1001 1022 1023 1024 1025 1026 1027 1028 1029
1041 1042 1043 1044 1045 1046 1047 1048 1060 1061 1062 1063
1071 1072 1073 1074 1075 1084 1089 1090 1096 1101 1102 1108
1113 1118 1123 1128 1133
J 110# 613 614 616 637 638 684 685 686 687 691 692
712 713 714 716 717 718 721 722 723
JRST0 130# 866 870 871
K 111# 613 637 684 685 687 691 712 716 721
L 112# 613 614 616 624 630 631 633 637 638 684 685
686 687 716 717 721 722 723
LANGUAGE 4
M 113# 614 631 638 686 687 692 713 717 722
M2901S 66# 309 314 319 324 331 336 341 346 351 356 357
363 368 373 378 383 388 393 398 403 408 413 439
446 447 448 449 450 451 452 453 454 455 456 457
458 459 460 461 483 484 485 486 487 488 489 490
491 492 493 494 495 496 497 498
M2902S 74# 378 383 388 413 420 421 426 427 460 461 518
519
MAXNETS 53# 1451
MAXTEST 1445# 1448
MDISP 64# 298 299 300 301
MEMVMA 67# 314 319 324 331 336 341 346 351 356 357 363
368 373 378 383 388 393 398 403 408 439 446 447
448 449 450 451 452 453 454 455 456 457 458 459
460 461 483 484 485 486 487 488 489 490 491 492
493 494 495 496 497 498 1027 1046 1084 1089 1113
MSDPED 3#
MSKIP 62# 298
N 114# 615 639 688 689 693 742 746 751 769 776
NES_TBL 1213#
NET_FAULTS 1451
NET_NAMES 187#
NTWK 169# 298 299 300 301 309 314 319 324 325 331 336
341 346 351 356 357 363 368 373 378 383 388 393
398 403 408 413 414 420 421 422 423 424 425 426
427 439 440 446 447 448 449 450 451 452 453 454
455 456 457 458 459 460 461 462 483 484 485 486
487 488 489 490 491 492 493 494 495 496 497 498
518 519 520 527 528 529 536 541 542 543 544 552
553 559 560 566 567 573 574 580 581 587 588 589
596 597 598 605 610 611 612 613 614 615 616 617
618 619 620 621 622 623 624 625 626 627 628 629
630 631 632 633 634 635 636 637 638 639 640 641
642 679 680 681 682 683 684 685 686 687 688 689
690 691 692 693 712 713 714 715 716 717 718 719
720 721 722 723 724 741 742 743 744 745 746 747
748 749 750 751 752 768 769 770 771 772 773 774
775 776 777 778 793 794 795 796 797 798 799 800
801 802 803 804 805 806 824 825 826 827 828 829
830 831 832 833 834 835 836 837 838 857 858 859
866 867 868 869 870 871 881 882 883 884 885 886
896 897 898 899 900 901 911 912 913 914 915 916
917 918 930 931 937 938 944 949 954 955 956 963
964 965 966 974 975 976 983 984 990 991 992 999
1000 1001 1008 1009 1015 1016 1022 1023 1024 1025 1026 1027
1028 1029 1041 1042 1043 1044 1045 1046 1047 1048 1060 1061
1062 1063 1071 1072 1073 1074 1075 1084 1089 1090 1096 1101
1102 1108 1113 1118 1123 1128 1133
O 115# 616 714 718 723
ORPI 87# 580 587 589 605
P 116# 616 714 723
PCDBUS 71# 541 559 580 587 610 612 613 614 615 616 617
618 619 620 621 622 636 637 638 639 640 641 642
690 691 692 693 712 713 714 715 716 717 718 719
721 722 723 724 741 742 743 744 745 746 747 748
750 751 752 768 769 770 771 772 773 775 776 777
778 793 794 795 796 797 798 799 800 801 802 803
805 806 824 825 826 827 828 829 830 831 832 833
834 835 836 838
PE 144# 543 544 898 899 900 901 912 913 914 915 916
937
PIACTV 86# 587 588 589 605
PIBUS 82# 573 574 587 857 858
PICURNT 84# 596 605
PIENC 91# 605
PINEW 83# 580 587 605
PIREQ 89# 587
PISOFT 85# 580 581 587 589 605
PWRITE 145# 912 913 914 915 916 917 918
Q 117# 617 618 619 622 640 715 719 724 744 748 824
825 826 827 828 829 830 831 832 833 834 835 836
838 857
R 118# 617 625 824 825 827 828 830 834 835
RAM 147# 930 931 937 944 949 956 966 976 984 990 1001
1015
RAMADRS 151# 937 944 949 956 966 976 984 990 1001 1015
RAMDBUS 72# 930 931 937 944 949 955 956 965 966 975 976
983 984 990 992 1000 1001 1015
RAMPAR 77# 937 938
RAMSEL 149# 937 944 949 956 966 976 984 990 991 1001
RAMWRITE 148# 930 931 937 938 944 949 956 966 976 984 990
1001 1015 1016
S 119# 618 626 634 640 642 824 825 826 827 828 829
830 831 832 833 834 835 836 838
SHIFT 73# 341 346 351 357 363 368 373 378 383 388 393
398 403 408 413 446 447 448 449 450 451 452 453
454 455 456 457 458 459 460 461 483 484 485 486
487 488 489 490 491 492 493 494 495 496 497 498
SKIP 63# 413 420 421 422 423 424 425 426 427 528 605
680 681 682 683 684 685 686 687 688 689 867 881
882 883 884 885 886 1026 1045 1108
SKIP_NAME 176# 187 188
SPEC18CRY 153# 378 383 388 518 519 520
SPEC20_NAME 181# 286 287 288
SPEC40_NAME 180# 279 280 281 282 283 284 285
SPECAC 159# 954 956 963 964 966 974 976 999 1001
SPECAPR 162# 573 587 857 858 859
SPECASH 156# 793 794 795 796 797 798 799 800 801 802 803
804 805 806
SPECEXP 157# 768 769 770 771 772 773 774 775 776 777 778
SPECIR 154# 679 680 683 685 687 689 690 691 692 693 716
717 718 719 720 721 722 723 724 745 746 749 750
751 866 867 870 871 954 956 999 1001 1022 1023 1024
1025 1026 1027 1028 1029 1041 1042 1043 1044 1045 1046 1047
1048 1060 1061 1062 1063 1071 1072 1073 1074 1075 1084 1089
1090 1096 1101 1102 1108 1113 1118 1123 1128 1133
SPECPC 158# 611 612 613 614 615 616 617 618 619 620 621
622 636 637 639 640 641 679 680 681 683 684 685
686 687 688 689 690 691 692 693 712 713 714 715
716 717 718 719 720 721 722 723 724 741 742 743
744 745 746 747 748 749 750 751 752 768 769 770
771 772 773 774 775 776 777 778 793 794 795 796
797 798 799 800 801 802 803 804 805 806 824 825
826 827 828 829 830 831 832 833 834 835 836 837
838 857 858 859
SPECPI 155# 580 587 596 598 605
SPECSWEEP 161# 1008 1009 1015
SPECXR 160# 866 868 869 963 964 966
SWPVMA 68# 1008 1009 1015
T 120# 834 835 836
T10_ES 353# 1145
T10_E1 351# 353
T11_ES 359# 1146
T11_E1 356# 359
T11_E2 357# 360
T12_ES 365# 1147
T12_E1 363# 365
T13_ES 370# 1148
T13_E1 368# 370
T14_ES 375# 1149
T14_E1 373# 375
T15_ES 380# 1150
T15_E1 378# 380
T16_ES 385# 1151
T16_E1 383# 385
T17_ES 390# 1152
T17_E1 388# 390
T18_ES 395# 1153
T18_E1 393# 395
T19_ES 400# 1154
T19_E1 398# 400
T1_E1 298# 303
T1_E2 299# 304
T1_E3 300# 305
T1_E4 301# 306
T1_ES 303# 1136
T20_ES 405# 1155
T20_E1 403# 405
T21_ES 410# 1156
T21_E1 408# 410
T22_ES 416# 1157
T22_E1 413# 416
T22_NE1 414# 417
T22_NES 417# 1234
T23_ES 429# 1158
T23_E1 420# 429
T23_E2 421# 430
T23_E3 422# 431
T23_E4 423# 432
T23_E5 424# 433
T23_E6 425# 434
T23_E7 426# 435
T23_E8 427# 436
T24_ES 442# 1159
T24_E1 439# 442
T24_NE1 440# 443
T24_NES 443# 1236
T25_ES 464# 1160
T25_E1 446# 464
T25_E10 455# 473
T25_E11 456# 474
T25_E12 457# 475
T25_E13 458# 476
T25_E14 459# 477
T25_E15 460# 478
T25_E16 461# 479
T25_E2 447# 465
T25_E3 448# 466
T25_E4 449# 467
T25_E5 450# 468
T25_E6 451# 469
T25_E7 452# 470
T25_E8 453# 471
T25_E9 454# 472
T25_NE1 462# 480
T25_NES 480# 1237
T26_ES 500# 1161
T26_E1 483# 500
T26_E10 492# 509
T26_E11 493# 510
T26_E12 494# 511
T26_E13 495# 512
T26_E14 496# 513
T26_E15 497# 514
T26_E16 498# 515
T26_E2 484# 501
T26_E3 485# 502
T26_E4 486# 503
T26_E5 487# 504
T26_E6 488# 505
T26_E7 489# 506
T26_E8 490# 507
T26_E9 491# 508
T27_ES 522# 1162
T27_E1 518# 522
T27_E2 519# 523
T27_NE1 520# 524
T27_NES 524# 1239
T28_ES 531# 1163
T28_E1 528# 531
T28_E2 529# 532
T28_NE1 527# 533
T28_NES 533# 1240
T29_ES 538# 1164
T29_E1 536# 538
T2_E1 309# 311
T2_ES 311# 1137
T30_ES 546# 1165
T30_E1 541# 546
T30_E2 543# 547
T30_E3 544# 548
T30_NE1 542# 549
T30_NES 549# 1242
T31_ES 555# 1166
T31_E1 552# 555
T31_NE1 553# 556
T31_NES 556# 1243
T32_ES 562# 1167
T32_E1 559# 562
T32_NE1 560# 563
T32_NES 563# 1244
T33_ES 569# 1168
T33_E1 566# 569
T33_E2 567# 570
T34_ES 576# 1169
T34_E1 573# 576
T34_NE1 574# 577
T34_NES 577# 1246
T35_ES 583# 1170
T35_E1 580# 583
T35_NE1 581# 584
T35_NES 584# 1247
T36_ES 591# 1171
T36_E1 587# 591
T36_NE1 588# 592
T36_NE2 589# 593
T36_NES 592# 1248
T37_ES 600# 1172
T37_E1 596# 600
T37_E2 597# 601
T37_NE1 598# 602
T37_NES 602# 1249
T38_ES 607# 1173
T38_E1 605# 607
T39_ES 644# 1174
T39_E1 612# 644
T39_E10 621# 653
T39_E11 622# 654
T39_E12 623# 655
T39_E13 624# 656
T39_E14 625# 657
T39_E15 626# 658
T39_E16 627# 659
T39_E17 628# 660
T39_E18 629# 661
T39_E19 630# 662
T39_E2 613# 645
T39_E20 631# 663
T39_E21 632# 664
T39_E22 633# 665
T39_E23 634# 666
T39_E24 635# 667
T39_E25 636# 668
T39_E26 637# 669
T39_E27 638# 670
T39_E28 639# 671
T39_E29 640# 672
T39_E3 614# 646
T39_E30 641# 673
T39_E31 642# 674
T39_E4 615# 647
T39_E5 616# 648
T39_E6 617# 649
T39_E7 618# 650
T39_E8 619# 651
T39_E9 620# 652
T39_NE1 610# 675
T39_NE2 611# 676
T39_NES 675# 1251
T3_E1 314# 316
T3_ES 316# 1138
T40_ES 695# 1175
T40_E1 680# 695
T40_E10 689# 704
T40_E11 690# 705
T40_E12 691# 706
T40_E13 692# 707
T40_E14 693# 708
T40_E2 681# 696
T40_E3 682# 697
T40_E4 683# 698
T40_E5 684# 699
T40_E6 685# 700
T40_E7 686# 701
T40_E8 687# 702
T40_E9 688# 703
T40_NE1 679# 709
T40_NES 709# 1252
T41_ES 726# 1176
T41_E1 712# 726
T41_E10 722# 735
T41_E11 723# 736
T41_E12 724# 737
T41_E2 713# 727
T41_E3 714# 728
T41_E4 715# 729
T41_E5 716# 730
T41_E6 717# 731
T41_E7 718# 732
T41_E8 719# 733
T41_E9 721# 734
T41_NE1 720# 738
T41_NES 738# 1253
T42_ES 754# 1177
T42_E1 741# 754
T42_E10 751# 763
T42_E11 752# 764
T42_E2 742# 755
T42_E3 743# 756
T42_E4 744# 757
T42_E5 745# 758
T42_E6 746# 759
T42_E7 747# 760
T42_E8 748# 761
T42_E9 750# 762
T42_NE1 749# 765
T42_NES 765# 1254
T43_ES 780# 1178
T43_E1 768# 780
T43_E10 778# 789
T43_E2 769# 781
T43_E3 770# 782
T43_E4 771# 783
T43_E5 772# 784
T43_E6 773# 785
T43_E7 775# 786
T43_E8 776# 787
T43_E9 777# 788
T43_NE1 774# 790
T43_NES 790# 1255
T44_ES 808# 1179
T44_E1 793# 808
T44_E10 802# 817
T44_E11 803# 818
T44_E12 805# 819
T44_E13 806# 820
T44_E2 794# 809
T44_E3 795# 810
T44_E4 796# 811
T44_E5 797# 812
T44_E6 798# 813
T44_E7 799# 814
T44_E8 800# 815
T44_E9 801# 816
T44_NE1 804# 821
T44_NES 821# 1256
T45_ES 840# 1180
T45_E1 824# 840
T45_E10 833# 849
T45_E11 834# 850
T45_E12 835# 851
T45_E13 836# 852
T45_E14 838# 853
T45_E2 825# 841
T45_E3 826# 842
T45_E4 827# 843
T45_E5 828# 844
T45_E6 829# 845
T45_E7 830# 846
T45_E8 831# 847
T45_E9 832# 848
T45_NE1 837# 854
T45_NES 854# 1257
T46_ES 861# 1181
T46_E1 857# 861
T46_E2 858# 862
T46_NE1 859# 863
T46_NES 863# 1258
T47_ES 873# 1182
T47_E1 867# 873
T47_E2 868# 874
T47_E3 869# 875
T47_E4 870# 876
T47_E5 871# 877
T47_NE1 866# 878
T47_NES 878# 1259
T48_ES 888# 1183
T48_E1 881# 888
T48_E2 882# 889
T48_E3 883# 890
T48_E4 884# 891
T48_E5 885# 892
T48_E6 886# 893
T49_ES 903# 1184
T49_E1 899# 903
T49_E2 900# 904
T49_E3 901# 905
T49_NE1 896# 906
T49_NE2 897# 907
T49_NE3 898# 908
T49_NES 906# 1261
T4_E1 319# 321
T4_ES 321# 1139
T50_ES 920# 1185
T50_E1 912# 920
T50_E2 913# 921
T50_E3 914# 922
T50_E4 915# 923
T50_E5 916# 924
T50_E6 918# 925
T50_NE1 911# 926
T50_NE2 917# 927
T50_NES 926# 1262
T51_ES 933# 1186
T51_E1 930# 933
T51_NE1 931# 934
T51_NES 934# 1263
T52_ES 940# 1187
T52_E1 937# 940
T52_NE1 938# 941
T52_NES 941# 1264
T53_ES 946# 1188
T53_E1 944# 946
T54_ES 951# 1189
T54_E1 949# 951
T55_ES 958# 1190
T55_E1 956# 958
T55_NE1 954# 959
T55_NE2 955# 960
T55_NES 959# 1267
T56_ES 968# 1191
T56_E1 966# 968
T56_NE1 963# 969
T56_NE2 964# 970
T56_NE3 965# 971
T56_NES 969# 1268
T57_ES 978# 1192
T57_E1 976# 978
T57_NE1 974# 979
T57_NE2 975# 980
T57_NES 979# 1269
T58_ES 986# 1193
T58_E1 984# 986
T58_NE1 983# 987
T58_NES 987# 1270
T59_ES 994# 1194
T59_E1 990# 994
T59_NE1 991# 995
T59_NE2 992# 996
T59_NES 995# 1271
T5_E1 324# 327
T5_ES 327# 1140
T5_NES 328# 1217
T5_NE1 325# 328
T60_ES 1003# 1195
T60_E1 1001# 1003
T60_NE1 999# 1004
T60_NE2 1000# 1005
T60_NES 1004# 1272
T61_ES 1011# 1196
T61_E1 1008# 1011
T61_NE1 1009# 1012
T61_NES 1012# 1273
T62_ES 1018# 1197
T62_E1 1015# 1018
T62_NE1 1016# 1019
T62_NES 1019# 1274
T63_ES 1031# 1198
T63_E1 1022# 1031
T63_E2 1023# 1032
T63_E3 1024# 1033
T63_E4 1025# 1034
T63_E5 1026# 1035
T63_E6 1027# 1036
T63_E7 1028# 1037
T63_E8 1029# 1038
T64_ES 1050# 1199
T64_E1 1041# 1050
T64_E2 1042# 1051
T64_E3 1043# 1052
T64_E4 1044# 1053
T64_E5 1045# 1054
T64_E6 1046# 1055
T64_E7 1047# 1056
T64_E8 1048# 1057
T65_ES 1065# 1200
T65_E1 1060# 1065
T65_E2 1061# 1066
T65_E3 1062# 1067
T65_E4 1063# 1068
T66_ES 1077# 1201
T66_E1 1071# 1077
T66_E2 1072# 1078
T66_E3 1073# 1079
T66_E4 1074# 1080
T66_E5 1075# 1081
T67_ES 1086# 1202
T67_E1 1084# 1086
T68_ES 1092# 1203
T68_E1 1089# 1092
T68_E2 1090# 1093
T69_ES 1098# 1204
T69_E1 1096# 1098
T6_E1 331# 333
T6_ES 333# 1141
T70_ES 1104# 1205
T70_E1 1101# 1104
T70_E2 1102# 1105
T71_ES 1110# 1206
T71_E1 1108# 1110
T72_ES 1115# 1207
T72_E1 1113# 1115
T73_ES 1120# 1208
T73_E1 1118# 1120
T74_ES 1125# 1209
T74_E1 1123# 1125
T75_ES 1130# 1210
T75_E1 1128# 1130
T76_ES 1135# 1211
T76_E1 1133# 1135
T7_E1 336# 338
T7_ES 338# 1142
T8_E1 341# 343
T8_ES 343# 1143
T9_E1 346# 348
T9_ES 348# 1144
TBVMACPY 79# 559 560 944 949 956 966 976 984 990 1001
TESTS_FAILED 1448
TEST_DISP 1369#
TEXT 173
TRAP 127# 857 858 859
TRNCVR 90# 596 597 598
TST1 1291* 1369
TST10 1300 1378
TST11 1301 1379
TST12 1302 1380
TST13 1303 1381
TST14 1304 1382
TST15 1305 1383
TST16 1306 1384
TST17 1307 1385
TST18 1308 1386
TST19 1309 1387
TST2 1292 1370
TST20 1310 1388
TST21 1311 1389
TST22 1312 1390
TST23 1313 1391
TST24 1314 1392
TST25 1315 1393
TST26 1316 1394
TST27 1317 1395
TST28 1318 1396
TST29 1319 1397
TST3 1293 1371
TST30 1320 1398
TST31 1321 1399
TST32 1322 1400
TST33 1323 1401
TST34 1324 1402
TST35 1325 1403
TST36 1326 1404
TST37 1327 1405
TST38 1328 1406
TST39 1329 1407
TST4 1294 1372
TST40 1330 1408
TST41 1331 1409
TST42 1332 1410
TST43 1333 1411
TST44 1334 1412
TST45 1335 1413
TST46 1336 1414
TST47 1337 1415
TST48 1338 1416
TST49 1339 1417
TST5 1295 1373
TST50 1340 1418
TST51 1341 1419
TST52 1342 1420
TST53 1343 1421
TST54 1344 1422
TST55 1345 1423
TST56 1346 1424
TST57 1347 1425
TST58 1348 1426
TST59 1349 1427
TST6 1296 1374
TST60 1350 1428
TST61 1351 1429
TST62 1352 1430
TST63 1353 1431
TST64 1354 1432
TST65 1355 1433
TST66 1356 1434
TST67 1357 1435
TST68 1358 1436
TST69 1359 1437
TST7 1297 1375
TST70 1360 1438
TST71 1361 1439
TST72 1362 1440
TST73 1363 1441
TST74 1364 1442
TST75 1365 1443
TST76 1366 1444
TST8 1298 1376
TST9 1299 1377
TXXX 164# 1026 1045 1108
U 121# 620 628 635 641 743 747 752 770 777 794 796
800 802 806 857
UPAZ 173# 176 177 178 179 180 181 191 198 199 200 201
202 203 204 205 206 207 208 209 210 211 212 213
214 215 216 217 218 219 220 221 222 227 228 229
230 231 232 233 234 235 236 237 238 239 240 241
242 243 244 245 246 247 248 249 250 251 252 253
254 255 256 257 258 259 260 261 262 266 267 268
269 270 271 272 273 274 275 276 277 278 289 290
V 122# 619 627 715 719 724 857
VMA_NAME 179# 192 193
W 123# 621 771 773 778
W_0 62 63 64 65 66 67 68 69 70 71 72 73
74 75 76 77 78 79 80 81 82 83 84 85
86 87 88 89 90 91 92 93 94 95 96 97
169 170 294#
W_1 101 102 103 104 105 106 107 108 109 110 111 112
113 114 115 116 117 118 119 120 121 122 123 124
125 126 127 128 129 130 131 132 133 134 135 136
169 171 295#
W_2 140 141 142 143 144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159 160 161 162 163
164 169 172 296#
X 124# 622 744 748
XR 131# 868 869 966
XR0 129# 866 868
Y 125# 793 794 795 796 797 798 803 805 806
Z 126# 642 768 769 770 771 772 773 775 776 777 778
793 794 795 796 797 798 799 800 801 802 803 805
806 831 832
TIME: 5 SEC.
CORE: 15K