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MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 1
MCOD4T MAC 17-Oct-88 14:28 DATA PATH TEST - PART 1
1 XLIST
2 LIST
3
4
5
6
7 TITLE MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1
8
9
10
11
12
13 ^
14
15
16
17
18 COMMENT $
19
20 MCODE4 IS THE 1ST PART OF A 4 PART MICRODIAGNOSTIC OF THE HIGH SPEED
21 DATA PATH. IT IS MAINLY A LOGIC TEST (AS OPPOSED TO A FUNCTIONAL TEST)
22 WHICH DOES THE FOLLOWING:
23
24 (1) TESTS THE READING AND WRITING OF THE CONTROL AND STATUS REGISTERS.
25 (2) VERIFIES THE DATA FORMATTER CONTROL ROM CONTENTS.
26 (3) TESTS THE HANDSHAKING LOGIC BETWEEN THE DATA PATH AND THE
27 MASSBUS AND CHANNEL BUS INTERFACES.
28 (4) TESTS THE MAJORITY OF THE DATA FORMATTER CONTROL LOGIC.
29
30 THE TESTS ARE INDEPENDENT OF THE MASSBUS AND CHANNEL BUS INTERFACES,
31 EXCEPT FOR THE "FMTR END XFER", "RUN DATA", AND "MSTR END XFER" TESTS,
32 WHICH REQUIRE THE GENERATION OF "SLVE WOR END XFER" ON THE CB BOARD.
33
34 ALL TESTS WHICH INVOLVE THE BASE CLOCK OR THE CLOCK PHASES ARE EXECUTED
35 IN SINGLE STEPPING MODE TO ALLOW EXAMINATION OF SIGNAL STATES DURING THE TEST.
36
37 NOTE: ALL DOCUMENTATION USES THE TERM "SET" TO DENOTE THE ASSERTION OF A
38 SIGNAL AND "CLEAR" TO DENOTE ITS NEGATION, WHETHER OR NOT THE SIGNAL
39 IS ASSERTED HIGH OR LOW.
40
41 $
42 000100 RPTCNT= 100 ;SET REPEAT COUNT TO 100 TIMES
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 2
MCOD4T MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
43 SUBTTL DATA PATH BIT REGISTER DEFINITIONS
44
45 ;DEFINE THE DATA PATH REGISTERS
46
47 000000 REG0=0 ;REGISTER 0 (READ ONLY)
48 000001 REG1=1
49 000002 REG2=2
50 000003 REG3=3 ;READ ONLY
51 000004 MCLO=4 ;MASSBUS COUNTER BITS 7-0
52 000005 MCHI=5 ;MASSBUSS COUNTER BITS 15-8
53 000006 BCLO=6 ;BYTE COUNTER BITS 7-0
54 000007 BCHI=7 ;BYTE COUNTER BITS 15-8
55 000010 DFRMAD=10 ;DF ROM ADDRESS BITS 7-0
56 000011 RMDALO=11 ;DF ROM DATA BITS 7-0 (READ ONLY)
57 000012 RMDAHI=12 ;DF ROM DATA BITS 15-8 (READ ONLY)
58 000013 ARLO=13 ;ASSEMBLY REGISTER BITS 7-0
59 000014 ARHI=14 ;ASSEMBLY REGISTER BITS 15-8
60 000015 REG15=15 ;READ ONLY
61 000016 REG16=16 ;READ ONLY
62 000017 REG17=17 ;READ ONLY
63
64 000011 LDRMDA=11 ;LOAD ROM DATA PULSE (WRITE ONLY)
65 000012 CLKPLS=12 ;BASE CLOCK PULSE (WRITE ONLY)
66 000013 HSDPIN=13 ;HS DP INIT PULSE (WRITE ONLY)
67 000014 SETRUN=14 ;SET RUN PULSE (WRITE ONLY)
68
69 ;REGISTER 0
70
71 000001 UBPEFG=1B35 ;MICROBUS PARITY ERROR FLAG
72 000002 DPPEFG=1B34 ;DATA PATH PARITY ERROR FLAG
73 000004 BCOVF=1B33 ;BYTE COUNT OVERFLOW FLAG
74 000010 MCOVF=1B32 ;MASSBUS COUNTER OVERFLOW FLAG
75
76 ;REGISTER 1
77
78 000001 DXHISP=1B35 ;DX HIGH SPEED
79 000002 BCLKEN=1B34 ;BASE CLOCK ENABLE
80 000004 DSLVRQ=1B33 ;DIAGNOSTIC SLAVE REQUEST
81 000010 DMSTRQ=1B32 ;DIAGNOSTIC MASTER REQUEST
82 000020 SLVACK=1B31 ;SLAVE ACK
83 000040 MSTACK=1B30 ;MASTER ACK
84 000100 SLVRQ=1B29 ;SLAVE REQUEST
85 000200 MSTRQ=1B28 ;MASTER REQUEST
86
87 ;REGISTER 2
88
89 000001 RMADR8=1B35 ;ROM ADDR BIT 8
90 000002 SEBCOV=1B34 ;SLVE END ON BC OVFL EN
91 000004 MEMCOV=1B33 ;MSTR END ON MC OVFL EN
92 000010 MEONFE=1B32 ;MSTR END ON FMTR END EN
93 000100 SRHDOF=1B29 ;SLVE REQ HLDOFF
94 000200 MRHDOF=1B28 ;MASTER REQ HLDOFF
95
96 ;REGISTER 3
97
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 2-1
MCOD4T MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
98 000002 NSEXFR=1B34 ;NOT SLVE END XFER
99 000004 NMEXFR=1B33 ;NOT MSTR END XFER
100 000010 NFEXFR=1B32 ;NOT FMTR END XFER
101
102 ;REGISTER 4 (MASSBUS COUNTER 7-0 - MCLO)
103
104 000377 MCLOBT=377B35 ;BITS 7-0 OF MASSBUS COUNTER
105
106 ;REGISTER 5 (MASSBUS COUNTER 15-8 - MCHI)
107
108 000377 MCHIBT=377B35 ;BITS 15-8 OF MASSBUS COUNTER
109
110 ;REGISTER 6 (BYTE COUNTER 7-0 - BCLO)
111
112 000377 BCLOBT=377B35 ;BITS 7-0 OF BYTE COUNTER
113
114 ;REGISTER 7 (BYTE COUNTER 15-8 - BCHI)
115
116 000377 BCHIBT=377B35 ;BITS 15-8 OF BYTE COUNTER
117
118 ;REGISTER 10 (DF ROM ADR 7-0 - DFRMAD)
119
120 000377 RMADLO=377B35 ;BITS 7-0 OF DF ROM ADDRESS
121
122 ;REGISTER 11 (DF ROM DATA 7-0 - RMDALO)
123
124 000377 RDLOBT=377B35 ;BITS 7-0 OF DF ROM DATA
125
126 ;REGISTER 12 (DF ROM DATA 15-8 - RMDAHI)
127
128 000377 RDLOBT=377B35 ;BITS 15-8 OF DF ROM DATA
129
130 ;REGISTER 13 (ASSEMBLY REGISTER 7-0 - ARLO)
131
132 000377 ARLOBT=377B35 ;BITS 7-0 OF ASSEMBLY REGISTER
133
134 ;REGISTER 14 (ASSEMBLY REGISTER 15-8 - ARHI)
135
136 000377 ARHIBT=377B35 ;BITS 15-8 OF ASSEMBLY REGISTER
137
138 ;REGISTER 15
139
140 000003 AR1716=3B35 ;BITS 17-16 OF ASSEMBLY REGISTER
141 000004 NCLRAR=1B33 ;NOT CLEAR ASSEMBLY REG
142 000010 NENMDM=1B32 ;NOT ENABLE MUX/DEMUX
143 000020 LDCB=1B31 ;LOAD CHANNEL BUFFER
144 000040 LDSB=1B30 ;LOAD SILO BUFFER
145 000100 EXTRUN=1B29 ;EXTEND RUN
146
147 ;REGISTER 16
148
149 000001 SLVEPE=1B35 ;SLVE PARITY ERROR
150 000002 MSTRPE=1B34 ;MSTR PARITY ERROR
151 000004 NCLRN=1B33 ;NOT CLR RUN
152 000010 NOTRUN=1B32 ;NOT RUN
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 2-2
MCOD4T MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
153 000020 DFCPH0=1B31 ;DF CLK PH 0
154 000040 DFCPH1=1B30 ;DF CLK PH 1
155 000100 NRNDAT=1B29 ;NOT RUN DATA
156
157 ;REGISTER 17
158
159 000001 SLVRDY=1B35 ;SLAVE RDY
160 000002 SLRDY1=1B34 ;SLAVE RDY DLY 1
161 000004 SLRDY2=1B33 ;SLAVE RDY DLY 2
162 000010 MSTRDY=1B32 ;MASTER RDY
163 000020 MSRDY1=1B31 ;MASTER RDY DLY 1
164 000040 MSRDY2=1B30 ;MASTER RDY DLY 2
165
166 ;DEFINE SOME CHANNEL BUS INTERFACE REGISTERS WHICH ARE REFERENCED
167
168 000000 CSR0=0
169 000001 CSR1=1
170 000002 TOR0=2
171 000003 TOR1=3
172 000006 DRLO=6
173 000007 CBILO=7
174 000011 BORLO=11
175 000006 CLKDRL=6 ;WRITE TO REG 6 CLOCKS DRLO REG
176 000004 SLAK25=4 ;WRITE TO REG 4 GENERATES "SLVE ACK DL25"
177
178 ;DEFINE SOME CHANNEL BUS INTERFACE REGISTER BITS WHICH ARE USED
179
180 000001 CHANL=1B35 ;CHANNEL MODE BIT
181 000004 LOOPEN=1B33 ;LOOP ENABLE BIT
182 000010 DISACK=1B32 ;DIAG SLVE ACK
183 000040 EVPAR=1B30 ;EVEN PARITY FORCED
184 000001 STAINL=1B35 ;STA IN LOOPED BACK
185 000200 SRVINL=1B28 ;SRV IN LOOPED BACK
186 000002 CLRFLG=1B34 ;CLEARS REG 0 FLAGS
187
188 ;ROM ADDRESSES WITH DIAGNOSTIC DATA
189
190 000340 ZERADR=340 ;ADDR OF 1ST ROM LOC AFTER OPERATIONAL PROGRAMS
191 000310 DIAGAD=310 ;ADDR OF 1ST DIAG ROM LOC
192
193 000310 DMXSHF=310
194 000314 MUXSHF=314
195
196 000320 ZEROS=320
197 000321 ONES=321
198
199 000322 CC0=322
200 000327 CC1=MSK0
201 000323 CC2=323
202 000324 CC4=324
203 000325 CC5=325
204 000326 CC8=326
205
206 000327 MSK0=327
207 000330 MSK1=330
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 2-3
MCOD4T MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
208 000331 MSK2=331
209 000332 MSK3=332
210 000333 MSK4=333
211 000334 MSK5=334
212 000335 MSK6=335
213 000336 MSK7=336
214 000337 MSK8=337
215 000360 MSK1S=MSHF0
216
217 000340 DSHF0=340
218 000341 DSHF1=341
219 000342 DSHF2=342
220 000343 DSHF3=343
221 000344 DSHF4=344
222 000345 DSHF5=345
223 000346 DSHF6=346
224 000347 DSHF7=347
225 000350 DSHF10=350
226 000351 DSHF11=351
227 000352 DSHF12=352
228 000353 DSHF13=353
229 000354 DSHF14=354
230 000355 DSHF15=355
231 000356 DSHF16=356
232 000357 DSHF17=357
233
234 000360 MSHF0=360
235 000361 MSHF1=361
236 000362 MSHF2=362
237 000363 MSHF3=363
238 000364 MSHF4=364
239 000365 MSHF5=365
240 000366 MSHF6=366
241 000367 MSHF7=367
242 000370 MSHF10=370
243 000371 MSHF11=371
244 000372 MSHF12=372
245 000373 MSHF13=373
246 000374 MSHF14=374
247 000375 MSHF15=375
248 000376 MSHF16=376
249 000377 MSHF17=377
250
251 ;OPERATIONAL ROM PROGRAMS
252
253 000000 WINCM=0
254 000010 RINCMF=10
255 000027 RINCR1=27
256 000022 RINCR2=22
257 000021 RINCR3=21
258 000020 RINCR4=20
259 000030 WCDMP=30
260 000040 RCDMPF=40
261 000057 RCDMR1=57
262 000053 RCDMR2=53
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 2-4
MCOD4T MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
263 000052 RCDMR3=52
264 000051 RCDMR4=51
265 000050 RCDMR5=50
266 000060 WHIDN=60
267 000100 RHIDNF=100
268 000137 RHIDR1=137
269 000131 RHIDR2=131
270 000130 RHIDR3=130
271 000127 RHIDR4=127
272 000136 RHIDR5=136
273 000123 RHIDR6=123
274 000122 RHIDR7=122
275 000121 RHIDR8=121
276 000120 RHIDR9=120
277 000140 WASC6=140
278 000150 RASC6F=150
279 000177 RAS6R1=177
280 000176 RAS6R2=176
281 000163 RAS6R3=163
282 000162 RAS6R4=162
283 000161 RAS6R5=161
284 000160 RAS6R6=160
285 000200 WAS71=200
286 000210 RAS71F=210
287 000227 RA71R1=227
288 000223 RA71R2=223
289 000222 RA71R3=222
290 000221 RA71R4=221
291 000220 RA71R5=220
292 000230 WAS72=230
293 000240 RAS72F=240
294 000257 RA72R1=257
295 000253 RA72R2=253
296 000252 RA72R3=252
297 000251 RA72R4=251
298 000250 RA72R5=250
299 000260 WEM1=260
300 000264 REM1F=264
301 000271 REM1R1=271
302 000270 REM1R2=270
303 000274 WEM2=274
304 000300 REM2F=300
305 000305 REM2R1=305
306 000304 REM2R2=304
307 000310 WCOBOL=310
308 000320 RCOBLF=320
309 000337 RCBLR1=337
310 000332 RCBLR2=332
311 000331 RCBLR3=331
312 000330 RCBLR4=330
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 1
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
313 IF2 <PRINTX STARTING BINARY FILE>
314 SEARCH DX20CA ;READ THE CROSS ASSEMBLER
315
316 ;MASSBUS REGISTER BIT DEFINITIONS
317
318 ;STATUS & CONTROL REGISTER 1
319
320 000000 MPSCR0== 0 ;REGISTER NAME
321 000001 RUN== 1 ;RUN LINE FROM RH20
322 000002 GO== 2 ;GO BIT
323 000174 FN== 174 ;FUNCTION CODE
324 000004 F0== 4 ;FUNCTION BIT 0
325 000010 F1== 10 ;FUNCTION BIT 1
326 000020 F2== 20 ;FUNCTION BIT 2
327 000040 F3== 40 ;FUNCTION BIT 3
328 000100 F4== 100 ;FUNCTION BIT 4
329 000200 WCLK== 200 ;WRITE CLOCK LINE FROM RH20
330
331 ;STATUS AND CONTROL REGISTER 2
332
333 000001 MPSCR1== 1 ;REGISTER NAME
334 000001 DONE== 1 ;DATA TRANSFER DONE (READ)
335 000001 EBL== 1 ;SET EBL (WRITE)
336 000002 EXC== 2 ;EXCEPTION LINE FROM RH20 (READ)
337 000002 CLRGO== 2 ;SET TO CLEAR GO (WRITE)
338 000004 CMPERR== 4 ;COMPOSITE ERROR FLAG (READ)
339 000004 START== 4 ;START A DATA TRANSFER (WRITE)
340 000010 DTD== 10 ;DATA TO DEVICE
341 000020 OCC== 20 ;OCCUPIED
342 000040 ILF== 40 ;ILLEGAL FUNCTION
343 000100 MPERR== 100 ;MICRO-PROCESSOR DETECTED ERROR FLAG
344 000200 ATA== 200 ;ATTENTION
345
346 ;ERROR CODE REGISTER
347
348 000002 MPECR== 2 ;REGISTER NAME
349
350 ;DRIVE TYPE REGISTER
351
352 000003 MPDTR== 3 ;REGISTER NAME
353
354 ;HARDWARE VERSION REGISTER
355
356 000004 MPHVR== 4 ;REGISTER NAME
357
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 2
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
358 ;DATA BUFFER REGISTER 0
359
360 000005 MPDB0== 5 ;REGISTER NAME
361
362 ;DATA BUFFER REGISTER 1
363
364 000006 MPDB1== 6 ;REGISTER NAME
365
366 ;DATA BUFFER REGISTER 2
367
368 000007 MPDB2== 7 ;REGISTER NAME
369
370 000003 DB== 3 ;DATA BUFFER BITS 16 AND 17
371 000004 DBPAR== 4 ;PARITY BIT
372 000010 DBPARE== 10 ;PARITY ERROR (READ)
373 000020 DBEVEN== 20 ;DATA BUFFER EVEN PARITY CONTROL
374
375 ;GENERAL PURPOSE REGISTERS
376
377 000010 MPGP0==10 ;REGISTER NAMES
378 000011 MPGP1==11
379 000012 MPGP2==12
380 000013 MPGP3==13
381 000014 MPGP4==14
382 000015 MPGP5==15
383 000016 MPGP6==16
384 000017 MPGP7==17
385 000020 MPGP10==20
386 000021 MPGP11==21
387 000022 MPGP12==22
388 000023 MPGP13==23
389 000024 MPGP14==24
390 000025 MPGP15==25
391 000026 MPGP16==26
392 000027 MPGP17==27
393
394 ;MP STATUS REGISTER
395
396 000036 MPSTAT==36 ;REGISTER NAME
397 000001 INT0== 1 ;INTERRUPT LINE 0
398 000002 INT1== 2 ;INTERRUPT LINE 1
399 000004 INT2== 4 ;INTERRUPT LINE 2
400 000010 INT3== 10 ;INTERRUPT LINE 3
401 000020 C== 20 ;CARRY BIT
402 000040 Z== 40 ;ZERO BIT
403
404 ;I/O BANK SELECT REGISTER
405
406 000037 IOSEL==37 ;REGISTER NAME
407 000007 INADR== 7 ;INPUT BANK ADDRESS
408 000070 OUTADR== 70 ;OUTPUT BANK ADDRESS
409 000100 SPRES== 100 ;STACK POINTER RESET
410 000200 INIT== 200 ;INITIALIZE
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 3
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
411 ;THE FOLLOWING AC'S ARE USED BY THE ERROR HANDLER
412
413 ; AC7 FLAG REGISTER
414 ; AC6 REPEAT COUNTER
415 ; AC5 SAVE OF BR (DURING CALL ONLY)
416 ; AC4 SAVE OF I/O SELECT REGISTER (DURING CALL ONLY)
417 ; AC1 CORRECT DATA FOR ERRORA CALL
418 ; AC0 ACTUAL DATA FOR ERRORA AND ERRORM CALLS
419
420 ;FLAG REGISTER BITS
421
422 ; BIT 7 ERROR LOOP
423 ; BIT 6 ERROR DETECTED
424 ; BIT 5 RELIABILITY MODE
425 ; 4 - 0 LAST ERROR NUMBER
426
427 777777 777777 %TNUM== -1 ;SET TEST NUMBER TO -1 SO ENTIRE DRIVE REGISTER
428
429 000000 %REQ==0
430 IFDEF RHDATA,<%REQ==1>
431 IFDEF CUADRS,<%REQ==1>
432 ;IS LOADED WITH TEST NUMBER ON FIRST TEST
433
434 DEFINE DEFTST(PROG),<
435 DEFINE TEST(E,NAME,X<;*>),<
436
437 LALL
438 X'**********************************************************************
439 X PROG * TEST E * NAME
440 X'**********************************************************************
441 SALL
442
443 IFN <^D'E^!%TNUM>&177400,<
444 IFG %TNUM,<DATI IOSEL,AC6 ;;SAVE THE IOSEL REG>
445 LDBR 11 ;;GET DEVICE CODE FOR MASSBUS INTERFACE
446 MOVB IOSEL ;;LOAD INTO I/O SELECT REGISTER
447 LDBR ^D'E_-8 ;;GET HIGH ORDER BITS OF TEST NUMBER
448 MOVB MPGP1 ;;LOAD INTO MASSBUS REG 20
449 IFG %TNUM,< MOV AC6,BR ;;GET SAVED IOSEL REG
450 MOVB IOSEL ;;RESTORE IT>
451 >
452 LDBR ^D'E&377 ;;GET LOW ORDER BITS OF TEST NUMBER
453 GOINK TESTI ;;GO INITIALIZE TEST
454 %TNUM==^D'E ;;REMEMBER TEST NUMBER
455 %EMES==0 ;;CLEAR ERROR MESSAGE NUMBER
456 TST==TST'E ;;REMEMBER TEST PC
457 LALL
458
459 TST'E: SALL
460 >>
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 4
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
461 000200 PNT==200 ;ADDITIONAL PRINT ROUTINE REQUEST FLAG
462 ;ERROR PRINT ROUTINE NUMBER MUST BE IN DXGP3
463
464 DEFINE ERRMAC(ADR,LADR,PRTN,COR),<
465 GOINK ERRSET ;;GO SET ERROR DETECTED FLAG
466 LPADR==ADR ;;REMEMBER ERROR LOOP ADDRESS
467 CORF==<PRTN&PNT>!COR ;;REMEMBER IF CORRECT AND ACTUAL DATA
468 LALL
469
470 ERLOOP LADR ;;IF ERROR, LOOP TO LADR
471 >
472
473 DEFINE ERROR(LADR,MES1,MES2,PRTN<0>),<ERRMAC ERLP,LADR,PRTN,0>
474
475 DEFINE ERRORM(LADR,MES1,MES2,PRTN<0>),<ERRMAC ERLPM,LADR,PRTN,100>
476
477 DEFINE ERRORA(LADR,MES1,MES2,PRTN<0>),<ERRMAC ERLPA,LADR,PRTN,100>
478
479 DEFINE ERRORD(LADR,MES1,MES2,PRTN<0>),<ERRMAC ERLPD,LADR,PRTN,40>
480
481 DEFINE ERLOOP(ADR),<SALL
482 IFN %EMES&<^-37>,<IF2 <
483 LALL
484
485 PRINTX ?TOO MANY ERROR MESSAGES IN ONE TEST
486 SALL
487 >>
488 LDBR CORF!%EMES ;;LOAD MESSAGE NUMBER
489 GOINK LPADR ;;GO TO ERROR HANDLER
490 JMPZ ADR ;;LOOP IF Z IS SET
491 %EMES==%EMES+1 ;;UPDATE THE MESSAGE NUMBER
492 >
493
494 DEFINE REPEAT(RADR),<
495 GOINK REPTU ;;GO TO REPEAT ROUTINE
496 JMPZ RADR ;;REPEAT IF Z IS SET
497 >
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 5
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
498 IFDEF RHDATA,<
499 DEFINE WRITE,<GOINK SETWRT ;;CALL ROUTINE TO SET UP RH20>
500 DEFINE READ,<GOINK SETRD ;;CALL ROUTINE TO SET UP RH20>
501 DEFINE READB,<GOINK SETRDB ;;CALL ROUTINE TO SET UP RH20>
502
503 DEFINE CHKRH(LADR,PRTN,CODE),<
504 LDBR <PRTN&PNT>!%EMES!CODE ;;SET UP CODE FOR EC REGISTER
505 GOINK CKTRM ;;CALL HOST TO CHECK TERMINATION OF RH20
506 LALL
507
508 ERRLOP LADR ;;IF ERROR, LOOP TO LADR
509 %EMES==%EMES+1
510 >
511 DEFINE CHKTRM(LADR,MES1,MES2,PRTN<0>),<CHKRH LADR,PRTN,40>
512 DEFINE CHKERR(LADR,MES1,MES2,PRTN<0>),<CHKRH LADR,PRTN,140>
513
514 DEFINE ERRLOP(LADR),<SALL
515 JMPZ LADR ;;IF ERROR, LOOP TO LADR
516 >
517 >
518 IFDEF CUADRS,<
519 DEFINE SNDADR,<GOINK SENDAD ;;CALL ROUTINE TO SEND CU ADDRESSES>
520 >
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 6
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
521 000000 %ADRH==0 ;;CLEAR HIGH ADDRESS REFERENCE FLAG
522
523 DEFINE GOINK(ADR),<
524 IFE .&<^-1777>,<
525 JMPSUB ADR ;;GO TO ADDRESS IN LOW 1K
526 >
527 IFN .&<^-1777>,<
528 IFIDN <ADR><TESTI>,<
529 JMPSUB TESTIH
530 %ADRH==%ADRH!1
531 >
532 IFIDN <ADR><LPADR>,<
533 IFE <LPADR-ERLP>,<
534 JMPSUB ERLPH
535 %ADRH==%ADRH!2
536 >
537 IFE <LPADR-ERLPM>,<
538 JMPSUB ERLPMH
539 %ADRH==%ADRH!4
540 >
541 IFE <LPADR-ERLPA>,<
542 JMPSUB ERLPAH
543 %ADRH==%ADRH!10
544 >
545 IFDEF CATAB,<
546 IFE <LPADR-ERLPD>,<
547 JMPSUB ERLPDH
548 %ADRH==%ADRH!400
549 >
550 >
551 >
552 IFIDN <ADR><ERRSET>,<
553 JMPSUB ERSETH
554 %ADRH==%ADRH!20
555 >
556 IFIDN <ADR><REPTU>,<
557 JMPSUB REPTUH
558 %ADRH==%ADRH!40
559 >
560 IFDEF RHDATA,<
561 IFIDN <ADR><SETWRT>,<
562 JMPSUB STWRTH
563 %ADRH==%ADRH!100
564 >
565 IFIDN <ADR><SETRD>,<
566 JMPSUB STRDH
567 %ADRH==%ADRH!100
568 >
569 IFIDN <ADR><SETRDB>,<
570 JMPSUB STRDBH
571 %ADRH==%ADRH!100
572 >
573 IFIDN <ADR><CKTRM>,<JMPSUB CKTRMH>
574 >
575 IFDEF CUADRS,<
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 6-1
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
576 IFIDN <ADR><SENDAD>,<
577 JMPSUB SNDADH
578 %ADRH==%ADRH!200
579 >
580 >
581 >
582 >
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 7
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
583 DEFINE .ECRAM,<
584 IFE .&<^-1777>,< JMP BEGEND>
585 IFN .&<^-1777>,< JUMP BEGEND>
586 IFN %ADRH&1,< TESTIH: MOVB AC5
587 JUMP TEST0I>
588 IFN %ADRH&2,< ERLPH: MOVB AC5
589 JUMP ERLP0>
590 IFN %ADRH&4,< ERLPMH: MOVB AC5
591 JUMP ERLPM0>
592 IFN %ADRH&10,< ERLPAH: MOVB AC5
593 JUMP ERLPA0>
594 IFN %ADRH&20,< ERSETH: JUMP ERRSET>
595 IFN %ADRH&40,< REPTUH: JUMP REPTU>
596 IFN %ADRH&100,< STWRTH: LDBR 1
597 JMP CALLH
598 STRDH: LDBR 2
599 JMP CALLH
600 STRDBH: LDBR 3
601 CALLH: MOVB AC5
602 JUMP CALL0
603 CKTRMH: MOVB AC5
604 JUMP CKTRM0>
605 IFN %ADRH&200,< SNDADH: LDBR 200
606 MOVB AC5
607 JUMP CALL0>
608 IFN %ADRH&400,< ERLPDH: MOVB AC5
609 JUMP ERLPD0>
610 >
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 8
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
611 ;MICRO-DIAGNOSTIC START ROUTINE
612
613 .INIT ^ ;INITIALIZE THE CROSS ASSEMBLER
614
615 SALL
616 000000 0 002000 01 0000
617
618 000001 0 002011 0 1 0 011 BEGIN: LDBR 11 ;SELECT THE MASSBUS
619 000002 0 066371 3 3 0 17 11 MOVB IOSEL ;INTERFACE
620 000003 0 022000 1 1 0 00 00 WAITGO: DATI MPSCR0,BR ;READ CONTROL REGISTER
621 000004 0 014000 0 6 0 000 SHR ;SHIFT GO BIT TO BIT 0
622 000005 0 104007 4 2 0007 JMPB0 .+2 ;JUMP AROUND IF GO IS SET
623 000006 0 100003 4 0 0003 JMP WAITGO ;NOT YET, KEEP WAITING
624 000007 0 022000 1 1 0 00 00 DATI MPSCR0,BR ;READ THE FUNCTION CODE AGAIN
625 000010 0 014000 0 6 0 000 SHR ;SHIFT RIGHT
626 000011 0 014000 0 6 0 000 SHR ;SHIFT F0 TO BIT 0
627 000012 0 104031 4 2 0031 JMPB0 CMDF0 ;JUMP IF F0 IS SET
628 000013 0 014000 0 6 0 000 SHR ;SHIFT F1 TO BIT 0
629 000014 0 104017 4 2 0017 JMPB0 .+3 ;JUMP IF RELIABILITY MODE REQUESTED
630 000015 0 002000 0 1 0 000 LDBR 0 ;SET UP FLAG REG WITH ALL ZEROS
631 000016 0 100020 4 0 0020 JMP .+2
632 000017 0 002040 0 1 0 040 LDBR 40 ;SET RELIABILITY MODE FLAG
633 000020 0 072171 3 5 0 07 11 MOVB AC7 ;PUT IN AC7
634 000021 0 002300 0 1 0 300 LDBR INIT+SPRES ;RESET THE DX20
635 000022 0 066371 3 3 0 17 11 MOVB IOSEL ;AND THE STACK POINTER
636 000023 0 002011 0 1 0 011 LDBR 11 ;SELECT THE MASSBUS
637 000024 0 066371 3 3 0 17 11 MOVB IOSEL ;INTERFACE AGAIN
638 000025 0 002000 0 1 0 000 LDBR 0 ;CLEAR RIGHT HALF OF DXGP3
639 000026 0 064351 3 2 0 16 11 MOVB MPGP6 ;TO INDICATE NO ADDITIONAL ERROR PRINTER
640 000027 0 116033 4 7 0033 JMPSUB OFFGO ;TURN OFF GO
641 000030 0 100207 4 0 0207 JMP TSTART ;GO START THE FIRST TEST
642
643 000031 0 014000 0 6 0 000 CMDF0: SHR ;SHIFT F1 TO BIT 0
644 000032 0 016000 0 7 0 000 RETURN ;RETURN TO CALLER
645
646 000033 0 002000 0 1 0 000 OFFGO: LDBR 0 ;GET A ZERO
647 000034 0 064051 3 2 0 02 11 MOVB MPECR ;CLEAR ERROR CODE REGISTER
648 000035 0 032121 1 5 0 05 01 DATI MPSCR1,AC5 ;READ STATUS REGISTER 1
649 000036 0 002010 0 1 0 010 LDBR DTD ;GET MASK OF DIRECTION BIT
650 000037 0 072133 3 5 0 05 13 LANDBR AC5 ;KEEP ONLY THAT BIT
651 000040 0 002002 0 1 0 002 LDBR CLRGO ;GET BIT TO CLEAR GO
652 000041 0 062134 3 1 0 05 14 LORB AC5,BR ;COMBINE WITH COPY OF DTD
653 000042 0 064031 3 2 0 01 11 MOVB MPSCR1 ;CLEAR GO AND ATA
654 000043 0 016000 0 7 0 000 RETURN
655
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 9
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
656 ;TEST INITIALIZATION
657
658 000044 0 062130 3 1 0 05 10 TEST0I: MOV AC5,BR ;GET TEST NUMBER BACK
659 000045 0 001000 0 0 2 000 TESTI: LDMAR 0 ;CLEAR MEMORY ADDRESS REGISTER
660 000046 0 000400 0 0 1 000 LDMARX 0 ;ALL BITS
661 000047 0 132157 5 5 0 06 17 DATI IOSEL,AC6 ;SAVE IOSEL REG
662 000050 0 010011 0 4 0 011 LDMEM 11 ;GET DEVICE CODE FOR MASSBUS INTERFACE
663 000051 0 046371 2 3 0 17 11 MOVMEM IOSEL ;LOAD INTO I/O SELECT REGISTER
664 000052 0 064211 3 2 0 10 11 MOVB MPGP0 ;WRITE TEST NUMBER INTO DXGP0
665 000053 0 062150 3 1 0 06 10 MOV AC6,BR ;GET SAVED IOSEL REG
666 000054 0 066371 3 3 0 17 11 MOVB IOSEL ;RESTORE IT
667 000055 0 002040 0 1 0 040 LDBR 40 ;GET MASK OF ONLY RELIABILITY BIT
668 000056 0 072173 3 5 0 07 13 LANDBR AC7 ;CLEAR ERROR AND MESSAGE NUMBER BITS
669 000057 0 062170 3 1 0 07 10 MOV AC7,BR ;GET FLAGS
670 000060 0 014000 0 6 0 000 SHR ;SHIFT RELIABILITY MODE BIT TO BR4
671 000061 0 106064 4 3 0064 JMPB4 .+3 ;JUMP AROUND IF RELIABILITY MODE
672 000062 0 002000 0 1 0 000 LDBR 0 ;QUICK VERIFY, LOAD A ZERO COUNT
673 000063 0 100065 4 0 0065 JMP .+2
674 000064 0 002077 0 1 0 077 LDBR RPTCNT-1 ;GET REPEAT COUNT
675 000065 0 072151 3 5 0 06 11 MOVB AC6 ;SAVE IN AC6
676 000066 0 016000 0 7 0 000 RETURN ;NOW START THE TEST
677
678 ;I/O SELECT REGISTER GENERAL ROUTINES
679
680 000067 0 132117 5 5 0 04 17 SAVIOS: DATI IOSEL,AC4 ;SAVE I/O SELECT REGISTER IN AC4
681 000070 0 002011 0 1 0 011 LDBR 11 ;SELECT MASSBUS INTERFACE
682 000071 0 066371 3 3 0 17 11 MOVB IOSEL ;GO I/O
683 000072 0 016000 0 7 0 000 NRTN: RETURN
684
685 000073 0 062110 3 1 0 04 10 RESIOS: MOV AC4,BR ;GET SAVED I/O SELECT REGISTER
686 000074 0 066371 3 3 0 17 11 MOVB IOSEL ;RESTORE IT
687 000075 0 016000 0 7 0 000 RETURN
688
689 ;ROUTINE TO SET ATA AND/OR MPERR IN STATUS REGISTER
690 ;ENTER WITH BITS TO SET IN BR
691
692 000076 0 032121 1 5 0 05 01 SETATA: DATI MPSCR1,AC5 ;READ STATUS REGISTER
693 000077 0 072134 3 5 0 05 14 LORBR AC5 ;SET REQUESTED BITS
694 000100 0 002310 0 1 0 310 LDBR ATA+MPERR+DTD ;GET MASK OF ONLY BITS TO SET
695 000101 0 062133 3 1 0 05 13 LANDB AC5,BR ;CLEAR OTHER BITS READ
696 000102 0 064031 3 2 0 01 11 MOVB MPSCR1 ;WRITE INTO STATUS REGISTER
697 000103 0 016000 0 7 0 000 RETURN
698
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 10
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
699 ;ERROR HANDLER ROUTINES
700
701 000104 0 002300 0 1 0 300 ERRSET: LDBR 300 ;GET ERROR LOOP AND DETECTED FLAGS
702 000105 0 072174 3 5 0 07 14 LORBR AC7 ;SET BOTH BITS IN FLAG REGISTER
703 000106 0 016000 0 7 0 000 RETURN
704
705 ;CHECK IF TO REPORT AN ERROR
706
707 000107 0 062170 3 1 0 07 10 ERRCHK: MOV AC7,BR ;GET FLAG REGISTER
708 000110 0 110112 4 4 0112 IFNDEF .ERROR,<JMPB7 .+2> ;SKIP IF IN ERROR LOOP
709 IFDEF .ERROR,<JMP REPORT> ;REPORT ALL ERRORS
710 000111 0 016377 0 7 0 377 RETURN -1 ;RETURN WITH Z SET TO CONTINUE TEST
711 000112 0 062165 3 1 0 07 05 SHL AC7,BR ;SHIFT ERROR DETECTED BIT TO BR7
712 000113 0 110126 4 4 0126 JMPB7 REPORT ;REPORT IT IF SET
713 000114 0 002037 0 1 0 037 LDBR 37 ;GET MASK FOR ERROR NUMBER
714 000115 0 072133 3 5 0 05 13 LANDBR AC5 ;CLEAR CONTROL BITS IN CURRENT NUMBER
715 000116 0 062173 3 1 0 07 13 LANDB AC7,BR ;EXTRACT LAST ERROR NUMBER
716 000117 0 060137 3 0 0 05 17 OSB AC5 ;COMPARE LAST AND CURRENT ERROR NUMBERS
717 000120 0 114122 4 6 0122 JMPZ NOFAIL ;JUMP IF AT SAME ERROR
718 000121 0 016377 0 7 0 377 RETURN -1 ;NO, RETURN WITH Z SET TO CONTINUE TEST
719 000122 0 116067 4 7 0067 NOFAIL: JMPSUB SAVIOS ;SAVE I/O REGISTER, SELECT MASSBUS
720 000123 0 002200 0 1 0 200 LDBR ATA ;GET ATA BIT
721 000124 0 072131 3 5 0 05 11 MOVB AC5 ;SAVE IN AC5
722 000125 0 016000 0 7 0 000 RETURN ;RETURN WITH Z CLEAR TO SIGNAL END OF LOOP
723
724 000126 0 116067 4 7 0067 REPORT: JMPSUB SAVIOS ;SAVE I/O REGISTER, SELECT MASSBUS
725 000127 0 062130 3 1 0 05 10 MOV AC5,BR ;GET ERROR NUMBER
726 000130 0 064051 3 2 0 02 11 MOVB MPECR ;PUT IN ERROR CODE REGISTER
727 000131 0 002240 0 1 0 240 LDBR 240 ;GET MASK OF LOOP AND RELIABILITY BITS
728 000132 0 072173 3 5 0 07 13 LANDBR AC7 ;LEAVE ONLY THOSE TWO BITS IN FLAG REG
729 000133 0 002037 0 1 0 037 LDBR 37 ;GET MASK OF ERROR NUMBER
730 000134 0 062133 3 1 0 05 13 LANDB AC5,BR ;GET CURRENT NUMBER FROM AC5
731 000135 0 072174 3 5 0 07 14 LORBR AC7 ;MERGE AND PUT IN FLAG REGISTER
732 000136 0 002300 0 1 0 300 LDBR ATA+MPERR ;GET ATA AND ERROR BITS
733 000137 0 072131 3 5 0 05 11 MOVB AC5 ;SAVE IN AC5
734 000140 0 016000 0 7 0 000 RETURN ;RETURN WITH Z CLEAR TO SIGNAL ERROR REPORT
735
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 11
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
736 000141 0 072131 3 5 0 05 11 ERLP: MOVB AC5 ;SAVE MESSAGE NUMBER IN AC5
737 000142 0 116107 4 7 0107 ERLP0: JMPSUB ERRCHK ;CHECK FOR ERROR
738 000143 0 114072 4 6 0072 JMPZ NRTN ;NO, RETURN WITH Z CLEAR TO CONTINUE TEST
739 000144 0 100161 4 0 0161 JMP ERRCOM ;GO TO COMMON ROUTINE
740
741 000145 0 072131 3 5 0 05 11 ERLPM: MOVB AC5 ;SAVE MESSAGE NUMBER IN AC5
742 000146 0 116107 4 7 0107 ERLPM0: JMPSUB ERRCHK ;CHECK FOR ERROR
743 000147 0 114072 4 6 0072 JMPZ NRTN ;NO, RETURN WITH Z CLEAR TO CONTINUE TEST
744 000150 0 044311 2 2 0 14 11 MOVMEM MPGP4 ;PUT CORRECT DATA IN RIGHT HALF OF DXGP2
745 000151 0 100157 4 0 0157 JMP ERRCA ;JUMP AROUND
746
747 000152 0 072131 3 5 0 05 11 ERLPA: MOVB AC5 ;SAVE MESSAGE NUMBER IN AC5
748 000153 0 116107 4 7 0107 ERLPA0: JMPSUB ERRCHK ;CHECK FOR ERROR
749 000154 0 114072 4 6 0072 JMPZ NRTN ;NO, RETURN WITH Z CLEAR TO CONTINUE TEST
750 000155 0 062030 3 1 0 01 10 MOV AC1,BR ;GET CORRECT DATA FROM AC1
751 000156 0 064311 3 2 0 14 11 MOVB MPGP4 ;PUT IN RIGHT HALF OF DXGP2
752 000157 0 062010 3 1 0 00 10 ERRCA: MOV AC0,BR ;GET ACTUAL DATA FROM AC0
753 000160 0 064331 3 2 0 15 11 MOVB MPGP5 ;PUT IN LEFT HALF OF DXGP2
754 000161 0 062130 3 1 0 05 10 ERRCOM: MOV AC5,BR ;GET BITS TO SET IN STATUS REGISTER
755 000162 0 116076 4 7 0076 CHKLOP: JMPSUB SETATA ;GO SET THE BITS
756 000163 0 116003 4 7 0003 CHKLP: JMPSUB WAITGO ;WAIT FOR GO TO SET
757 000164 0 104170 4 2 0170 JMPB0 ELOOPC ;JUMP IF TO CONTINUE
758 000165 0 116033 4 7 0033 JMPSUB OFFGO ;TURN OFF GO
759 000166 0 116073 4 7 0073 JMPSUB RESIOS ;RESTORE I/O SELECT REGISTER
760 000167 0 016377 0 7 0 377 ZRTN: RETURN -1 ;RETURN WITH Z SET TO LOOP
761
762 000170 0 116033 4 7 0033 ELOOPC: JMPSUB OFFGO ;TURN OFF GO
763 000171 0 116073 4 7 0073 JMPSUB RESIOS ;RESTORE I/O SELECT REGISTER
764 000172 0 016000 0 7 0 000 RETURN ;RETURN WITH Z CLEAR TO CONTINUE
765
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 12
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
766 XLIST
767 LIST
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 13
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
768 XLIST
769 LIST
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 14
MCERR MAC 17-Oct-88 14:28 DATA PATH BIT REGISTER DEFINITIONS
770 ;REPEAT TEST ROUTINE
771
772 000173 0 072147 3 5 0 06 07 REPTU: DECR AC6 ;DECREMENT REPEAT COUNT
773 000174 0 114072 4 6 0072 JMPZ NRTN ;IF NOW -1, RETURN WITH Z CLEAR
774 000175 0 016377 0 7 0 377 RETURN -1 ;RETURN WITH Z SET TO REPEAT TEST
775
776 ;REPORT END OF DIAGNOSTIC WITH 0 ERROR CODE AND 0 TEST NUMBER
777
778 000176 0 002011 0 1 0 011 BEGEND: LDBR 11 ;SELECT MASSBUS INTERFACE
779 000177 0 066371 3 3 0 17 11 MOVB IOSEL ;IN I/O SELECT REGISTER
780 000200 0 002000 0 1 0 000 LDBR 0 ;GET A ZERO
781 000201 0 064211 3 2 0 10 11 MOVB MPGP0 ;MAKE TEST NUMBER 0
782 000202 0 064231 3 2 0 11 11 MOVB MPGP1 ;TO SAY END OF DIAGNOSTIC
783 000203 0 002200 0 1 0 200 LDBR ATA ;GET ATTENTION BIT
784 000204 0 064031 3 2 0 01 11 MOVB MPSCR1 ;SET IT
785 000205 0 116003 4 7 0003 JMPSUB WAITGO ;WAIT FOR GO TO SET
786 000206 0 100001 4 0 0001 JMP BEGIN ;START DIAGNOSTIC OVER AGAIN
787
788
789 000207 TSTART: ;COME HERE TO START THE TESTING
790
791
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
792 SUBTTL DATA PATH TEST - PART 1
793
794 DEFTST MCODE4
795 TEST 197,TEST MICROBUS PARITY CHECKING NETWORK
796 ;***********************************************************************
797 ;* MCODE4 * TEST 197 * TEST MICROBUS PARITY CHECKING NETWORK
798 ;***********************************************************************
799 SALL
800 000207 0 002011 0 1 0 011
801 000210 0 066371 3 3 0 17 11
802 000211 0 002000 0 1 0 000
803 000212 0 064231 3 2 0 11 11
804 000213 0 002305 0 1 0 305
805 000214 0 116045 4 7 0045
806
807 000215 TST197: SALL
808
809 ;*WRITE SELECTED PATTERNS TO REG 4 TO VERIFY THE PROPER OPERATION
810 ;*OF THE MICROBUS PARITY CHECKING NETWORK.
811
812 ;*WRITE REG 0 TO CLEAR FLAGS
813 ;*WRITE PATTERN TO REG 4
814 ;*CHECK THAT "UB PE FLAG" DID NOT SET
815
816 000215 0 001000 0 0 2 000 LDMAR 0 ;CLEAR MAR
817 000216 0 010001 0 4 0 001 LDMEM 1 ;SET ADDITIONAL PRINT ROUTINE NUM
818 000217 0 002221 0 1 0 221 GOSUB SETPNT
819 000220 0 177631 7 7 3 11 11
820 000221 0 002006 0 1 0 006 LDBR 6 ;SET LOOP COUNT MINUS ONE
821 000222 0 072031 3 5 0 01 11 MOVB AC1
822 000223 0 001001 0 0 2 001 LDMAR UBPAR ;SET MAR TO FIRST DATA PATTERN
823 000224 0 064011 3 2 0 00 11 PARLP: MOVB REG0 ;WRITE REG 0 TO CLEAR "UB PE FLAG"
824 000225 0 044111 2 2 0 04 11 MOVMEM MCLO ;WRITE PATTERN
825 000226 0 002227 0 1 0 227 GOSUB SETDAT ;SETUP DATA FOR ADD PNT ROUTINE
826 000227 0 177631 7 7 3 11 11
827 000230 0 022000 1 1 0 00 00 DATI REG0,BR ;READ REG 0 FOR "UB PE FLAG"
828 000231 0 104233 4 2 0233 JMPB0 .+2 ;JUMP IF IT SET, SHOULDN'T HAVE
829 000232 0 100234 4 0 0234 JMP .+2 ;ELSE, OKAY
830 000233 0 116104 4 7 0104 ERROR PARLP,"UB PE FLAG" SET WHEN GOOD PARITY WAS WRITTEN TO REG 4,,PNT
831
832 ERLOOP PARLP ^SALL
833 000234 0 002200 0 1 0 200
834 000235 0 116141 4 7 0141
835 000236 0 114224 4 6 0224
836 000237 0 073427 3 5 3 01 07 DECR AC1,I ;DEC LOOP COUNT AND INC PATTERN ADDR
837 000240 0 114242 4 6 0242 JMPZ .+2 ;JUMP IF DONE
838 000241 0 100224 4 0 0224 JMP PARLP ;ELSE,CONTINUE
839
840 000242 0 116173 4 7 0173 REPEAT TST
841 000243 0 114215 4 6 0215
842
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 2
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
843 TEST 198,TEST REGISTER 1
844 ;***********************************************************************
845 ;* MCODE4 * TEST 198 * TEST REGISTER 1
846 ;***********************************************************************
847 SALL
848 000244 0 002306 0 1 0 306
849 000245 0 116045 4 7 0045
850
851 000246 TST198: SALL
852
853 ;*TEST WRITING AND READING REGISTER 1.
854 ;*BITS 7-4 ARE READ ONLY BITS WHICH ARE NORMALLY ZERO.
855
856 ;*WRITE ZEROS TO BITS 3-0.
857 ;*CHECK THAT BITS 3-0 READ BACK AS ZEROS.
858
859 000246 0 001000 0 0 2 000 LDMAR 0 ;CLEAR MAR
860 000247 0 010000 0 4 0 000 LDMEM 0 ;WRITE ZEROS BITS 3-0
861 000250 0 044031 2 2 0 01 11 MOVMEM REG1
862 000251 0 032001 1 5 0 00 01 DATI REG1,AC0 ;READ REG 1
863 000252 0 002017 0 1 0 017 LDBR 17 ;SET MASK OF TEST BITS
864 000253 0 072013 3 5 0 00 13 LANDBR AC0 ;ISOLATE THEM IN AC0
865 000254 0 040017 2 0 0 00 17 OSM AC0 ;CHECK FOR ALL ZEROS
866 000255 0 114257 4 6 0257 JMPZ .+2 ;JUMP IF ITS ZERO
867 000256 0 116104 4 7 0104 ERRORM TST,CAN NOT WRITE ZEROS TO BITS 3-0 OF REG 1
868
869 ERLOOP TST ^SALL
870 000257 0 002100 0 1 0 100
871 000260 0 116145 4 7 0145
872 000261 0 114246 4 6 0246
873
874 ;*WRITE ONES TO BITS 3-0.
875 ;*CHECK THAT BITS 3-0 READ BACK AS ONES.
876
877 000262 0 010017 0 4 0 017 REG1A: LDMEM 17 ;WRITE ONES TO BITS 3-0
878 000263 0 044031 2 2 0 01 11 MOVMEM REG1
879 000264 0 032001 1 5 0 00 01 DATI REG1,AC0 ;READ REG 1
880 000265 0 052013 2 5 0 00 13 LANDMR AC0 ;ISOLATE TEST BITS IN AC0
881 000266 0 040017 2 0 0 00 17 OSM AC0 ;CHECK FOR BITS 0,1=1'S
882 000267 0 114271 4 6 0271 JMPZ .+2 ;JUMP IF ONES
883 000270 0 116104 4 7 0104 ERRORM REG1A,CAN NOT WRITE ONES TO BITS 3-0 OF REG 1
884
885 ERLOOP REG1A ^SALL
886 000271 0 002101 0 1 0 101
887 000272 0 116145 4 7 0145
888 000273 0 114262 4 6 0262
889 ;*DO A MICROBUS INIT.
890 ;*CHECK THAT BITS 3-0 ARE CLEARED.
891
892 000274 0 002167 0 1 0 167 GOSUB INITL ;DO A MICROBUS INIT
893 000275 0 177631 7 7 3 11 11
894 000276 0 032001 1 5 0 00 01 DATI REG1,AC0 ;READ REG 1
895 000277 0 002017 0 1 0 017 LDBR 17 ;SET MASK OF TEST BITS
896 000300 0 072013 3 5 0 00 13 LANDBR AC0 ;ISOLATE THEM IN AC0
897 000301 0 040017 2 0 0 00 17 OSM AC0 ;CHECK FOR ZEROS
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 2-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
898 000302 0 114304 4 6 0304 JMPZ .+2 ;JUMP IF REG 1 CLEARED.
899 ERRORM REG1A,CAN NOT CLEAR BITS 3-0 IN REG 1,^_
900 000303 0 116104 4 7 0104 DIAG DID A MICROBUS INIT
901
902 ERLOOP REG1A ^SALL
903 000304 0 002102 0 1 0 102
904 000305 0 116145 4 7 0145
905 000306 0 114262 4 6 0262
906 ;*WRITE FLOATING ZEROS AND FLOATING ONES PATTERNS TO BITS 3-0 OF REG 1.
907 ;*READ BACK REG 1 FOR THE WRITTEN PATTERN.
908
909 000307 0 002007 0 1 0 007 LDBR 7 ;SETUP LOOP COUNT
910 000310 0 072031 3 5 0 01 11 MOVB AC1
911 000311 0 001014 0 0 2 014 LDMAR FLTZ1 ;SET MAR TO FIRST DATA PATTERN
912 000312 0 044031 2 2 0 01 11 FLT1: MOVMEM REG1 ;WRITE PATTERN INTO REG 1
913 000313 0 032001 1 5 0 00 01 DATI REG1,AC0 ;READ DATA BACK
914 000314 0 002017 0 1 0 017 LDBR 17 ;SET MASK OF TEST BITS
915 000315 0 072013 3 5 0 00 13 LANDBR AC0 ;ISOLATE THEM IN AC0
916 000316 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE ACTUAL TO CORRECT
917 000317 0 114321 4 6 0321 JMPZ .+2 ;JUMP IF CORRECT
918 ERRORM FLT1,FLOATING ZEROS/ONES FAILED,^_
919 000320 0 116104 4 7 0104 DIAG WROTE REG 1
920
921 ERLOOP FLT1 ^SALL
922 000321 0 002103 0 1 0 103
923 000322 0 116145 4 7 0145
924 000323 0 114312 4 6 0312
925 000324 0 073427 3 5 3 01 07 DECR AC1,I ;DEC LOOP COUNT AND INC PATTERN ADDR
926 000325 0 114327 4 6 0327 JMPZ .+2 ;JUMP IF DONE
927 000326 0 100312 4 0 0312 JMP FLT1 ;ELSE, CONTINUE
928
929 000327 0 116173 4 7 0173 REPEAT TST
930 000330 0 114246 4 6 0246
931
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 3
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
932 TEST 199,TEST REGISTER 2
933 ;***********************************************************************
934 ;* MCODE4 * TEST 199 * TEST REGISTER 2
935 ;***********************************************************************
936 SALL
937 000331 0 002307 0 1 0 307
938 000332 0 116045 4 7 0045
939
940 000333 TST199: SALL
941
942 ;*TEST WRITING AND READING REGISTER 2.
943 ;*BITS 7 AND 6 ARE READ ONLY.
944
945 ;*WRITE ZEROS TO BITS 5-0 OF REG 2.
946 ;*CHECK THAT THEY READ BACK AS ZEROS.
947
948 000333 0 001000 0 0 2 000 LDMAR 0 ;CLEAR MAR
949 000334 0 010000 0 4 0 000 LDMEM 0 ;WRITE ZERO TO REG 2
950 000335 0 044051 2 2 0 02 11 MOVMEM REG2
951 000336 0 032002 1 5 0 00 02 DATI REG2,AC0 ;READ REG 2
952 000337 0 002077 0 1 0 077 LDBR 77 ;SET MASK OF WRITEABLE BITS
953 000340 0 072013 3 5 0 00 13 LANDBR AC0 ;ISOLATE THEM IN AC0
954 000341 0 040017 2 0 0 00 17 OSM AC0 ;CHECK FOR ZEROS
955 000342 0 114344 4 6 0344 JMPZ .+2 ;JUMP IF ALL ZEROS
956 000343 0 116104 4 7 0104 ERRORM TST,CANNOT WRITE ALL ZEROS TO BITS 5-0 REG 2
957
958 ERLOOP TST ^SALL
959 000344 0 002100 0 1 0 100
960 000345 0 116145 4 7 0145
961 000346 0 114333 4 6 0333
962 ;*WRITE ONES TO BITS 5-0 OF REG 2.
963 ;*CHECK THAT THEY READ BACK AS ONES.
964
965 000347 0 010077 0 4 0 077 REG2A: LDMEM 77 ;WRITE ONES TO REG2
966 000350 0 044051 2 2 0 02 11 MOVMEM REG2
967 000351 0 032002 1 5 0 00 02 DATI REG2,AC0 ;READ REG 2
968 000352 0 052013 2 5 0 00 13 LANDMR AC0 ;ISOLATE WRITEABLE BITS IN AC0
969 000353 0 040017 2 0 0 00 17 OSM AC0 ;CHECK FOR BITS 6-0=1'S
970 000354 0 114356 4 6 0356 JMPZ .+2 ;JUMP IF ALL 1'S
971 000355 0 116104 4 7 0104 ERRORM REG2A,CANNOT WRITE ALL ONES TO BITS 5-0 REG 2
972
973 ERLOOP REG2A ^SALL
974 000356 0 002101 0 1 0 101
975 000357 0 116145 4 7 0145
976 000360 0 114347 4 6 0347
977 ;*DO A MICROBUS INIT.
978 ;*CHECK THAT BITS 5-0 ARE CLEARED.
979
980 000361 0 002167 0 1 0 167 GOSUB INITL ;DO A MICROBUS INIT
981 000362 0 177631 7 7 3 11 11
982 000363 0 032002 1 5 0 00 02 DATI REG2,AC0 ;READ REG 2
983 000364 0 002077 0 1 0 077 LDBR 77 ;SET MASK OF CLEARABLE BITS
984 000365 0 072013 3 5 0 00 13 LANDBR AC0 ;ISOLATE THEM IN AC0
985 000366 0 040017 2 0 0 00 17 OSM AC0 ;CHECK IF THEY CLEARED
986 000367 0 114371 4 6 0371 JMPZ .+2 ;JUMP IF THEY DID
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 3-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
987 ERRORM REG2A,CANNOT CLEAR BITS 5-0 OF REG 2,^_
988 000370 0 116104 4 7 0104 DIAG DID A MICROBUS INIT
989
990 ERLOOP REG2A ^SALL
991 000371 0 002102 0 1 0 102
992 000372 0 116145 4 7 0145
993 000373 0 114347 4 6 0347
994 ;*WRITE FLOATING ZEROS AND FLOATING ONES PATTERNS TO BITS 5-0 OF REG 2.
995 ;*READ BACK REG 2 FOR THE WRITTEN PATTERN.
996
997 000374 0 002013 0 1 0 013 LDBR ^D11 ;SETUP LOOP COUNT
998 000375 0 072031 3 5 0 01 11 MOVB AC1
999 000376 0 001024 0 0 2 024 LDMAR FLTZ2 ;SET MAR TO FIRST DATA PATTERN
1000 000377 0 044051 2 2 0 02 11 FLT2: MOVMEM REG2 ;WRITE PATTERN TO REG2
1001 000400 0 032002 1 5 0 00 02 DATI REG2,AC0 ;READ BACK REG2
1002 000401 0 002077 0 1 0 077 LDBR 77 ;SET MASK OF WRITEABLE BITS
1003 000402 0 072013 3 5 0 00 13 LANDBR AC0 ;ISOLATE THEM IN AC0
1004 000403 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE DATA
1005 000404 0 114406 4 6 0406 JMPZ .+2 ;JUMP IF CORRECT
1006 ERRORM FLT2,FLOATING ZEROS/ONES FAILED,^_
1007 000405 0 116104 4 7 0104 DIAG WROTE REG 2
1008
1009 ERLOOP FLT2 ^SALL
1010 000406 0 002103 0 1 0 103
1011 000407 0 116145 4 7 0145
1012 000410 0 114377 4 6 0377
1013 000411 0 073427 3 5 3 01 07 DECR AC1,I ;DEC LOOP COUNT AND INC PATTERN ADDR.
1014 000412 0 114414 4 6 0414 JMPZ .+2 ;JUMP IF DONE
1015 000413 0 100377 4 0 0377 JMP FLT2 ;ELSE, CONTINUE
1016
1017 000414 0 116173 4 7 0173 REPEAT TST
1018 000415 0 114333 4 6 0333
1019
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 4
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1020 TEST 200,TEST REGISTER 4 (MCLO)
1021 ;***********************************************************************
1022 ;* MCODE4 * TEST 200 * TEST REGISTER 4 (MCLO)
1023 ;***********************************************************************
1024 SALL
1025 000416 0 002310 0 1 0 310
1026 000417 0 116045 4 7 0045
1027
1028 000420 TST200: SALL
1029
1030 ;*TEST WRITING AND READING REGISTER 4.
1031
1032 ;*WRITE ZEROS TO THE REGISTER.
1033 ;*CHECK THAT ALL BITS ARE ZEROS.
1034
1035 000420 0 001000 0 0 2 000 LDMAR 0 ;CLEAR MAR
1036 000421 0 010000 0 4 0 000 LDMEM 0 ;WRITE ZEROS TO REG 4
1037 000422 0 044111 2 2 0 04 11 MOVMEM MCLO
1038 000423 0 032004 1 5 0 00 04 DATI MCLO,AC0 ;READ REG 4
1039 000424 0 040017 2 0 0 00 17 OSM AC0 ;CHECK IF ITS ALL ZEROS
1040 000425 0 114427 4 6 0427 JMPZ .+2 ;JUMP IF ZEROS
1041 000426 0 116104 4 7 0104 ERRORM TST,CAN NOT WRITE ALL ZEROS TO REG 4
1042
1043 ERLOOP TST ^SALL
1044 000427 0 002100 0 1 0 100
1045 000430 0 116145 4 7 0145
1046 000431 0 114420 4 6 0420
1047 ;*WRITE ONES TO THE REGISTER.
1048 ;*CHECK THAT ALL BITS ARE ONES.
1049
1050 000432 0 010377 0 4 0 377 REG4A: LDMEM -1 ;WRITE ONES TO REG 4
1051 000433 0 044111 2 2 0 04 11 MOVMEM MCLO
1052 000434 0 032004 1 5 0 00 04 DATI MCLO,AC0 ;READ REG 4
1053 000435 0 040017 2 0 0 00 17 OSM AC0 ;CHECK FOR ALL ONES
1054 000436 0 114440 4 6 0440 JMPZ .+2 ;JUMP IF ALL ONES
1055 000437 0 116104 4 7 0104 ERRORM REG4A,CAN NOT WRITE ALL ONES TO REG 4
1056
1057 ERLOOP REG4A ^SALL
1058 000440 0 002101 0 1 0 101
1059 000441 0 116145 4 7 0145
1060 000442 0 114432 4 6 0432
1061 ;*WRITE FLOATING ZEROS AND FLOATING ONES PATTERNS TO THE REGISTER.
1062 ;*READ IT BACK FOR THE WRITTEN PATTERN.
1063
1064 000443 0 002017 0 1 0 017 LDBR ^D15 ;SET LOOP COUNT MINUS ONE
1065 000444 0 072031 3 5 0 01 11 MOVB AC1
1066 000445 0 001040 0 0 2 040 LDMAR FLTZ ;SET MAR TO FIRST PATTERN
1067 000446 0 044111 2 2 0 04 11 FLT4: MOVMEM MCLO ;WRITE PATTERN TO REG 4
1068 000447 0 032004 1 5 0 00 04 DATI MCLO,AC0 ;READ REG 4
1069 000450 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE TO EXPECTED DATA
1070 000451 0 114453 4 6 0453 JMPZ .+2 ;JUMP IF CORRECT
1071 ERRORM FLT4,FLOATING ZEROS/ONES FAILED,^_
1072 000452 0 116104 4 7 0104 DIAG WROTE REG 4
1073
1074 ERLOOP FLT4 ^SALL
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 4-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1075 000453 0 002102 0 1 0 102
1076 000454 0 116145 4 7 0145
1077 000455 0 114446 4 6 0446
1078 000456 0 073427 3 5 3 01 07 DECR AC1,I ;DEC LOOP COUNT AND INC PATTERN ADDR
1079 000457 0 114461 4 6 0461 JMPZ .+2 ;JUMP IF DONE
1080 000460 0 100446 4 0 0446 JMP FLT4 ;ELSE, CONTINUE
1081
1082 000461 0 116173 4 7 0173 REPEAT TST
1083 000462 0 114420 4 6 0420
1084
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 5
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1085 TEST 201,TEST REGISTER 5 (MCHI)
1086 ;***********************************************************************
1087 ;* MCODE4 * TEST 201 * TEST REGISTER 5 (MCHI)
1088 ;***********************************************************************
1089 SALL
1090 000463 0 002311 0 1 0 311
1091 000464 0 116045 4 7 0045
1092
1093 000465 TST201: SALL
1094
1095 ;*TEST WRITING AND READING REGISTER 5.
1096
1097 ;*WRITE ZEROS TO THE REGISTER.
1098 ;*CHECK THAT ALL BITS ARE ZEROS.
1099
1100 000465 0 001000 0 0 2 000 LDMAR 0 ;CLEAR MAR
1101 000466 0 010000 0 4 0 000 LDMEM 0 ;WRITE ZEROS TO REG 5
1102 000467 0 044131 2 2 0 05 11 MOVMEM MCHI
1103 000470 0 032005 1 5 0 00 05 DATI MCHI,AC0 ;READ REG 5
1104 000471 0 040017 2 0 0 00 17 OSM AC0 ;CHECK IF ITS ALL ZEROS
1105 000472 0 114474 4 6 0474 JMPZ .+2 ;JUMP IF ZEROS
1106 000473 0 116104 4 7 0104 ERRORM TST,CAN NOT WRITE ALL ZEROS TO REG 5
1107
1108 ERLOOP TST ^SALL
1109 000474 0 002100 0 1 0 100
1110 000475 0 116145 4 7 0145
1111 000476 0 114465 4 6 0465
1112 ;*WRITE ONES TO THE REGISTER.
1113 ;*CHECK THAT ALL BITS ARE ONES.
1114
1115 000477 0 010377 0 4 0 377 REG5A: LDMEM -1 ;WRITE ONES TO REG 5
1116 000500 0 044131 2 2 0 05 11 MOVMEM MCHI
1117 000501 0 032005 1 5 0 00 05 DATI MCHI,AC0 ;READ REG 5
1118 000502 0 040017 2 0 0 00 17 OSM AC0 ;CHECK FOR ALL ONES
1119 000503 0 114505 4 6 0505 JMPZ .+2 ;JUMP IF ALL ONES
1120 000504 0 116104 4 7 0104 ERRORM REG5A,CAN NOT WRITE ALL ONES TO REG 5
1121
1122 ERLOOP REG5A ^SALL
1123 000505 0 002101 0 1 0 101
1124 000506 0 116145 4 7 0145
1125 000507 0 114477 4 6 0477
1126 ;*WRITE FLOATING ZEROS AND FLOATING ONES PATTERNS TO THE REGISTER.
1127 ;*READ IT BACK FOR THE WRITTEN PATTERN.
1128
1129 000510 0 002017 0 1 0 017 LDBR ^D15 ;SET LOOP COUNT MINUS ONE
1130 000511 0 072031 3 5 0 01 11 MOVB AC1
1131 000512 0 001040 0 0 2 040 LDMAR FLTZ ;SET MAR TO FIRST PATTERN
1132 000513 0 044131 2 2 0 05 11 FLT5: MOVMEM MCHI ;WRITE PATTERN TO REG 5
1133 000514 0 032005 1 5 0 00 05 DATI MCHI,AC0 ;READ REG 5
1134 000515 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE TO EXPECTED DATA
1135 000516 0 114520 4 6 0520 JMPZ .+2 ;JUMP IF CORRECT
1136 ERRORM FLT5,FLOATING ZEROS/ONES FAILED,^_
1137 000517 0 116104 4 7 0104 DIAG WROTE REG 5
1138
1139 ERLOOP FLT5 ^SALL
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 5-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1140 000520 0 002102 0 1 0 102
1141 000521 0 116145 4 7 0145
1142 000522 0 114513 4 6 0513
1143 000523 0 073427 3 5 3 01 07 DECR AC1,I ;DEC LOOP COUNT AND INC PATTERN ADDR
1144 000524 0 114526 4 6 0526 JMPZ .+2 ;JUMP IF DONE
1145 000525 0 100513 4 0 0513 JMP FLT5 ;ELSE, CONTINUE
1146
1147 000526 0 116173 4 7 0173 REPEAT TST
1148 000527 0 114465 4 6 0465
1149
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 6
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1150 TEST 202,TEST REGISTER 6 (BCLO)
1151 ;***********************************************************************
1152 ;* MCODE4 * TEST 202 * TEST REGISTER 6 (BCLO)
1153 ;***********************************************************************
1154 SALL
1155 000530 0 002312 0 1 0 312
1156 000531 0 116045 4 7 0045
1157
1158 000532 TST202: SALL
1159
1160 ;*TEST WRITING AND READING REGISTER 6.
1161
1162 ;*WRITE ZEROS TO THE REGISTER.
1163 ;*CHECK THAT ALL BITS ARE ZEROS.
1164
1165 000532 0 001000 0 0 2 000 LDMAR 0 ;CLEAR MAR
1166 000533 0 010000 0 4 0 000 LDMEM 0 ;WRITE ZEROS TO REG 6
1167 000534 0 044151 2 2 0 06 11 MOVMEM BCLO
1168 000535 0 032006 1 5 0 00 06 DATI BCLO,AC0 ;READ REG 6
1169 000536 0 040017 2 0 0 00 17 OSM AC0 ;CHECK IF ITS ALL ZEROS
1170 000537 0 114541 4 6 0541 JMPZ .+2 ;JUMP IF ZEROS
1171 000540 0 116104 4 7 0104 ERRORM TST,CAN NOT WRITE ALL ZEROS TO REG 6
1172
1173 ERLOOP TST ^SALL
1174 000541 0 002100 0 1 0 100
1175 000542 0 116145 4 7 0145
1176 000543 0 114532 4 6 0532
1177 ;*WRITE ONES TO THE REGISTER.
1178 ;*CHECK THAT ALL BITS ARE ONES.
1179
1180 000544 0 010377 0 4 0 377 REG6A: LDMEM -1 ;WRITE ONES TO REG 6
1181 000545 0 044151 2 2 0 06 11 MOVMEM BCLO
1182 000546 0 032006 1 5 0 00 06 DATI BCLO,AC0 ;READ REG 6
1183 000547 0 040017 2 0 0 00 17 OSM AC0 ;CHECK FOR ALL ONES
1184 000550 0 114552 4 6 0552 JMPZ .+2 ;JUMP IF ALL ONES
1185 000551 0 116104 4 7 0104 ERRORM REG6A,CAN NOT WRITE ALL ONES TO REG 6
1186
1187 ERLOOP REG6A ^SALL
1188 000552 0 002101 0 1 0 101
1189 000553 0 116145 4 7 0145
1190 000554 0 114544 4 6 0544
1191 ;*WRITE FLOATING ZEROS AND FLOATING ONES PATTERNS TO THE REGISTER.
1192 ;*READ IT BACK FOR THE WRITTEN PATTERN.
1193
1194 000555 0 002017 0 1 0 017 LDBR ^D15 ;SET LOOP COUNT MINUS ONE
1195 000556 0 072031 3 5 0 01 11 MOVB AC1
1196 000557 0 001040 0 0 2 040 LDMAR FLTZ ;SET MAR TO FIRST PATTERN
1197 000560 0 044151 2 2 0 06 11 FLT6: MOVMEM BCLO ;WRITE PATTERN TO REG 6
1198 000561 0 032006 1 5 0 00 06 DATI BCLO,AC0 ;READ REG 6
1199 000562 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE TO EXPECTED DATA
1200 000563 0 114565 4 6 0565 JMPZ .+2 ;JUMP IF CORRECT
1201 ERRORM FLT6,FLOATING ZEROS/ONES FAILED,^_
1202 000564 0 116104 4 7 0104 DIAG WROTE REG 6
1203
1204 ERLOOP FLT6 ^SALL
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 6-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1205 000565 0 002102 0 1 0 102
1206 000566 0 116145 4 7 0145
1207 000567 0 114560 4 6 0560
1208 000570 0 073427 3 5 3 01 07 DECR AC1,I ;DEC LOOP COUNT AND INC PATTERN ADDR
1209 000571 0 114573 4 6 0573 JMPZ .+2 ;JUMP IF DONE
1210 000572 0 100560 4 0 0560 JMP FLT6 ;ELSE, CONTINUE
1211
1212 000573 0 116173 4 7 0173 REPEAT TST
1213 000574 0 114532 4 6 0532
1214
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 7
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1215 TEST 203,TEST REGISTER 7 (BCHI)
1216 ;***********************************************************************
1217 ;* MCODE4 * TEST 203 * TEST REGISTER 7 (BCHI)
1218 ;***********************************************************************
1219 SALL
1220 000575 0 002313 0 1 0 313
1221 000576 0 116045 4 7 0045
1222
1223 000577 TST203: SALL
1224
1225 ;*TEST WRITING AND READING REGISTER 7.
1226
1227 ;*WRITE ZEROS TO THE REGISTER.
1228 ;*CHECK THAT ALL BITS ARE ZEROS.
1229
1230 000577 0 001000 0 0 2 000 LDMAR 0 ;CLEAR MAR
1231 000600 0 010000 0 4 0 000 LDMEM 0 ;WRITE ZEROS TO REG 7
1232 000601 0 044171 2 2 0 07 11 MOVMEM BCHI
1233 000602 0 032007 1 5 0 00 07 DATI BCHI,AC0 ;READ REG 7
1234 000603 0 040017 2 0 0 00 17 OSM AC0 ;CHECK IF ITS ALL ZEROS
1235 000604 0 114606 4 6 0606 JMPZ .+2 ;JUMP IF ZEROS
1236 000605 0 116104 4 7 0104 ERRORM TST,CAN NOT WRITE ALL ZEROS TO REG 7
1237
1238 ERLOOP TST ^SALL
1239 000606 0 002100 0 1 0 100
1240 000607 0 116145 4 7 0145
1241 000610 0 114577 4 6 0577
1242 ;*WRITE ONES TO THE REGISTER.
1243 ;*CHECK THAT ALL BITS ARE ONES.
1244
1245 000611 0 010377 0 4 0 377 REG7A: LDMEM -1 ;WRITE ONES TO REG 7
1246 000612 0 044171 2 2 0 07 11 MOVMEM BCHI
1247 000613 0 032007 1 5 0 00 07 DATI BCHI,AC0 ;READ REG 7
1248 000614 0 040017 2 0 0 00 17 OSM AC0 ;CHECK FOR ALL ONES
1249 000615 0 114617 4 6 0617 JMPZ .+2 ;JUMP IF ALL ONES
1250 000616 0 116104 4 7 0104 ERRORM REG7A,CAN NOT WRITE ALL ONES TO REG 7
1251
1252 ERLOOP REG7A ^SALL
1253 000617 0 002101 0 1 0 101
1254 000620 0 116145 4 7 0145
1255 000621 0 114611 4 6 0611
1256 ;*WRITE FLOATING ZEROS AND FLOATING ONES PATTERNS TO THE REGISTER.
1257 ;*READ IT BACK FOR THE WRITTEN PATTERN.
1258
1259 000622 0 002017 0 1 0 017 LDBR ^D15 ;SET LOOP COUNT MINUS ONE
1260 000623 0 072031 3 5 0 01 11 MOVB AC1
1261 000624 0 001040 0 0 2 040 LDMAR FLTZ ;SET MAR TO FIRST PATTERN
1262 000625 0 044171 2 2 0 07 11 FLT7: MOVMEM BCHI ;WRITE PATTERN TO REG 7
1263 000626 0 032007 1 5 0 00 07 DATI BCHI,AC0 ;READ REG 7
1264 000627 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE TO EXPECTED DATA
1265 000630 0 114632 4 6 0632 JMPZ .+2 ;JUMP IF CORRECT
1266 ERRORM FLT7,FLOATING ZEROS/ONES FAILED,^_
1267 000631 0 116104 4 7 0104 DIAG WROTE REG 7
1268
1269 ERLOOP FLT7 ^SALL
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 7-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1270 000632 0 002102 0 1 0 102
1271 000633 0 116145 4 7 0145
1272 000634 0 114625 4 6 0625
1273 000635 0 073427 3 5 3 01 07 DECR AC1,I ;DEC LOOP COUNT AND INC PATTERN ADDR
1274 000636 0 114640 4 6 0640 JMPZ .+2 ;JUMP IF DONE
1275 000637 0 100625 4 0 0625 JMP FLT7 ;ELSE, CONTINUE
1276
1277 000640 0 116173 4 7 0173 REPEAT TST
1278 000641 0 114577 4 6 0577
1279
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 8
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1280 TEST 204,TEST UNUSED READ ONLY BITS
1281 ;***********************************************************************
1282 ;* MCODE4 * TEST 204 * TEST UNUSED READ ONLY BITS
1283 ;***********************************************************************
1284 SALL
1285 000642 0 002314 0 1 0 314
1286 000643 0 116045 4 7 0045
1287
1288 000644 TST204: SALL
1289
1290 ;*CHECK THAT ALL UNUSED READ-ONLY BITS ARE READ AS ZEROS.
1291 ;*THE BITS ARE:
1292 ;* 7-4 IN REG 0
1293 ;* 7-4,0 IN REG 3
1294 ;* 7 IN REG 15
1295 ;* 7 IN REG 16
1296 ;* 7,6 IN REG 17
1297
1298 000644 0 032000 1 5 0 00 00 DATI REG0,AC0 ;READ REG 0
1299 000645 0 002017 0 1 0 017 LDBR 17 ;SET MASK OF NON ZERO BITS
1300 000646 0 070013 3 4 0 00 13 LANDB AC0,MEM ;ZERO UNUSED BITS IN CORRECT DATA
1301 000647 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE
1302 000650 0 114652 4 6 0652 JMPZ .+2 ;JUMP IF UNUSED BITS ALL ZERO
1303 000651 0 116104 4 7 0104 ERROR TST,BITS 7-4 IN REG 0 ARE NOT ALL ZEROS
1304
1305 ERLOOP TST ^SALL
1306 000652 0 002000 0 1 0 000
1307 000653 0 116141 4 7 0141
1308 000654 0 114644 4 6 0644
1309 000655 0 032003 1 5 0 00 03 UNUSE1: DATI REG3,AC0 ;READ REG 3
1310 000656 0 002016 0 1 0 016 LDBR 16 ;SET MASK OF NON ZERO BITS
1311 000657 0 070013 3 4 0 00 13 LANDB AC0,MEM ;ZERO UNUSED BITS IN CORRECT DATA
1312 000660 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE
1313 000661 0 114663 4 6 0663 JMPZ .+2 ;JUMP IF UNUSED BITS ALL ZERO
1314 000662 0 116104 4 7 0104 ERROR UNUSE1,BITS 7-4 AND 0 IN REG 3 ARE NOT ALL ZEROS
1315
1316 ERLOOP UNUSE1 ^SALL
1317 000663 0 002001 0 1 0 001
1318 000664 0 116141 4 7 0141
1319 000665 0 114655 4 6 0655
1320 000666 0 032015 1 5 0 00 15 UNUSE2: DATI REG15,AC0 ;READ REG 15
1321 000667 0 002177 0 1 0 177 LDBR 177 ;SET MASK OF NON ZERO BITS
1322 000670 0 070013 3 4 0 00 13 LANDB AC0,MEM ;ZERO UNUSED BITS IN CORRECT DATA
1323 000671 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE
1324 000672 0 114674 4 6 0674 JMPZ .+2 ;JUMP IF UNUSED BITS ALL ZERO
1325 000673 0 116104 4 7 0104 ERROR UNUSE2,BIT 7 IN REG 15 IS NOT ZERO
1326
1327 ERLOOP UNUSE2 ^SALL
1328 000674 0 002002 0 1 0 002
1329 000675 0 116141 4 7 0141
1330 000676 0 114666 4 6 0666
1331 000677 0 032016 1 5 0 00 16 UNUSE3: DATI REG16,AC0 ;READ REG 16
1332 000700 0 002177 0 1 0 177 LDBR 177 ;SET MASK OF NON ZERO BITS
1333 000701 0 070013 3 4 0 00 13 LANDB AC0,MEM ;ZERO UNUSED BITS IN CORRECT DATA
1334 000702 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 8-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1335 000703 0 114705 4 6 0705 JMPZ .+2 ;JUMP IF UNUSED BITS ALL ZERO
1336 000704 0 116104 4 7 0104 ERROR UNUSE3,BIT 7 IN REG 16 IS NOT ZERO
1337
1338 ERLOOP UNUSE3 ^SALL
1339 000705 0 002003 0 1 0 003
1340 000706 0 116141 4 7 0141
1341 000707 0 114677 4 6 0677
1342 000710 0 032017 1 5 0 00 17 UNUSE4: DATI REG17,AC0 ;READ REG 17
1343 000711 0 002077 0 1 0 077 LDBR 77 ;SET MASK OF NON ZERO BITS
1344 000712 0 070013 3 4 0 00 13 LANDB AC0,MEM ;ZERO UNUSED BITS IN CORRECT DATA
1345 000713 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE
1346 000714 0 114716 4 6 0716 JMPZ .+2 ;JUMP IF UNUSED BITS ALL ZERO
1347 000715 0 116104 4 7 0104 ERROR UNUSE4,BITS 7 AND 6 IN REG 17 ARE NOT ALL ZEROS
1348
1349 ERLOOP UNUSE4 ^SALL
1350 000716 0 002004 0 1 0 004
1351 000717 0 116141 4 7 0141
1352 000720 0 114710 4 6 0710
1353 000721 0 116173 4 7 0173 REPEAT TST
1354 000722 0 114644 4 6 0644
1355
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 9
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1356 TEST 205,TEST SETTING AND CLEARING OF "CLR RUN"
1357 ;***********************************************************************
1358 ;* MCODE4 * TEST 205 * TEST SETTING AND CLEARING OF "CLR RUN"
1359 ;***********************************************************************
1360 SALL
1361 000723 0 002315 0 1 0 315
1362 000724 0 116045 4 7 0045
1363
1364 000725 TST205: SALL
1365
1366 ;*TEST THAT THE "CLR RUN" FLOP CAN BE DIRECTLY SET AND CLEARED AND THAT
1367 ;*IT CAN BE SET AND CLEARED USING THE CLOCKED INPUTS.
1368
1369 ;*CLEAR "DX HIGH SPEED" AND ENABLE SINGLE STEPPING.
1370 ;*DO A HS DP INIT.
1371 ;*CHECK THAT "CLR RUN" IS SET.
1372
1373 000725 0 002000 0 1 0 000 LDBR 0 ;CLEAR "DX HIGH SPEED" AND ENABLE SINGLE STEP
1374 000726 0 064031 3 2 0 01 11 MOVB REG1
1375 000727 0 064271 3 2 0 13 11 MOVB HSDPIN ;DO A HS DP INIT
1376 000730 0 002373 0 1 0 373 LDBR 373 ;SET MASK OF ALL BUT "NOT CLR RUN" BIT
1377 000731 0 072011 3 5 0 00 11 MOVB AC0 ;MOVE MASK TO AC0
1378 000732 0 022016 1 1 0 00 16 DATI REG16,BR ;READ REG 16
1379 000733 0 060012 3 0 0 00 12 LORCB AC0 ;IF BIT IS CLEARED, RESULT IS ALL ONES
1380 000734 0 114736 4 6 0736 JMPZ .+2 ;JUMP IF CLEARED (CLR RUN = 1)
1381 000735 0 116104 4 7 0104 ERROR TST,"CLR RUN" DID NOT SET AFTER A HS DP INIT
1382
1383 ERLOOP TST ^SALL
1384 000736 0 002000 0 1 0 000
1385 000737 0 116141 4 7 0141
1386 000740 0 114725 4 6 0725
1387 ;*GENERATE A "SET RUN" PULSE.
1388 ;*CHECK THAT "CLR RUN" IS CLEARED.
1389
1390 000741 0 064311 3 2 0 14 11 CLRUN1: MOVB SETRUN ;GENERATE A "SET RUN" PULSE
1391 000742 0 022016 1 1 0 00 16 DATI REG16,BR ;READ REG 16
1392 000743 0 014000 0 6 0 000 SHR ;RIGHT ADJUST "NOT CLR RUN" BIT
1393 000744 0 014000 0 6 0 000 SHR
1394 000745 0 104747 4 2 0747 JMPB0 .+2 ;JUMP IF SET (CLR RUN=0)
1395 000746 0 116104 4 7 0104 ERROR TST,"CLR RUN" DID NOT CLEAR AFTER A "SET RUN"
1396
1397 ERLOOP TST ^SALL
1398 000747 0 002001 0 1 0 001
1399 000750 0 116141 4 7 0141
1400 000751 0 114725 4 6 0725
1401 ;*DO A HS DP INIT.
1402 ;*CHECK THAT "CLR RUN" IS SET.
1403
1404 000752 0 064271 3 2 0 13 11 CLRUN2: MOVB HSDPIN ;DO A HS DP INIT
1405 000753 0 002373 0 1 0 373 LDBR 373 ;SET MASK OF ALL BUT "NOT CLR RUN" BIT
1406 000754 0 072011 3 5 0 00 11 MOVB AC0 ;MOVE MASK TO AC0
1407 000755 0 022016 1 1 0 00 16 DATI REG16,BR ;READ REG 16
1408 000756 0 060012 3 0 0 00 12 LORCB AC0 ;IF BIT IS CLEARED, RESULT IS ALL ONES
1409 000757 0 114761 4 6 0761 JMPZ .+2 ;JUMP IF CLEARED (CLR RUN = 1)
1410 000760 0 116104 4 7 0104 ERROR CLRUN1,"CLR RUN" DID NOT SET AFTER A HS DP INIT
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 9-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1411
1412 ERLOOP CLRUN1 ^SALL
1413 000761 0 002002 0 1 0 002
1414 000762 0 116141 4 7 0141
1415 000763 0 114741 4 6 0741
1416 ;*SET "DX HIGH SPEED" AND GENERATE A SINGLE STEP PULSE.
1417 ;*CHECK THAT "CLR RUN" IS CLEARED.
1418
1419 000764 0 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED"
1420 000765 0 064031 3 2 0 01 11 MOVB REG1
1421 000766 0 064251 3 2 0 12 11 MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
1422 000767 0 022016 1 1 0 00 16 DATI REG16,BR ;READ REG 16
1423 000770 0 014000 0 6 0 000 SHR ;RIGHT ADJUST "NOT CLR RUN" BIT
1424 000771 0 014000 0 6 0 000 SHR
1425 000772 0 104774 4 2 0774 JMPB0 .+2 ;JUMP IF SET (CLR RUN = 0)
1426 ERROR CLRUN2,"CLR RUN" DID NOT CLEAR,^_
1427 <DIAG SET "DX HIGH SPEED" AND "CLR RUN"
1428 000773 0 116104 4 7 0104 THEN GENERATED A SINGLE STEP PULSE>
1429
1430 ERLOOP CLRUN2 ^SALL
1431 000774 0 002003 0 1 0 003
1432 000775 0 116141 4 7 0141
1433 000776 0 114752 4 6 0752
1434 ;*CLEAR "DX HIGH SPEED" AND GENERATE A SINGLE STEP PULSE.
1435 ;*CHECK THAT "CLR RUN" IS SET.
1436
1437 000777 0 002000 0 1 0 000 CLRUN3: LDBR 0 ;CLEAR "DX HIGH SPEED"
1438 001000 0 064031 3 2 0 01 11 MOVB REG1
1439 001001 0 064311 3 2 0 14 11 MOVB SETRUN ;GENERATE A "SET RUN" PULSE
1440 001002 0 064251 3 2 0 12 11 MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
1441 001003 0 002373 0 1 0 373 LDBR 373 ;SET MASK OF ALL BUT "NOT CLR RUN" BIT
1442 001004 0 072011 3 5 0 00 11 MOVB AC0 ;MOVE MASK TO AC0
1443 001005 0 022016 1 1 0 00 16 DATI REG16,BR ;READ REG 16
1444 001006 0 060012 3 0 0 00 12 LORCB AC0 ;IF BIT IS CLEARED, RESULT IS ALL ONES
1445 001007 0 115011 4 6 1011 JMPZ .+2 ;JUMP IF CLEARED (CLR RUN = 1)
1446 ERROR CLRUN3,"CLR RUN" DID NOT SET,^_
1447 <DIAG CLEARED "CLR RUN" AND "DX HIGH SPEED"
1448 001010 0 116104 4 7 0104 THEN GENERATED A SINGLE STEP PULSE>
1449
1450 ERLOOP CLRUN3 ^SALL
1451 001011 0 002004 0 1 0 004
1452 001012 0 116141 4 7 0141
1453 001013 0 114777 4 6 0777
1454 001014 0 116173 4 7 0173 REPEAT TST
1455 001015 0 114725 4 6 0725
1456
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 10
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1457 TEST 206,TEST SETTING AND CLEARING OF "RUN"
1458 ;***********************************************************************
1459 ;* MCODE4 * TEST 206 * TEST SETTING AND CLEARING OF "RUN"
1460 ;***********************************************************************
1461 SALL
1462 001016 0 002316 0 1 0 316
1463 001017 0 116045 4 7 0045
1464
1465 001020 TST206: SALL
1466
1467 ;*TEST THE DIRECT SETTING AND CLEARING OF "RUN" USING THE "SET RUN"
1468 ;*AND "CLR RUN" PULSES, RESPECTIVELY.
1469
1470 ;*ENABLE SINGLE STEPPING TO STOP THE BASE CLOCK.
1471 ;*GENERATE A "SET RUN" PULSE.
1472 ;*CHECK THAT "RUN" IS SET.
1473
1474 001020 0 064311 3 2 0 14 11 MOVB SETRUN ;GENERATE A "SET RUN" PULSE
1475 001021 0 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
1476 001022 0 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT RUN" BIT INTO BIT 4
1477 001023 0 107025 4 3 1025 JMPB4 .+2 ;JUMP IF SET (RUN = 0)
1478 001024 0 101026 4 0 1026 JMP .+2 ;JUMP IF CLEAR (RUN = 1)
1479 001025 0 116104 4 7 0104 ERROR TST,"RUN" DID NOT SET AFTER A "SET RUN" PULSE
1480
1481 ERLOOP TST ^SALL
1482 001026 0 002000 0 1 0 000
1483 001027 0 116141 4 7 0141
1484 001030 0 115020 4 6 1020
1485 ;*DO A HS DP INIT.
1486 ;*CHECK THAT "RUN" IS CLEARED.
1487
1488 001031 0 064271 3 2 0 13 11 RUN1: MOVB HSDPIN ;GENERATE "CLR RUN"
1489 001032 0 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
1490 001033 0 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT RUN" BIT INTO BIT 4
1491 001034 0 107036 4 3 1036 JMPB4 .+2 ;JUMP IF SET (RUN = 0)
1492 001035 0 116104 4 7 0104 ERROR TST,"RUN" DID NOT CLEAR AFTER A HS DP INIT
1493
1494 ERLOOP TST ^SALL
1495 001036 0 002001 0 1 0 001
1496 001037 0 116141 4 7 0141
1497 001040 0 115020 4 6 1020
1498 ;*GENERATE A "SET RUN" PULSE.
1499 ;*CHECK THAT "RUN" IS SET.
1500
1501 001041 0 064311 3 2 0 14 11 MOVB SETRUN ;GENERATE A "SET RUN" PULSE
1502 001042 0 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
1503 001043 0 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT RUN" BIT INTO BIT 4
1504 001044 0 107046 4 3 1046 JMPB4 .+2 ;JUMP IF SET (RUN = 0)
1505 001045 0 101047 4 0 1047 JMP .+2 ;JUMP IF CLEAR (RUN = 1)
1506 001046 0 116104 4 7 0104 ERROR RUN1,"RUN" DID NOT SET AFTER A "SET RUN" PULSE
1507
1508 ERLOOP RUN1 ^SALL
1509 001047 0 002002 0 1 0 002
1510 001050 0 116141 4 7 0141
1511 001051 0 115031 4 6 1031
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 10-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1512 001052 0 116173 4 7 0173 REPEAT TST
1513 001053 0 115020 4 6 1020
1514
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 11
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1515 TEST 207,TEST DF CLOCK PHASES
1516 ;***********************************************************************
1517 ;* MCODE4 * TEST 207 * TEST DF CLOCK PHASES
1518 ;***********************************************************************
1519 SALL
1520 001054 0 002317 0 1 0 317
1521 001055 0 116045 4 7 0045
1522
1523 001056 TST207: SALL
1524
1525 ;*VERIFY THAT THE DF CLOCK PHASES CYCLE CORRECTLY (USING SINGLE
1526 ;*STEP MODE). ALSO CHECK THAT CLEARING "RUN" STOPS THE CLOCK WITH
1527 ;*CLK PH 0 = 0, CLK PH 1 = 0.
1528
1529 ;*ENABLE BASE CLOCK AND CLEAR "DX HIGH SPEED" TO CLEAR "RUN".
1530 ;*CHECK THAT THE CLOCK PHASES ARE CLEARED.
1531
1532 001056 0 001000 0 0 2 000 LDMAR 0 ;RESET MAR TO ZERO
1533 001057 0 002002 0 1 0 002 LDBR BCLKEN ;ENABLE THE BASE CLOCK
1534 001060 0 064031 3 2 0 01 11 MOVB REG1
1535 001061 0 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
1536 001062 0 002060 0 1 0 060 LDBR DFCPH1+DFCPH0 ;SET MASK OF DF CLK PHASE BITS
1537 001063 0 072013 3 5 0 00 13 LANDBR AC0 ;ISOLATE PHASE BITS
1538 001064 0 010000 0 4 0 000 LDMEM 0 ;SET EXPECTED STATES
1539 001065 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE ACTUAL WITH EXPECTED
1540 001066 0 115070 4 6 1070 JMPZ .+2 ;JUMP IF CORRECT
1541 ERRORM TST,DF CLOCK PHASES DID NOT BOTH CLEAR,^_
1542 <DIAG ENABLED BASE CLOCK AND CLEARED "DX HIGH SPEED".
1543 001067 0 116104 4 7 0104 CORRECT AND ACTUAL ARE REG 16 WITH PHASE BITS MASKED>
1544
1545 ERLOOP TST ^SALL
1546 001070 0 002100 0 1 0 100
1547 001071 0 116145 4 7 0145
1548 001072 0 115056 4 6 1056
1549 ;*ENABLE SINGLE STEPPING AND SET "RUN".
1550 ;*GENERATE A SINGLE STEP PULSE.
1551 ;*CHECK THAT CLOCK PHASES ADVANCE CORRECTLY.
1552
1553 001073 0 001010 0 0 2 010 LDMAR CLKPHF ;SET MAR TO FIRST EXPECTED PHASE STATE
1554 001074 0 002000 0 1 0 000 LDBR 0 ;ENABLE SINGLE STEP MODE
1555 001075 0 064031 3 2 0 01 11 MOVB REG1
1556 001076 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
1557 001077 0 064251 3 2 0 12 11 MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
1558 001100 0 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
1559 001101 0 002060 0 1 0 060 LDBR DFCPH1+DFCPH0 ;SET MASK OF DF CLK PHASE BITS
1560 001102 0 072013 3 5 0 00 13 LANDBR AC0 ;ISOLATE THE PHASE BITS
1561 001103 0 041417 2 0 3 00 17 OSM AC0,I ;CHECK CLK PHASE STATES
1562 001104 0 115106 4 6 1106 JMPZ .+2 ;JUMP IF CORRECT
1563 ERRORM TST,CLOCK PHASES DID NOT ADVANCE CORRECTLY,^_
1564 <DIAG CLEARED CLOCK AND SET "RUN" THEN GENERATED A SINGLE STEP PULSE.
1565 001105 0 116104 4 7 0104 CORRECT AND ACTUAL ARE REG 16 WITH PHASE BITS MASKED>
1566
1567 ERLOOP TST ^SALL
1568 001106 0 002101 0 1 0 101
1569 001107 0 116145 4 7 0145
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 11-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1570 001110 0 115056 4 6 1056
1571 ;*DO A HS DP INIT TO CLEAR "RUN".
1572 ;*GENERATE 3 SINGLE STEP PULSES.
1573 ;*CHECK THAT CLOCK PHASES ADVANCE CORRECTLY AFTER EACH PULSE.
1574
1575 001111 0 064271 3 2 0 13 11 MOVB HSDPIN ;CLEAR "RUN"
1576 001112 0 002002 0 1 0 002 LDBR 2 ;SET LOOP COUNT MINUS 1
1577 001113 0 072031 3 5 0 01 11 MOVB AC1
1578 001114 0 064251 3 2 0 12 11 CLKLP1: MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
1579 001115 0 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
1580 001116 0 002060 0 1 0 060 LDBR DFCPH1+DFCPH0 ;SET MASK OF DF CLK PHASE BITS
1581 001117 0 072013 3 5 0 00 13 LANDBR AC0 ;ISOLATE THE PHASE BITS
1582 001120 0 040017 2 0 0 00 17 OSM AC0 ;CHECK CLK PHASE STATES
1583 001121 0 115123 4 6 1123 JMPZ .+2 ;JUMP IF CORRECT
1584 ERRORM TST,CLOCK PHASES DID NOT ADVANCE CORRECTLY,^_
1585 <DIAG CLEARED CLOCK AND SET "RUN" THEN GENERATED SINGLE STEP PULSES.
1586 001122 0 116104 4 7 0104 CORRECT AND ACTUAL ARE REG 16 WITH PHASE BITS MASKED>
1587
1588 ERLOOP TST ^SALL
1589 001123 0 002102 0 1 0 102
1590 001124 0 116145 4 7 0145
1591 001125 0 115056 4 6 1056
1592 001126 0 073427 3 5 3 01 07 DECR AC1,I ;DEC LOOP COUNT AND INC STATUS ADDR
1593 001127 0 115131 4 6 1131 JMPZ .+2 ;JUMP IF DONE
1594 001130 0 101114 4 0 1114 JMP CLKLP1 ;ELSE, CONTINUE
1595
1596 ;*SET "RUN" AND GENERATE A "LOAD ROM DATA" PULSE.
1597 ;*CHECK THAT "CLK PH 0" IS SET.
1598
1599 001131 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
1600 001132 0 064231 3 2 0 11 11 DFCLK1: MOVB LDRMDA ;GEN LOAD ROM DATA PULSE (SETS CLK PH 0)
1601 001133 0 022016 1 1 0 00 16 DATI REG16,BR ;READ REG 16 FOR "CLK PH 0"
1602 001134 0 107136 4 3 1136 JMPB4 .+2 ;JUMP IF IT SET CORRECTLY
1603 001135 0 116104 4 7 0104 ERROR DFCLK1,"CLK PH 0" DID NOT SET AFTER A "LD ROM DATA" PULSE
1604
1605 ERLOOP DFCLK1 ^SALL
1606 001136 0 002003 0 1 0 003
1607 001137 0 116141 4 7 0141
1608 001140 0 115132 4 6 1132
1609 001141 0 116173 4 7 0173 REPEAT TST
1610 001142 0 115056 4 6 1056
1611
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 12
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1612 TEST 208,TEST REGISTER 10 (DFRMAD)
1613 ;***********************************************************************
1614 ;* MCODE4 * TEST 208 * TEST REGISTER 10 (DFRMAD)
1615 ;***********************************************************************
1616 SALL
1617 001143 0 002320 0 1 0 320
1618 001144 0 116045 4 7 0045
1619
1620 001145 TST208: SALL
1621
1622 ;*TEST WRITING AND READING REGISTER 10.
1623
1624 ;*CLEAR "DX HIGH SPEED" AND ENABLE BASE CLOCK TO CLEAR "CLK PH 0".
1625 ;*WRITE ZEROS TO THE REGISTER.
1626 ;*CHECK THAT ALL BITS ARE ZEROS.
1627
1628 001145 0 001000 0 0 2 000 LDMAR 0 ;CLEAR MAR
1629 001146 0 002002 0 1 0 002 LDBR BCLKEN ;CLEAR "DX HIGH SPEED" AND ENABLE BASE CLK
1630 001147 0 064031 3 2 0 01 11 MOVB REG1
1631 001150 0 010000 0 4 0 000 LDMEM 0 ;SETUP DATA
1632 001151 0 044211 2 2 0 10 11 MOVMEM DFRMAD ;WRITE ZEROS TO REG 10
1633 001152 0 032010 1 5 0 00 10 DATI DFRMAD,AC0 ;READ REG 10
1634 001153 0 040017 2 0 0 00 17 OSM AC0 ;CHECK IF ITS ALL ZEROS
1635 001154 0 115156 4 6 1156 JMPZ .+2 ;JUMP IF ZEROS
1636 001155 0 116104 4 7 0104 ERRORM TST,CAN NOT WRITE ALL ZEROS TO REG 10
1637
1638 ERLOOP TST ^SALL
1639 001156 0 002100 0 1 0 100
1640 001157 0 116145 4 7 0145
1641 001160 0 115145 4 6 1145
1642 ;*WRITE ONES TO THE REGISTER.
1643 ;*CHECK THAT ALL BITS ARE ONES.
1644
1645 001161 0 010377 0 4 0 377 REG10A: LDMEM -1 ;WRITE ONES TO REG 10
1646 001162 0 044211 2 2 0 10 11 MOVMEM DFRMAD
1647 001163 0 032010 1 5 0 00 10 DATI DFRMAD,AC0 ;READ REG 10
1648 001164 0 040017 2 0 0 00 17 OSM AC0 ;CHECK FOR ALL ONES
1649 001165 0 115167 4 6 1167 JMPZ .+2 ;JUMP IF ALL ONES
1650 001166 0 116104 4 7 0104 ERRORM REG10A,CAN NOT WRITE ALL ONES TO REG 10
1651
1652 ERLOOP REG10A ^SALL
1653 001167 0 002101 0 1 0 101
1654 001170 0 116145 4 7 0145
1655 001171 0 115161 4 6 1161
1656 ;*DO A MICROBUS INIT.
1657 ;*CHECK THAT ALL BITS GET CLEARED.
1658
1659 001172 0 002167 0 1 0 167 GOSUB INITL ;GO DO A MICROBUS INIT
1660 001173 0 177631 7 7 3 11 11
1661 001174 0 032010 1 5 0 00 10 DATI DFRMAD,AC0 ;READ REG 10
1662 001175 0 040017 2 0 0 00 17 OSM AC0 ;CHECK IF IT CLEARED
1663 001176 0 115200 4 6 1200 JMPZ .+2 ;JUMP IF IT DID
1664 001177 0 116104 4 7 0104 ERRORM REG10A,CAN NOT CLEAR REG 10 WITH A MICROBUS INIT
1665
1666 ERLOOP REG10A ^SALL
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 12-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1667 001200 0 002102 0 1 0 102
1668 001201 0 116145 4 7 0145
1669 001202 0 115161 4 6 1161
1670 ;*WRITE FLOATING ZEROS AND FLOATING ONES PATTERNS TO THE REGISTER.
1671 ;*READ IT BACK FOR THE WRITTEN PATTERN.
1672
1673 001203 0 002017 0 1 0 017 LDBR ^D15 ;SET LOOP COUNT MINUS ONE
1674 001204 0 072031 3 5 0 01 11 MOVB AC1
1675 001205 0 001040 0 0 2 040 LDMAR FLTZ ;SET MAR TO FIRST PATTERN
1676 001206 0 044211 2 2 0 10 11 FLT10: MOVMEM DFRMAD ;WRITE PATTERN TO REG 10
1677 001207 0 032010 1 5 0 00 10 DATI DFRMAD,AC0 ;READ REG 10
1678 001210 0 040017 2 0 0 00 17 OSM AC0 ;COMPARE TO EXPECTED DATA
1679 001211 0 115213 4 6 1213 JMPZ .+2 ;JUMP IF CORRECT
1680 ERRORM FLT10,FLOATING ZEROS/ONES FAILED,^_
1681 001212 0 116104 4 7 0104 DIAG WROTE REG 10
1682
1683 ERLOOP FLT10 ^SALL
1684 001213 0 002103 0 1 0 103
1685 001214 0 116145 4 7 0145
1686 001215 0 115206 4 6 1206
1687 001216 0 073427 3 5 3 01 07 DECR AC1,I ;DEC LOOP COUNT AND INC PATTERN ADDR
1688 001217 0 115221 4 6 1221 JMPZ .+2 ;JUMP IF DONE
1689 001220 0 101206 4 0 1206 JMP FLT10 ;ELSE, CONTINUE
1690
1691 001221 0 116173 4 7 0173 REPEAT TST
1692 001222 0 115145 4 6 1145
1693
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 13
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1694 TEST 209,TEST CONTENTS OF DF ROM
1695 ;***********************************************************************
1696 ;* MCODE4 * TEST 209 * TEST CONTENTS OF DF ROM
1697 ;***********************************************************************
1698 SALL
1699 001223 0 002321 0 1 0 321
1700 001224 0 116045 4 7 0045
1701
1702 001225 TST209: SALL
1703
1704 ;*VERIFY THAT EACH ROM LOCATION CONTAINS THE CORRECT DATA.
1705
1706 ;*CLEAR CLOCK PHASES.
1707 ;*CLEAR "DX HIGH SPEED".
1708 ;*LOAD THE ROM ADDRESS.
1709 ;*GENERATE A "LOAD ROM DATA" PULSE TO LATCH ROM DATA 15-0.
1710 ;*SET "DX HIGH SPEED".
1711 ;*LOAD ROM ADDRESS AGAIN TO CLOCK ROM DATA 19-16 INTO ADDRESS BITS 3-0.
1712 ;*CHECK THAT BITS 19-0 OF ROM DATA ARE CORRECT.
1713
1714 001225 0 001000 0 0 2 000 LDMAR 0 ;CLEAR MAR
1715 001226 0 000400 0 0 1 000 LDMARX 0 ;CLEAR MAR EXT BITS
1716 001227 0 010002 0 4 0 002 LDMEM 2 ;SETUP ADD PNT ROUTINE NUMBER
1717 001230 0 002221 0 1 0 221 GOSUB SETPNT
1718 001231 0 177631 7 7 3 11 11
1719 001232 0 002002 0 1 0 002 LDBR BCLKEN ;ENABLE BASE CLK AND CLEAR "DX HIGH SPEED"
1720 001233 0 064031 3 2 0 01 11 MOVB REG1
1721 001234 0 002000 0 1 0 000 LDBR 0 ;SET FIRST ROM ADDR =0
1722 001235 0 072031 3 5 0 01 11 MOVB AC1
1723 001236 0 072071 3 5 0 03 11 MOVB AC3 ;SET MAR EXT BITS COUNTER TO 0
1724 001237 0 064051 3 2 0 02 11 MOVB REG2 ;CLEAR ROM ADDR BIT 8
1725 001240 0 002060 0 1 0 060 LDBR ROMDAT ;SETUP ADDR OF ROM DATA TABLE
1726 001241 0 072051 3 5 0 02 11 MOVB AC2
1727 001242 0 002000 0 1 0 000 ROMLP: LDBR 0 ;CLEAR "DX HIGH SPEED"
1728 001243 0 064031 3 2 0 01 11 MOVB REG1
1729 001244 0 062030 3 1 0 01 10 MOV AC1,BR ;PUT ROM ADDR INTO BR
1730 001245 0 064211 3 2 0 10 11 MOVB DFRMAD ;SET BITS 7-0 OF ADDR
1731 001246 0 064231 3 2 0 11 11 MOVB LDRMDA ;CLOCK ROM DATA 15-0 INTO FLOPS
1732 001247 0 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED"
1733 001250 0 064031 3 2 0 01 11 MOVB REG1
1734 001251 0 062030 3 1 0 01 10 MOV AC1,BR ;PUT ROM ADDR INTO BR AGAIN
1735 001252 0 064211 3 2 0 10 11 MOVB DFRMAD ;GEN A LOAD ROM ADDR PULSE, CLOCKS
1736 ;DATA BITS 19-16 INTO 3-0 OF ADDR
1737 001253 0 032122 1 5 0 05 02 DATI REG2,AC5 ;READ ROM ADDR BIT 8
1738 001254 0 002011 0 1 0 011 LDBR 11 ;SELECT MASSBUS INTERFACE
1739 001255 0 066371 3 3 0 17 11 MOVB IOSEL
1740 001256 0 002001 0 1 0 001 LDBR RMADR8 ;SET MASK FOR ADDR BIT 8
1741 001257 0 062133 3 1 0 05 13 LANDB AC5,BR ;ISOLATE IT
1742 001260 0 064331 3 2 0 15 11 MOVB MPGP5 ;STORE IT FOR PRINTOUT
1743 001261 0 002022 0 1 0 022 LDBR 22 ;SELECT DATA PATH
1744 001262 0 066371 3 3 0 17 11 MOVB IOSEL
1745 001263 0 032011 1 5 0 00 11 DATI RMDALO,AC0 ;READ BITS 7-0 OF ROM LOC
1746 001264 0 032132 1 5 0 05 12 DATI RMDAHI,AC5 ;READ BITS 15-8 OF ROM LOC
1747 001265 0 032110 1 5 0 04 10 DATI DFRMAD,AC4 ;READ BITS 19-16 OF ROM LOC AS
1748 001266 0 002017 0 1 0 017 LDBR 17 ;BITS 3-0 OF ROM ADDR
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MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1749 001267 0 072113 3 5 0 04 13 LANDBR AC4
1750 001270 0 002242 0 1 0 242 GOSUB STRDAT ;GO SETUP CORRECT AND ACTUAL DATA
1751 001271 0 177631 7 7 3 11 11
1752 001272 0 061050 3 0 2 02 10 MOV AC2,MAR ;SET MAR TO ROM DATA TABLE ENTRY
1753 001273 0 060470 3 0 1 03 10 MOV AC3,MARX ;SET MAR EXT BITS
1754 001274 0 041417 2 0 3 00 17 OSM AC0,I ;COMPARE BITS 7-0 WITH EXPECTED
1755 001275 0 115277 4 6 1277 JMPZ .+2 ;JUMP IF CORRECT
1756 001276 0 101304 4 0 1304 JMP ROMERR ;ELSE, REPORT ERROR
1757 001277 0 041537 2 0 3 05 17 OSM AC5,I ;COMPARE BITS 15-8 WITH EXPECTED
1758 001300 0 115302 4 6 1302 JMPZ .+2 ;JUMP IF CORRECT
1759 001301 0 101304 4 0 1304 JMP ROMERR ;ELSE, REPORT ERROR
1760 001302 0 040117 2 0 0 04 17 OSM AC4 ;COMPARE BITS 19-16 WITH EXPECTED
1761 001303 0 115305 4 6 1305 JMPZ .+2 ;JUMP IF CORRECT
1762 001304 0 116104 4 7 0104 ROMERR: ERROR ROMLP,INCORRECT ROM DATA,,PNT
1763
1764 ERLOOP ROMLP ^SALL
1765 001305 0 002200 0 1 0 200
1766 001306 0 116141 4 7 0141
1767 001307 0 115242 4 6 1242
1768 001310 0 022002 1 1 0 00 02 DATI REG2,BR ;READ ROM ADDR BIT 8
1769 001311 0 105330 4 2 1330 JMPB0 ISSET ;JUMP IF IT'S SET
1770 001312 0 072023 3 5 0 01 03 INCR AC1 ;INC BITS 7-0 OF ADDRESS
1771 001313 0 113325 4 5 1325 JMPC SET8 ;JUMP IF THEY OVERFLOWED, SET BIT 8
1772 001314 0 002037 0 1 0 037 LDBR (377-ZERADR) ;SET CONSTANT TO PRODUCE CARRY WHEN
1773 001315 0 062020 3 1 0 01 00 ADB AC1,BR ;ADDR IS PAST NON ZERO DATA
1774 001316 0 113242 4 5 1242 JMPC ROMLP ;JUMP IF INTO ZERO DATA
1775 001317 0 002003 0 1 0 003 ADVPTR: LDBR 3 ;ADVANCE DATA TABLE PTR TO NEXT ENTRY
1776 001320 0 072040 3 5 0 02 00 ADBR AC2 ;EACH ENTRY IS 3 WORDS LONG
1777 001321 0 113323 4 5 1323 JMPC .+2 ;JUMP IF OVERFLOW OF MEM ADDR
1778 001322 0 101242 4 0 1242 JMP ROMLP ;ELSE CONTINUE
1779 001323 0 072063 3 5 0 03 03 INCR AC3 ;INC MAR EXT BITS COUNTER
1780 001324 0 101242 4 0 1242 JMP ROMLP ;CONTINUE
1781
1782 001325 0 002001 0 1 0 001 SET8: LDBR RMADR8 ;SET ROM ADDR BIT 8
1783 001326 0 064051 3 2 0 02 11 MOVB REG2
1784 001327 0 101242 4 0 1242 JMP ROMLP ;CONTINUE
1785
1786 001330 0 072023 3 5 0 01 03 ISSET: INCR AC1 ;INC BITS 7-0 OF ADDR
1787 001331 0 113336 4 5 1336 JMPC ROMFIN ;JUMP IF OVERFLOW, DONE
1788 001332 0 002070 0 1 0 070 LDBR (400-DIAGAD) ;SET CONSTANT TO PRODUCE CARRY WHEN
1789 001333 0 062020 3 1 0 01 00 ADB AC1,BR ;WHEN REACH NONZERO DATA
1790 001334 0 113317 4 5 1317 JMPC ADVPTR ;JUMP IF INTO NONZERO DATA
1791 001335 0 101242 4 0 1242 JMP ROMLP ;ELSE, USE ZERO DATA FOR COMPARE
1792
1793 001336 0 116173 4 7 0173 ROMFIN: REPEAT TST
1794 001337 0 115225 4 6 1225
1795
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 14
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1796 TEST 210,TEST GENERATION OF "FMTR END XFER"
1797 ;***********************************************************************
1798 ;* MCODE4 * TEST 210 * TEST GENERATION OF "FMTR END XFER"
1799 ;***********************************************************************
1800 SALL
1801 001340 0 002322 0 1 0 322
1802 001341 0 116045 4 7 0045
1803
1804 001342 TST210: SALL
1805
1806 ;*CLEAR CLOCK PHASES.
1807 ;*CLEAR "RUN" AND "ROM 00".
1808 ;*CLEAR "SLVE WOR END XFER" ON CB BOARD.
1809 ;*CHECK THAT "FMTR END XFER" IS NOT SET.
1810
1811 001342 0 002002 0 1 0 002 LDBR BCLKEN ;ENABLE BASE CLK AND CLEAR "DX HIGH SPEED"
1812 001343 0 064031 3 2 0 01 11 MOVB REG1
1813 001344 0 002176 0 1 0 176 GOSUB DEVRD ;SETUP DEVICE READ
1814 001345 0 177631 7 7 3 11 11
1815 001346 0 064271 3 2 0 13 11 MOVB HSDPIN ;CLEAR "RUN"
1816 001347 0 002001 0 1 0 001 LDBR RMADR8 ;SET ROM ADR BIT 8
1817 001350 0 064051 3 2 0 02 11 MOVB REG2
1818 001351 0 002320 0 1 0 320 LDBR ZEROS ;SET ROM ADR TO POINT TO LOC WITH
1819 001352 0 064211 3 2 0 10 11 MOVB DFRMAD ;"ROM 00"=0
1820 001353 0 002235 0 1 0 235 GOSUB ENSS ;SET "DX HIGH SPEED" AND ENABLE SINGLE STEP
1821 001354 0 177631 7 7 3 11 11
1822 001355 0 032003 1 5 0 00 03 DATI REG3,AC0 ;READ REG 3
1823 001356 0 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT FMTR END XFER" BIT TO BIT 7
1824 001357 0 107361 4 3 1361 JMPB4 .+2 ;JUMP IF SET ("FMTR END XFER" = 0)
1825 ERROR TST,"FMTR END XFER" SET WHEN IT SHOULDN'T HAVE,^_
1826 001360 0 116104 4 7 0104 DIAG CLEARED "RUN" AND "SLVE WOR END XFER" AND "ROM 00"
1827
1828 ERLOOP TST ^SALL
1829 001361 0 002000 0 1 0 000
1830 001362 0 116141 4 7 0141
1831 001363 0 115342 4 6 1342
1832 ;*SET "SLVE WOR END XFER".
1833 ;*CHECK THAT "FMTR END XFER" IS SET.
1834
1835 001364 0 002264 0 1 0 264 FEX1: GOSUB SWEX ;GO SET "SLVE WOR END XFER"
1836 001365 0 177631 7 7 3 11 11
1837 001366 0 032003 1 5 0 00 03 DATI REG3,AC0 ;READ REG 3
1838 001367 0 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT FMTR END XFER" BIT TO BIT 7
1839 001370 0 107372 4 3 1372 JMPB4 .+2 ;JUMP IF SET ("FMTR END XFER" = 0)
1840 001371 0 101373 4 0 1373 JMP .+2 ;JUMP IF CLEAR ("FMTR END XFER" = 1)
1841 ERROR FEX1,"FMTR END XFER" DID NOT SET,^_
1842 001372 0 116104 4 7 0104 DIAG SET "SLVE WOR END XFER" AND CLEARED "RUN" AND "ROM 00"
1843
1844 ERLOOP FEX1 ^SALL
1845 001373 0 002001 0 1 0 001
1846 001374 0 116141 4 7 0141
1847 001375 0 115364 4 6 1364
1848 ;*SET "RUN".
1849 ;*CHECK THAT "FMTR END XFER" IS CLEAR.
1850
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 14-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1851 001376 0 064311 3 2 0 14 11 FEX2: MOVB SETRUN ;SET "RUN"
1852 001377 0 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
1853 001400 0 032003 1 5 0 00 03 DATI REG3,AC0 ;READ REG 3
1854 001401 0 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT FMTR END XFER" BIT TO BIT 7
1855 001402 0 107404 4 3 1404 JMPB4 .+2 ;JUMP IF SET ("FMTR END XFER" = 0)
1856 ERROR FEX2,"FMTR END XFER" SET WHEN IT SHOULDN'T HAVE,^_
1857 001403 0 116104 4 7 0104 DIAG SET "RUN" AND "SLVE WOR END XFER" AND CLEARED "ROM 00"
1858
1859 ERLOOP FEX2 ^SALL
1860 001404 0 002002 0 1 0 002
1861 001405 0 116141 4 7 0141
1862 001406 0 115376 4 6 1376
1863 ;*SET "ROM 00" AND CLEAR "RUN".
1864 ;*CHECK THAT "FMTR END XFER" IS CLEAR.
1865
1866 001407 0 002000 0 1 0 000 FEX3: LDBR 0 ;CLEAR "DX HIGH SPEED"
1867 001410 0 064031 3 2 0 01 11 MOVB REG1
1868 001411 0 064271 3 2 0 13 11 MOVB HSDPIN ;CLEAR "RUN"
1869 001412 0 002321 0 1 0 321 LDBR ONES ;LOAD ROM ADDR TO POINT TO LOC WITH
1870 001413 0 064211 3 2 0 10 11 MOVB DFRMAD ;"ROM 00"=1
1871 001414 0 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED" AND ENABLE SINGLE STEP
1872 001415 0 064031 3 2 0 01 11 MOVB REG1
1873 001416 0 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
1874 001417 0 032003 1 5 0 00 03 DATI REG3,AC0 ;READ REG 3
1875 001420 0 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT FMTR END XFER" BIT TO BIT 7
1876 001421 0 107423 4 3 1423 JMPB4 .+2 ;JUMP IF SET ("FMTR END XFER" = 0)
1877 ERROR FEX3,"FMTR END XFER" SET WHEN IT SHOULDN'T HAVE,^_
1878 001422 0 116104 4 7 0104 DIAG SET "SLVE WOR END XFER" AND "ROM 00" AND CLEARED "RUN"
1879
1880 ERLOOP FEX3 ^SALL
1881 001423 0 002003 0 1 0 003
1882 001424 0 116141 4 7 0141
1883 001425 0 115407 4 6 1407
1884 001426 0 002167 0 1 0 167 GOSUB INITL ;GO DO A MICROBUS INIT
1885 001427 0 177631 7 7 3 11 11
1886 001430 0 116173 4 7 0173 REPEAT TST
1887 001431 0 115342 4 6 1342
1888
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 15
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1889 TEST 211,TEST "EXTEND RUN"
1890 ;***********************************************************************
1891 ;* MCODE4 * TEST 211 * TEST "EXTEND RUN"
1892 ;***********************************************************************
1893 SALL
1894 001432 0 002323 0 1 0 323
1895 001433 0 116045 4 7 0045
1896
1897 001434 TST211: SALL
1898
1899 ;*TEST THAT "EXTEND RUN" SETS WHEN AND ONLY WHEN
1900 ;* (1) "SLVE END XFER" IS NEGATED, AND
1901 ;* (2) "CLK PH 1" IS ASSERTED, AND
1902 ;* (3) ROM SHIFT COUNT = 7.
1903 ;*ALSO, CHECK THAT IT CLEARS WHEN "CC 0" CLEARS OR WHEN "HS DP INIT"
1904 ;*IS ASSERTED.
1905
1906 ;*CLEAR CLOCK PHASES.
1907 ;*CLEAR "SLVE END XFER".
1908 ;*LOAD ROM ADDR FOR SHIFT COUNT =7.
1909 ;*SET "DX HIGH SPEED" AND ENABLE SINGLE STEP.
1910 ;*CHECK THAT "EXTEND RUN" IS NOT SET YET.
1911
1912 001434 0 002167 0 1 0 167 GOSUB INITL ;DO A MICROBUS INIT
1913 001435 0 177631 7 7 3 11 11
1914 001436 0 002002 0 1 0 002 LDBR BCLKEN ;CLEAR CLOCK PHASES
1915 001437 0 064031 3 2 0 01 11 MOVB REG1
1916 001440 0 002001 0 1 0 001 LDBR RMADR8 ;SET ROM ADDR BIT 8
1917 001441 0 064051 3 2 0 02 11 MOVB REG2
1918 001442 0 002347 0 1 0 347 LDBR DSHF7 ;SET SHIFT COUNT=7
1919 001443 0 064211 3 2 0 10 11 MOVB DFRMAD
1920 001444 0 002235 0 1 0 235 GOSUB ENSS ;SET "DX HIGH SPEED" AND ENABLE SINGLE STEP
1921 001445 0 177631 7 7 3 11 11
1922 001446 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
1923 001447 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
1924 001450 0 111452 4 4 1452 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
1925 001451 0 101453 4 0 1453 JMP .+2 ;ELSE, OKAY
1926 ERROR TST,"EXTEND RUN" SET WITH "CLK PH 1" CLEARED,^_
1927 001452 0 116104 4 7 0104 DIAG CLEARED "SLVE END XFER" AND SET SHIFT COUNT=7
1928
1929 ERLOOP TST ^SALL
1930 001453 0 002000 0 1 0 000
1931 001454 0 116141 4 7 0141
1932 001455 0 115434 4 6 1434
1933 ;*SET "RUN".
1934 ;*GENERATE 2 SINGLE STEP PULSES TO SET "CLK PH 1".
1935 ;*CHECK THAT "EXTEND RUN" IS SET.
1936
1937 001456 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
1938 001457 0 002216 0 1 0 216 GOSUB PULSE2 ;GENERATE 2 SINGLE STEP PULSES
1939 001460 0 177631 7 7 3 11 11
1940 001461 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
1941 001462 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
1942 001463 0 111465 4 4 1465 JMPB7 .+2 ;JUMP IF SET, SHOULD BE
1943 ERROR TST,"EXTEND RUN" DID NOT SET,^_
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 15-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1944 <DIAG CLEARED "SLVE END XFER",
1945 SET SHIFT COUNT = 7, AND
1946 001464 0 116104 4 7 0104 SET "CLK PH 1">
1947
1948 ERLOOP TST ^SALL
1949 001465 0 002001 0 1 0 001
1950 001466 0 116141 4 7 0141
1951 001467 0 115434 4 6 1434
1952 ;*GENERATE 2 MORE SINGLE STEP PULSES TO CLEAR "CLK PH 1".
1953 ;*CHECK THAT "EXTEND RUN" STAYS SET.
1954
1955 001470 0 002216 0 1 0 216 GOSUB PULSE2 ;GENERATE 2 SINGLE STEP PULSES
1956 001471 0 177631 7 7 3 11 11
1957 001472 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
1958 001473 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
1959 001474 0 111476 4 4 1476 JMPB7 .+2 ;JUMP IF SET, SHOULD BE
1960 ERROR TST,"EXTEND RUN" DIDN'T STAY SET,^_
1961 001475 0 116104 4 7 0104 DIAG SET "EXTEND RUN" THEN CLEARED "CLK PH 1"
1962
1963 ERLOOP TST ^SALL
1964 001476 0 002002 0 1 0 002
1965 001477 0 116141 4 7 0141
1966 001500 0 115434 4 6 1434
1967 ;*SET ROM ADDR FOR "CC 0"=0 AND SHIFT COUNT=0.
1968 ;*SET "RUN".
1969 ;*GENERATE A SINGLE STEP PULSE TO SET "CC 0"=0.
1970 ;*CHECK THAT "EXTEND RUN" IS CLEARED.
1971
1972 001501 0 002000 0 1 0 000 LDBR 0 ;CLEAR "DX HIGH SPEED"
1973 001502 0 064031 3 2 0 01 11 MOVB REG1
1974 001503 0 002322 0 1 0 322 LDBR CC0 ;SET "ROM 00"=0
1975 001504 0 064211 3 2 0 10 11 MOVB DFRMAD
1976 001505 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
1977 001506 0 064251 3 2 0 12 11 MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
1978 001507 0 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
1979 001510 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
1980 001511 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
1981 001512 0 111514 4 4 1514 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
1982 001513 0 101515 4 0 1515 JMP .+2 ;ELSE, OKAY
1983 001514 0 116104 4 7 0104 ERROR TST,"EXTEND RUN" DIDN'T CLEAR WHEN "CC 0" CLEARED
1984
1985 ERLOOP TST ^SALL
1986 001515 0 002003 0 1 0 003
1987 001516 0 116141 4 7 0141
1988 001517 0 115434 4 6 1434
1989 ;*SET "EXTEND RUN" AGAIN.
1990 ;*WRITE TO REG 17.
1991 ;*CHECK THAT "EXTEND RUN" IS CLEARED.
1992
1993 001520 0 002002 0 1 0 002 EXRUN0: LDBR BCLKEN ;CLEAR CLOCK PHASES
1994 001521 0 064031 3 2 0 01 11 MOVB REG1
1995 001522 0 002347 0 1 0 347 LDBR DSHF7 ;SET SHIFT CNT=7
1996 001523 0 064211 3 2 0 10 11 MOVB DFRMAD
1997 001524 0 002235 0 1 0 235 GOSUB ENSS ;ENABLE SINGLE STEP AND SET "DX HIGH SPEED"
1998 001525 0 177631 7 7 3 11 11
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 15-2
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
1999 001526 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
2000 001527 0 002214 0 1 0 214 GOSUB PULSE4 ;GENERATE 4 SINGLE STEP PULSES
2001 001530 0 177631 7 7 3 11 11
2002 001531 0 064371 3 2 0 17 11 MOVB REG17 ;WRITE TO REG 17
2003 001532 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
2004 001533 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
2005 001534 0 111536 4 4 1536 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2006 001535 0 101537 4 0 1537 JMP .+2 ;ELSE, OKAY
2007 001536 0 116104 4 7 0104 ERROR EXRUN1,"EXTEND RUN" DIDN'T CLEAR AFTER WRITING REG 17
2008
2009 ERLOOP EXRUN1 ^SALL
2010 001537 0 002004 0 1 0 004
2011 001540 0 116141 4 7 0141
2012 001541 0 115542 4 6 1542
2013 ;*SET "EXTEND RUN" AGAIN.
2014 ;*DO A HS DP INIT.
2015 ;*CHECK THAT "EXTEND RUN" IS CLEARED.
2016
2017 001542 0 002002 0 1 0 002 EXRUN1: LDBR BCLKEN ;CLEAR CLOCK PHASES
2018 001543 0 064031 3 2 0 01 11 MOVB REG1
2019 001544 0 002347 0 1 0 347 LDBR DSHF7 ;SET SHIFT CNT=7
2020 001545 0 064211 3 2 0 10 11 MOVB DFRMAD
2021 001546 0 002235 0 1 0 235 GOSUB ENSS ;ENABLE SINGLE STEP AND SET "DX HIGH SPEED"
2022 001547 0 177631 7 7 3 11 11
2023 001550 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
2024 001551 0 002214 0 1 0 214 GOSUB PULSE4 ;GENERATE 4 SINGLE STEP PULSES
2025 001552 0 177631 7 7 3 11 11
2026 001553 0 064271 3 2 0 13 11 EXRUN2: MOVB HSDPIN ;DO A HS DP INIT
2027 001554 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
2028 001555 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
2029 001556 0 111560 4 4 1560 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2030 001557 0 101561 4 0 1561 JMP .+2 ;ELSE, OKAY
2031 001560 0 116104 4 7 0104 ERROR EXRUN1,"EXTEND RUN" DIDN'T CLEAR AFTER HS DP INIT
2032
2033 ERLOOP EXRUN1 ^SALL
2034 001561 0 002005 0 1 0 005
2035 001562 0 116141 4 7 0141
2036 001563 0 115542 4 6 1542
2037 ;*SET "SLVE END XFER".
2038 ;*SET "RUN".
2039 ;*GENERATE 4 SINGLE STEP PULSES.
2040 ;*CHECK THAT "EXTEND RUN" DIDN'T SET.
2041
2042 001564 0 002264 0 1 0 264 GOSUB SWEX ;GO SET "SLVE END XFER" ON CB BOARD
2043 001565 0 177631 7 7 3 11 11
2044 001566 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
2045 001567 0 002214 0 1 0 214 GOSUB PULSE4 ;SET AND CLEAR "CLK PH 1"
2046 001570 0 177631 7 7 3 11 11
2047 001571 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
2048 001572 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
2049 001573 0 111575 4 4 1575 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2050 001574 0 101576 4 0 1576 JMP .+2 ;ELSE, OKAY
2051 001575 0 116104 4 7 0104 ERROR EXRUN2,"EXTEND RUN" SET WITH "SLVE END XFER" ASSERTED
2052
2053 ERLOOP EXRUN2 ^SALL
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MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2054 001576 0 002006 0 1 0 006
2055 001577 0 116141 4 7 0141
2056 001600 0 115553 4 6 1553
2057 ;*CLEAR "SLVE END XFER".
2058 ;*SET ROM ADDR FOR SHIFT COUNT= 17.
2059 ;*SET "RUN".
2060 ;*GENERATE 4 SINGLE STEP PULSES.
2061 ;* CHECK THAT "EXTEND RUN" DIDN'T SET.
2062
2063 001601 0 064271 3 2 0 13 11 EXRUN3: MOVB HSDPIN ;INSURE "EXTEND RUN" IS CLEARED
2064 001602 0 002000 0 1 0 000 LDBR 0 ;CLEAR "DX HIGH SPEED"
2065 001603 0 064031 3 2 0 01 11 MOVB REG1
2066 001604 0 002357 0 1 0 357 LDBR DSHF17 ;SET ROM ADDR FOR SHFT CNT=17
2067 001605 0 064211 3 2 0 10 11 MOVB DFRMAD
2068 001606 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
2069 001607 0 002214 0 1 0 214 GOSUB PULSE4 ;GENERATE 4 SINGLE STEP PULSES
2070 001610 0 177631 7 7 3 11 11
2071 001611 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
2072 001612 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
2073 001613 0 111615 4 4 1615 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2074 001614 0 101616 4 0 1616 JMP .+2 ;ELSE, OKAY
2075 001615 0 116104 4 7 0104 ERROR EXRUN3,"EXTEND RUN" SET WITH SHIFT COUNT=17
2076
2077 ERLOOP EXRUN3 ^SALL
2078 001616 0 002007 0 1 0 007
2079 001617 0 116141 4 7 0141
2080 001620 0 115601 4 6 1601
2081 ;*SET ROM ADDR FOR SHIFT COUNT= 3.
2082 ;*SET "RUN".
2083 ;*GENERATE 4 SINGLE STEP PULSES.
2084 ;* CHECK THAT "EXTEND RUN" DIDN'T SET.
2085
2086 001621 0 064271 3 2 0 13 11 EXRUN4: MOVB HSDPIN ;INSURE "EXTEND RUN" IS CLEARED
2087 001622 0 002343 0 1 0 343 LDBR DSHF3 ;SET ROM ADDR FOR SHFT CNT=3
2088 001623 0 064211 3 2 0 10 11 MOVB DFRMAD
2089 001624 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
2090 001625 0 002214 0 1 0 214 GOSUB PULSE4 ;GENERATE 4 SINGLE STEP PULSES
2091 001626 0 177631 7 7 3 11 11
2092 001627 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
2093 001630 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
2094 001631 0 111633 4 4 1633 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2095 001632 0 101634 4 0 1634 JMP .+2 ;ELSE, OKAY
2096 001633 0 116104 4 7 0104 ERROR EXRUN4,"EXTEND RUN" SET WITH SHIFT COUNT=3
2097
2098 ERLOOP EXRUN4 ^SALL
2099 001634 0 002010 0 1 0 010
2100 001635 0 116141 4 7 0141
2101 001636 0 115621 4 6 1621
2102 ;*SET ROM ADDR FOR SHIFT COUNT= 5.
2103 ;*SET "RUN".
2104 ;*GENERATE 4 SINGLE STEP PULSES.
2105 ;* CHECK THAT "EXTEND RUN" DIDN'T SET.
2106
2107 001637 0 064271 3 2 0 13 11 EXRUN5: MOVB HSDPIN ;INSURE "EXTEND RUN" IS CLEARED
2108 001640 0 002345 0 1 0 345 LDBR DSHF5 ;SET ROM ADDR FOR SHFT CNT=5
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MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2109 001641 0 064211 3 2 0 10 11 MOVB DFRMAD
2110 001642 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
2111 001643 0 002214 0 1 0 214 GOSUB PULSE4 ;GENERATE 4 SINGLE STEP PULSES
2112 001644 0 177631 7 7 3 11 11
2113 001645 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
2114 001646 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
2115 001647 0 111651 4 4 1651 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2116 001650 0 101652 4 0 1652 JMP .+2 ;ELSE, OKAY
2117 001651 0 116104 4 7 0104 ERROR EXRUN5,"EXTEND RUN" SET WITH SHIFT COUNT=5
2118
2119 ERLOOP EXRUN5 ^SALL
2120 001652 0 002011 0 1 0 011
2121 001653 0 116141 4 7 0141
2122 001654 0 115637 4 6 1637
2123 ;*SET ROM ADDR FOR SHIFT COUNT= 6.
2124 ;*SET "RUN".
2125 ;*GENERATE 4 SINGLE STEP PULSES.
2126 ;* CHECK THAT "EXTEND RUN" DIDN'T SET.
2127
2128 001655 0 064271 3 2 0 13 11 EXRUN6: MOVB HSDPIN ;INSURE "EXTEND RUN" IS CLEARED
2129 001656 0 002346 0 1 0 346 LDBR DSHF6 ;SET ROM ADDR FOR SHFT CNT=6
2130 001657 0 064211 3 2 0 10 11 MOVB DFRMAD
2131 001660 0 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
2132 001661 0 002214 0 1 0 214 GOSUB PULSE4 ;GENERATE 4 SINGLE STEP PULSES
2133 001662 0 177631 7 7 3 11 11
2134 001663 0 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
2135 001664 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "EXTEND RUN"
2136 001665 0 111667 4 4 1667 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2137 001666 0 101670 4 0 1670 JMP .+2 ;ELSE, OKAY
2138 001667 0 116104 4 7 0104 ERROR EXRUN6,"EXTEND RUN" SET WITH SHIFT COUNT=6
2139
2140 ERLOOP EXRUN6 ^SALL
2141 001670 0 002012 0 1 0 012
2142 001671 0 116141 4 7 0141
2143 001672 0 115655 4 6 1655
2144 001673 0 116173 4 7 0173 REPEAT TST
2145 001674 0 115434 4 6 1434
2146
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 16
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2147 TEST 212,TEST "SLVE REQ" USING "DIAG SLVE REQ"
2148 ;***********************************************************************
2149 ;* MCODE4 * TEST 212 * TEST "SLVE REQ" USING "DIAG SLVE REQ"
2150 ;***********************************************************************
2151 SALL
2152 001675 0 002324 0 1 0 324
2153 001676 0 116045 4 7 0045
2154
2155 001677 TST212: SALL
2156
2157 ;*SET "DIAG SLVE REQ".
2158 ;*CHECK THAT "SLVE REQ" IS SET.
2159
2160 001677 0 002004 0 1 0 004 LDBR DSLVRQ ;SET "DIAG SLVE REQ"
2161 001700 0 064031 3 2 0 01 11 MOVB REG1
2162 001701 0 032001 1 5 0 00 01 DATI REG1,AC0 ;READ REG 1
2163 001702 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "SLVE REQ"
2164 001703 0 111705 4 4 1705 JMPB7 .+2 ;JUMP IF SET, SHOULD BE
2165 001704 0 116104 4 7 0104 ERROR TST,"SLVE REQ" DIDN'T SET WHEN "DIAG SLVE REQ" WAS SET
2166
2167 ERLOOP TST ^SALL
2168 001705 0 002000 0 1 0 000
2169 001706 0 116141 4 7 0141
2170 001707 0 115677 4 6 1677
2171 ;*CLEAR "DIAG SLVE REQ".
2172 ;*CHECK THAT "SLVE REQ" IS CLEARED.
2173
2174 001710 0 002000 0 1 0 000 LDBR 0 ;CLEAR "DIAG SLVE REQ"
2175 001711 0 064031 3 2 0 01 11 MOVB REG1
2176 001712 0 032001 1 5 0 00 01 DATI REG1,AC0 ;READ REG 1
2177 001713 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "SLVE REQ"
2178 001714 0 111716 4 4 1716 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2179 001715 0 101717 4 0 1717 JMP .+2 ;JUMP IF CLEARED
2180 001716 0 116104 4 7 0104 ERROR TST,"SLVE REQ" DIDN'T CLEAR WHEN "DIAG SLVE REQ" WAS CLEARED
2181
2182 ERLOOP TST ^SALL
2183 001717 0 002001 0 1 0 001
2184 001720 0 116141 4 7 0141
2185 001721 0 115677 4 6 1677
2186 ;*SET "DIAG SLVE REQ".
2187 ;*CHECK THAT "SLVE REQ" IS SET.
2188
2189 001722 0 002004 0 1 0 004 LDBR DSLVRQ ;SET "DIAG SLVE REQ"
2190 001723 0 064031 3 2 0 01 11 MOVB REG1
2191 001724 0 032001 1 5 0 00 01 DATI REG1,AC0 ;READ REG 1
2192 001725 0 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "SLVE REQ"
2193 001726 0 111730 4 4 1730 JMPB7 .+2 ;JUMP IF SET, SHOULD BE
2194 001727 0 116104 4 7 0104 ERROR TST,"SLVE REQ" DIDN'T SET WHEN "DIAG SLVE REQ" WAS SET
2195
2196 ERLOOP TST ^SALL
2197 001730 0 002002 0 1 0 002
2198 001731 0 116141 4 7 0141
2199 001732 0 115677 4 6 1677
2200 001733 0 002000 0 1 0 000 LDBR 0 ;CLEAR "DIAG SLVE REQ"
2201 001734 0 064031 3 2 0 01 11 MOVB REG1
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 16-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2202
2203 001735 0 116173 4 7 0173 REPEAT TST
2204 001736 0 115677 4 6 1677
2205 001737 0 002000 0 1 0 000 JUMP NXTBNK ;JUMP TO NEXT BANK OF CRAM
2206 001740 0 160231 7 0 0 11 11
2207 002000 .LOC 2000
2208 002000 NXTBNK:
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 17
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2209 TEST 213,TEST "SLVE RDY" FLOPS
2210 ;***********************************************************************
2211 ;* MCODE4 * TEST 213 * TEST "SLVE RDY" FLOPS
2212 ;***********************************************************************
2213 SALL
2214 002000 1 002325 0 1 0 325
2215 002001 1 117710 4 7 1710
2216
2217 002002 TST213: SALL
2218
2219 ;*CHECK THE DIRECT SETTING AND CLEARING OF "SLVE RDY", "SLVE RDY DLY 1",
2220 ;*AND "SLVE RDY DLY 2" BY "DEV RD INIT" AND "DEV WR INIT", RESPECTIVELY.
2221 ;*SET "DIR TO MSTR" AND DO A HS DP INIT.
2222 ;*CHECK THAT ALL THE "SLVE RDY" FLOPS ARE SET.
2223
2224 002002 1 002176 0 1 0 176 GOSUB DEVRD ;SETUP DEVICE READ
2225 002003 1 177631 7 7 3 11 11
2226 002004 1 064271 3 2 0 13 11 MOVB HSDPIN ;DO A HS DP INIT, GENS "DEV RD INIT"
2227 002005 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2228 002006 1 104010 4 2 0010 JMPB0 .+2 ;JUMP IF "SLVE RDY" SET, SHOULD HAVE
2229 ERROR TST,"SLVE RDY" DIDN'T SET,^_
2230 002007 1 117721 4 7 1721 DIAG GENERATED A "DEV RD INIT"
2231
2232 ERLOOP TST ^SALL
2233 002010 1 002000 0 1 0 000
2234 002011 1 117713 4 7 1713
2235 002012 1 114002 4 6 0002
2236 002013 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2237 002014 1 014000 0 6 0 000 SHR ;RIGHT ADJUST "SLVE RDY DLY 1"
2238 002015 1 104017 4 2 0017 JMPB0 .+2 ;JUMP IF IT SET, SHOULD HAVE
2239 ERROR TST,"SLVE RDY DLY 1" DIDN'T SET,^_
2240 002016 1 117721 4 7 1721 DIAG GENERATED A "DEV RD INIT"
2241
2242 ERLOOP TST ^SALL
2243 002017 1 002001 0 1 0 001
2244 002020 1 117713 4 7 1713
2245 002021 1 114002 4 6 0002
2246 002022 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2247 002023 1 014000 0 6 0 000 SHR ;RIGHT ADJUST "SLVE RDY DLY 2"
2248 002024 1 014000 0 6 0 000 SHR
2249 002025 1 104027 4 2 0027 JMPB0 .+2 ;JUMP IF IT SET, SHOULD HAVE
2250 ERROR TST,"SLVE RDY DLY 2" DIDN'T SET,^_
2251 002026 1 117721 4 7 1721 DIAG GENERATED A "DEV RD INIT"
2252
2253 ERLOOP TST ^SALL
2254 002027 1 002002 0 1 0 002
2255 002030 1 117713 4 7 1713
2256 002031 1 114002 4 6 0002
2257 ;*CLEAR "DIR TO MSTR" AND DO A HS DP INIT.
2258 ;*CHECK THAT ALL THE "SLVE RDY" FLOPS ARE CLEARED.
2259
2260 002032 1 002205 0 1 0 205 SRD1: GOSUB DEVWR ;SET DEVICE WRITE
2261 002033 1 177631 7 7 3 11 11
2262 002034 1 064271 3 2 0 13 11 MOVB HSDPIN ;DO A HS DP INIT, GENS "DEV RD INIT"
2263 002035 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 17-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2264 002036 1 104040 4 2 0040 JMPB0 .+2 ;JUMP IF "SLVE RDY" SET, SHOULDN'T HAVE
2265 002037 1 100041 4 0 0041 JMP .+2 ;JUMP IF IT CLEARED
2266 ERROR TST,"SLVE RDY" DIDN'T CLEAR,^_
2267 002040 1 117721 4 7 1721 DIAG GENERATED A "DEV WR INIT"
2268
2269 ERLOOP TST ^SALL
2270 002041 1 002003 0 1 0 003
2271 002042 1 117713 4 7 1713
2272 002043 1 114002 4 6 0002
2273 002044 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2274 002045 1 014000 0 6 0 000 SHR ;RIGHT ADJUST "SLVE RDY DLY 1"
2275 002046 1 104050 4 2 0050 JMPB0 .+2 ;JUMP IF IT SET, SHOULDN'T HAVE
2276 002047 1 100051 4 0 0051 JMP .+2 ;JUMP IF IT CLEARED
2277 ERROR TST,"SLVE RDY DLY 1" DIDN'T CLEAR,^_
2278 002050 1 117721 4 7 1721 DIAG GENERATED A "DEV WR INIT"
2279
2280 ERLOOP TST ^SALL
2281 002051 1 002004 0 1 0 004
2282 002052 1 117713 4 7 1713
2283 002053 1 114002 4 6 0002
2284 002054 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2285 002055 1 014000 0 6 0 000 SHR ;RIGHT ADJUST "SLVE RDY DLY 2"
2286 002056 1 014000 0 6 0 000 SHR
2287 002057 1 104061 4 2 0061 JMPB0 .+2 ;JUMP IF IT SET, SHOULDN'T HAVE
2288 002060 1 100062 4 0 0062 JMP .+2 ;JUMP IF IT CLEARED
2289 ERROR TST,"SLVE RDY DLY 2" DIDN'T CLEAR,^_
2290 002061 1 117721 4 7 1721 DIAG GENERATED A "DEV WR INIT"
2291
2292 ERLOOP TST ^SALL
2293 002062 1 002005 0 1 0 005
2294 002063 1 117713 4 7 1713
2295 002064 1 114002 4 6 0002
2296 ;*SET "DIR TO MSTR" AND DO A HS DP INIT.
2297 ;*CHECK THAT ALL THE "SLVE RDY" FLOPS ARE SET.
2298
2299 002065 1 002176 0 1 0 176 GOSUB DEVRD ;SETUP DEVICE READ
2300 002066 1 177631 7 7 3 11 11
2301 002067 1 064271 3 2 0 13 11 MOVB HSDPIN ;DO A HS DP INIT, GENS "DEV RD INIT"
2302 002070 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2303 002071 1 104073 4 2 0073 JMPB0 .+2 ;JUMP IF "SLVE RDY" SET, SHOULD HAVE
2304 ERROR SRD1,"SLVE RDY" DIDN'T SET,^_
2305 002072 1 117721 4 7 1721 DIAG GENERATED A "DEV RD INIT"
2306
2307 ERLOOP SRD1 ^SALL
2308 002073 1 002006 0 1 0 006
2309 002074 1 117713 4 7 1713
2310 002075 1 114032 4 6 0032
2311 002076 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2312 002077 1 014000 0 6 0 000 SHR ;RIGHT ADJUST "SLVE RDY DLY 1"
2313 002100 1 104102 4 2 0102 JMPB0 .+2 ;JUMP IF IT SET, SHOULD HAVE
2314 ERROR SRD1,"SLVE RDY DLY 1" DIDN'T SET,^_
2315 002101 1 117721 4 7 1721 DIAG GENERATED A "DEV RD INIT"
2316
2317 ERLOOP SRD1 ^SALL
2318 002102 1 002007 0 1 0 007
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 17-2
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2319 002103 1 117713 4 7 1713
2320 002104 1 114032 4 6 0032
2321 002105 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2322 002106 1 014000 0 6 0 000 SHR ;RIGHT ADJUST "SLVE RDY DLY 2"
2323 002107 1 014000 0 6 0 000 SHR
2324 002110 1 104112 4 2 0112 JMPB0 .+2 ;JUMP IF IT SET, SHOULD HAVE
2325 ERROR SRD1,"SLVE RDY DLY 2" DIDN'T SET,^_
2326 002111 1 117721 4 7 1721 DIAG GENERATED A "DEV RD INIT"
2327
2328 ERLOOP SRD1 ^SALL
2329 002112 1 002010 0 1 0 010
2330 002113 1 117713 4 7 1713
2331 002114 1 114032 4 6 0032
2332 002115 1 117723 4 7 1723 REPEAT TST
2333 002116 1 114002 4 6 0002
2334
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 18
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2335 TEST 214,TEST SLVE SIDE HANDSHAKING LOGIC
2336 ;***********************************************************************
2337 ;* MCODE4 * TEST 214 * TEST SLVE SIDE HANDSHAKING LOGIC
2338 ;***********************************************************************
2339 SALL
2340 002117 1 002326 0 1 0 326
2341 002120 1 117710 4 7 1710
2342
2343 002121 TST214: SALL
2344
2345 ;*CLEAR "DIAG SLVE REQ".
2346 ;*CHECK THAT "SLVE ACK" IS CLEARED.
2347
2348 002121 1 002000 0 1 0 000 LDBR 0 ;CLEAR "DIAG SLVE REQ"
2349 002122 1 064031 3 2 0 01 11 MOVB REG1
2350 002123 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1 FOR "SLVE ACK"
2351 002124 1 106126 4 3 0126 JMPB4 .+2 ;JUMP IF SET
2352 002125 1 100127 4 0 0127 JMP .+2 ;JUMP IF CLEARED
2353 002126 1 117721 4 7 1721 ERROR TST,"SLVE ACK" DID NOT CLEAR WHEN "DIAG SLVE REQ" CLEARED
2354
2355 ERLOOP TST ^SALL
2356 002127 1 002000 0 1 0 000
2357 002130 1 117713 4 7 1713
2358 002131 1 114121 4 6 0121
2359 ;*SET "SLVE RDY DLY 2" WITH A "DEV RD INIT".
2360 ;*CHECK THAT "SLVE REQ HLDOFF" IS CLEARED.
2361
2362 002132 1 117576 4 7 1576 JMPSUB DEVRD ;SETUP DEVICE READ
2363 002133 1 064271 3 2 0 13 11 MOVB HSDPIN ;SET "SLVE RDY DLY 2"
2364 002134 1 032002 1 5 0 00 02 DATI REG2,AC0 ;READ REG 2
2365 002135 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "SLVE REQ HLDOFF"
2366 002136 1 110140 4 4 0140 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2367 002137 1 100141 4 0 0141 JMP .+2 ;JUMP IF CLEARED
2368 002140 1 117721 4 7 1721 ERROR TST,"SLVE REQ HLDOFF" DIDN'T CLEAR AFTER HS DP INIT
2369
2370 ERLOOP TST ^SALL
2371 002141 1 002001 0 1 0 001
2372 002142 1 117713 4 7 1713
2373 002143 1 114121 4 6 0121
2374 ;*SET "DIAG SLVE REQ".
2375 ;*CHECK THAT "SLVE ACK" IS SET AND "SLVE RDY" IS CLEARED.
2376
2377 002144 1 002004 0 1 0 004 LDBR DSLVRQ ;SET "DIAG SLVE REQ"
2378 002145 1 064031 3 2 0 01 11 MOVB REG1
2379 002146 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
2380 002147 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1 FOR "SLVE ACK"
2381 002150 1 106152 4 3 0152 JMPB4 .+2 ;JUMP IF IT SET
2382 ERROR TST,"SLVE ACK" DID NOT SET,^_
2383 002151 1 117721 4 7 1721 DIAG SET "SLVE RDY DLY 2" AND "DIAG SLVE REQ"
2384
2385 ERLOOP TST ^SALL
2386 002152 1 002002 0 1 0 002
2387 002153 1 117713 4 7 1713
2388 002154 1 114121 4 6 0121
2389 002155 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 18-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2390 002156 1 104160 4 2 0160 JMPB0 .+2 ;JUMP IF "SLVE RDY" IS SET, SHOULDN'T BE
2391 002157 1 100161 4 0 0161 JMP .+2 ;JUMP IF CLEARED
2392 ERROR TST,"SLVE RDY" DIDN'T CLEAR,^_
2393 002160 1 117721 4 7 1721 DIAG SET "SLVE RDY" THEN GENERATED "SLVE ACK"
2394
2395 ERLOOP TST ^SALL
2396 002161 1 002003 0 1 0 003
2397 002162 1 117713 4 7 1713
2398 002163 1 114121 4 6 0121
2399 ;*CLEAR "DIAG SLVE REQ".
2400 ;*CHECK THAT "SLVE ACK" IS CLEARED AND "SLVE REQ HLDOFF" IS SET.
2401
2402 002164 1 002000 0 1 0 000 LDBR 0 ;CLEAR "DIAG SLVE REQ"
2403 002165 1 064031 3 2 0 01 11 MOVB REG1
2404 002166 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1 FOR "SLVE ACK"
2405 002167 1 106171 4 3 0171 JMPB4 .+2 ;JUMP IF SET, SHOULDN'T BE
2406 002170 1 100172 4 0 0172 JMP .+2 ;JUMP IF CLEARED
2407 002171 1 117721 4 7 1721 ERROR TST,"SLVE ACK" DID NOT CLEAR WHEN "DIAG SLVE REQ" CLEARED
2408
2409 ERLOOP TST ^SALL
2410 002172 1 002004 0 1 0 004
2411 002173 1 117713 4 7 1713
2412 002174 1 114121 4 6 0121
2413 002175 1 032002 1 5 0 00 02 DATI REG2,AC0 ;READ REG 2
2414 002176 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "SLVE REQ HLDOFF"
2415 002177 1 110201 4 4 0201 JMPB7 .+2 ;JUMP IF SET, SHOULD BE
2416 ERROR TST,"SLVE REQ HLDOFF" DIDN'T SET,^_
2417 002200 1 117721 4 7 1721 DIAG SET "SLVE RDY DLY 2" THEN SET AND CLEARED "DIAG SLVE REQ"
2418
2419 ERLOOP TST ^SALL
2420 002201 1 002005 0 1 0 005
2421 002202 1 117713 4 7 1713
2422 002203 1 114121 4 6 0121
2423 ;*SET "DIAG SLVE REQ".
2424 ;*CHECK THAT "SLVE ACK" DID NOT SET.
2425
2426 002204 1 002004 0 1 0 004 LDBR DSLVRQ ;SET "DIAG SLVE REQ"
2427 002205 1 064031 3 2 0 01 11 MOVB REG1
2428 002206 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
2429 002207 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1 FOR "SLVE ACK"
2430 002210 1 106212 4 3 0212 JMPB4 .+2 ;JUMP IF SET, SHOULDN'T BE
2431 002211 1 100213 4 0 0213 JMP .+2 ;JUMP IF CLEARED
2432 ERROR TST,"SLVE ACK" SET WHEN IT SHOULDN'T HAVE,^_
2433 002212 1 117721 4 7 1721 DIAG SET "SLVE REQ HLDOFF" THEN SET "DIAG SLVE REQ"
2434
2435 ERLOOP TST ^SALL
2436 002213 1 002006 0 1 0 006
2437 002214 1 117713 4 7 1713
2438 002215 1 114121 4 6 0121
2439 ;*GENERATE A SINGLE STEP PULSE.
2440 ;*CHECK THAT "SLVE RDY DLY 1" IS CLEARED.
2441
2442 002216 1 064251 3 2 0 12 11 MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
2443 002217 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2444 002220 1 014000 0 6 0 000 SHR ;RIGHT ADJUST "SLVE RDY DLY 1"
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 18-2
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2445 002221 1 104223 4 2 0223 JMPB0 .+2 ;JUMP IF SET, SHOULDN'T BE
2446 002222 1 100224 4 0 0224 JMP .+2 ;JUMP IF CLEARED
2447 ERROR TST,"SLVE RDY DLY 1" DIDN'T CLEAR,^_
2448 <DIAG SET "SLVE RDY DLY 1" THEN CLEARED "SLVE RDY" AND
2449 002223 1 117721 4 7 1721 GENERATED A SINGLE STEP PULSE>
2450
2451 ERLOOP TST ^SALL
2452 002224 1 002007 0 1 0 007
2453 002225 1 117713 4 7 1713
2454 002226 1 114121 4 6 0121
2455 ;*GENERATE A SINGLE STEP PULSE.
2456 ;*CHECK THAT "SLVE RDY DLY 2" IS CLEARED.
2457
2458 002227 1 064251 3 2 0 12 11 MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
2459 002230 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2460 002231 1 014000 0 6 0 000 SHR ;RIGHT ADJUST "SLVE RDY DLY 2"
2461 002232 1 014000 0 6 0 000 SHR
2462 002233 1 104235 4 2 0235 JMPB0 .+2 ;JUMP IF SET, SHOULDN'T BE
2463 002234 1 100236 4 0 0236 JMP .+2 ;JUMP IF CLEARED
2464 ERROR TST,"SLVE RDY DLY 2" DIDN'T CLEAR,^_
2465 <DIAG SET "SLVE RDY DLY 2" THEN CLEARED "SLVE RDY DLY 1" AND
2466 002235 1 117721 4 7 1721 GENERATED A SINGLE STEP PULSE>
2467
2468 ERLOOP TST ^SALL
2469 002236 1 002010 0 1 0 010
2470 002237 1 117713 4 7 1713
2471 002240 1 114121 4 6 0121
2472 ;*CHECK THAT "SLVE REQ HLDOFF" IS CLEARED.
2473
2474 002241 1 032002 1 5 0 00 02 DATI REG2,AC0 ;READ REG 2
2475 002242 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "SLVE REQ HLDOFF"
2476 002243 1 110245 4 4 0245 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2477 002244 1 100246 4 0 0246 JMP .+2 ;JUMP IF CLEARED
2478 ERROR TST,"SLVE REQ HLDOFF" DIDN'T CLEAR,^_
2479 002245 1 117721 4 7 1721 DIAG SET "SLVE REQ HLDOFF" THEN CLEARED "SLVE RDY DLY 2"
2480
2481 ERLOOP TST ^SALL
2482 002246 1 002011 0 1 0 011
2483 002247 1 117713 4 7 1713
2484 002250 1 114121 4 6 0121
2485 ;*SET "SLVE REQ HLDOFF" THEN DO A HS DP INIT.
2486 ;*CHECK THAT "SLVE REQ HLDOFF" IS CLEARED.
2487
2488 002251 1 117576 4 7 1576 SHND: JMPSUB DEVRD ;SETUP DEVICE READ
2489 002252 1 064271 3 2 0 13 11 MOVB HSDPIN ;SET "SLVE RDY DLY 2"
2490 002253 1 002004 0 1 0 004 LDBR DSLVRQ ;SET "DIAG SLVE REQ"
2491 002254 1 064031 3 2 0 01 11 MOVB REG1
2492 002255 1 002000 0 1 0 000 LDBR 0 ;CLEAR "DIAG SLVE REQ"
2493 002256 1 064031 3 2 0 01 11 MOVB REG1
2494 002257 1 064271 3 2 0 13 11 MOVB HSDPIN ;DO AN INIT TO CLEAR "SLVE REQ HLDOFF"
2495 002260 1 032002 1 5 0 00 02 DATI REG2,AC0 ;READ REG 2
2496 002261 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "SLVE REQ HLDOFF"
2497 002262 1 110264 4 4 0264 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2498 002263 1 100265 4 0 0265 JMP .+2 ;JUMP IF CLEARED
2499 ERROR SHND,"SLVE REQ HLDOFF" DIDN'T CLEAR,^_
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 18-3
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2500 002264 1 117721 4 7 1721 DIAG SET "SLVE REQ HLDOFF" THEN DID A HS DP INIT
2501
2502 ERLOOP SHND ^SALL
2503 002265 1 002012 0 1 0 012
2504 002266 1 117713 4 7 1713
2505 002267 1 114251 4 6 0251
2506 002270 1 117723 4 7 1723 REPEAT TST
2507 002271 1 114121 4 6 0121
2508
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 19
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2509 TEST 215,TEST "MSTR REQ" USING "DIAG MSTR REQ"
2510 ;***********************************************************************
2511 ;* MCODE4 * TEST 215 * TEST "MSTR REQ" USING "DIAG MSTR REQ"
2512 ;***********************************************************************
2513 SALL
2514 002272 1 002327 0 1 0 327
2515 002273 1 117710 4 7 1710
2516
2517 002274 TST215: SALL
2518
2519 ;*SET "DIAG MSTR REQ".
2520 ;*CHECK THAT "MSTR REQ" IS SET.
2521
2522 002274 1 002010 0 1 0 010 LDBR DMSTRQ ;SET "DIAG MSTR REQ"
2523 002275 1 064031 3 2 0 01 11 MOVB REG1
2524 002276 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1
2525 002277 1 110301 4 4 0301 JMPB7 .+2 ;JUMP IF "MSTR REQ" SET, SHOULD BE
2526 002300 1 117721 4 7 1721 ERROR TST,"MSTR REQ" DIDN'T SET WHEN "DIAG MSTR REQ" WAS SET
2527
2528 ERLOOP TST ^SALL
2529 002301 1 002000 0 1 0 000
2530 002302 1 117713 4 7 1713
2531 002303 1 114274 4 6 0274
2532 ;*CLEAR "DIAG MSTR REQ".
2533 ;*CHECK THAT "MSTR REQ" IS CLEARED.
2534
2535 002304 1 002000 0 1 0 000 LDBR 0 ;CLEAR "DIAG MSTR REQ"
2536 002305 1 064031 3 2 0 01 11 MOVB REG1
2537 002306 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1
2538 002307 1 110311 4 4 0311 JMPB7 .+2 ;JUMP IF "MSTR REQ" SET, SHOULDN'T BE
2539 002310 1 100312 4 0 0312 JMP .+2 ;JUMP IF CLEARED
2540 002311 1 117721 4 7 1721 ERROR TST,"MSTR REQ" DIDN'T CLEAR WHEN "DIAG MSTR REQ" WAS CLEARED
2541
2542 ERLOOP TST ^SALL
2543 002312 1 002001 0 1 0 001
2544 002313 1 117713 4 7 1713
2545 002314 1 114274 4 6 0274
2546 ;*SET "DIAG MSTR REQ".
2547 ;*CHECK THAT "MSTR REQ" IS SET.
2548
2549 002315 1 002010 0 1 0 010 LDBR DMSTRQ ;SET "DIAG MSTR REQ"
2550 002316 1 064031 3 2 0 01 11 MOVB REG1
2551 002317 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1
2552 002320 1 110322 4 4 0322 JMPB7 .+2 ;JUMP IF "MSTR REQ" SET, SHOULD BE
2553 002321 1 117721 4 7 1721 ERROR TST,"MSTR REQ" DIDN'T SET WHEN "DIAG MSTR REQ" WAS SET
2554
2555 ERLOOP TST ^SALL
2556 002322 1 002002 0 1 0 002
2557 002323 1 117713 4 7 1713
2558 002324 1 114274 4 6 0274
2559 002325 1 117723 4 7 1723 REPEAT TST
2560 002326 1 114274 4 6 0274
2561
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 20
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2562 TEST 216,TEST "MSTR RDY" FLOPS
2563 ;***********************************************************************
2564 ;* MCODE4 * TEST 216 * TEST "MSTR RDY" FLOPS
2565 ;***********************************************************************
2566 SALL
2567 002327 1 002330 0 1 0 330
2568 002330 1 117710 4 7 1710
2569
2570 002331 TST216: SALL
2571
2572 ;*CHECK THE DIRECT SETTING AND CLEARING OF "MSTR RDY", "MSTR RDY DLY 1",
2573 ;* AND "MSTR RDY DLY 2" BY "DEV WR INIT" AND "DEV RD INIT", RESPECTIVELY.
2574
2575 ;*CLEAR "DIR TO MSTR" AND DO A HS DP INIT.
2576 ;*CHECK THAT ALL THE "MSTR RDY" FLOPS ARE SET.
2577
2578 002331 1 002000 0 1 0 000 LDBR 0 ;ENABLE SINGLE STEP MODE
2579 002332 1 064031 3 2 0 01 11 MOVB REG1
2580 002333 1 117605 4 7 1605 JMPSUB DEVWR ;SETUP DEVICE WRITE
2581 002334 1 064271 3 2 0 13 11 MOVB HSDPIN ;DO A HS DP INIT, GENS "DEV WR INIT"
2582 002335 1 032017 1 5 0 00 17 DATI REG17,AC0 ;READ REG 17
2583 002336 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "MSTR RDY" TO BIT 4
2584 002337 1 106341 4 3 0341 JMPB4 .+2 ;JUMP IF "MSTR RDY" SET, SHOULD HAVE
2585 ERROR TST,"MSTR RDY" DIDN'T SET,^_
2586 002340 1 117721 4 7 1721 DIAG GENERATED A "DEV WR INIT"
2587
2588 ERLOOP TST ^SALL
2589 002341 1 002000 0 1 0 000
2590 002342 1 117713 4 7 1713
2591 002343 1 114331 4 6 0331
2592 002344 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2593 002345 1 106347 4 3 0347 JMPB4 .+2 ;JUMP IF "MSTR RDY DLY 1" SET, SHOULD HAVE
2594 ERROR TST,"MSTR RDY DLY 1" DIDN'T SET,^_
2595 002346 1 117721 4 7 1721 DIAG GENERATED A "DEV WR INIT"
2596
2597 ERLOOP TST ^SALL
2598 002347 1 002001 0 1 0 001
2599 002350 1 117713 4 7 1713
2600 002351 1 114331 4 6 0331
2601 002352 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2602 002353 1 014000 0 6 0 000 SHR ;MOVE "MSTR RDY DLY 2" TO BIT 4
2603 002354 1 106356 4 3 0356 JMPB4 .+2 ;JUMP IF IT SET, SHOULD HAVE
2604 ERROR TST,"MSTR RDY DLY 2" DIDN'T SET,^_
2605 002355 1 117721 4 7 1721 DIAG GENERATED A "DEV WR INIT"
2606
2607 ERLOOP TST ^SALL
2608 002356 1 002002 0 1 0 002
2609 002357 1 117713 4 7 1713
2610 002360 1 114331 4 6 0331
2611 ;*SET "DIR TO MSTR" AND DO A HS DP INIT.
2612 ;*CHECK THAT ALL THE "MSTR RDY" FLOPS ARE CLEARED.
2613
2614 002361 1 117576 4 7 1576 MRD1: JMPSUB DEVRD ;SET DEVICE READ
2615 002362 1 064271 3 2 0 13 11 MOVB HSDPIN ;DO A HS DP INIT, GENS "DEV RD INIT"
2616 002363 1 032017 1 5 0 00 17 DATI REG17,AC0 ;READ REG 17
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 20-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2617 002364 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "MSTR RDY" TO BIT 4
2618 002365 1 106367 4 3 0367 JMPB4 .+2 ;JUMP IF "MSTR RDY" SET, SHOULDN'T HAVE
2619 002366 1 100370 4 0 0370 JMP .+2 ;JUMP IF IT CLEARED
2620 ERROR TST,"MSTR RDY" DIDN'T CLEAR,^_
2621 002367 1 117721 4 7 1721 DIAG GENERATED A "DEV RD INIT"
2622
2623 ERLOOP TST ^SALL
2624 002370 1 002003 0 1 0 003
2625 002371 1 117713 4 7 1713
2626 002372 1 114331 4 6 0331
2627 002373 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2628 002374 1 106376 4 3 0376 JMPB4 .+2 ;JUMP IF "MSTR RDY DLY 1" SET, SHOULDN'T HAVE
2629 002375 1 100377 4 0 0377 JMP .+2 ;JUMP IF IT CLEARED
2630 ERROR TST,"MSTR RDY DLY 1" DIDN'T CLEAR,^_
2631 002376 1 117721 4 7 1721 DIAG GENERATED A "DEV RD INIT"
2632
2633 ERLOOP TST ^SALL
2634 002377 1 002004 0 1 0 004
2635 002400 1 117713 4 7 1713
2636 002401 1 114331 4 6 0331
2637 002402 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2638 002403 1 014000 0 6 0 000 SHR ;MOVE "MSTR RDY DLY 2" TO BIT 4
2639 002404 1 106406 4 3 0406 JMPB4 .+2 ;JUMP IF IT SET, SHOULDN'T HAVE
2640 002405 1 100407 4 0 0407 JMP .+2 ;JUMP IF IT CLEARED
2641 ERROR TST,"MSTR RDY DLY 2" DIDN'T CLEAR,^_
2642 002406 1 117721 4 7 1721 DIAG GENERATED A "DEV RD INIT"
2643
2644 ERLOOP TST ^SALL
2645 002407 1 002005 0 1 0 005
2646 002410 1 117713 4 7 1713
2647 002411 1 114331 4 6 0331
2648 ;*CLEAR "DIR TO MSTR" AND DO A HS DP INIT.
2649 ;*CHECK THAT ALL THE "MSTR RDY" FLOPS ARE SET.
2650
2651 002412 1 117605 4 7 1605 JMPSUB DEVWR ;SETUP DEVICE WRITE
2652 002413 1 064271 3 2 0 13 11 MOVB HSDPIN ;DO A HS DP INIT, GENS "DEV WR INIT"
2653 002414 1 032017 1 5 0 00 17 DATI REG17,AC0 ;READ REG 17
2654 002415 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "MSTR RDY" TO BIT 4
2655 002416 1 106420 4 3 0420 JMPB4 .+2 ;JUMP IF "MSTR RDY" SET, SHOULD HAVE
2656 ERROR MRD1,"MSTR RDY" DIDN'T SET,^_
2657 002417 1 117721 4 7 1721 DIAG GENERATED A "DEV WR INIT"
2658
2659 ERLOOP MRD1 ^SALL
2660 002420 1 002006 0 1 0 006
2661 002421 1 117713 4 7 1713
2662 002422 1 114361 4 6 0361
2663 002423 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2664 002424 1 106426 4 3 0426 JMPB4 .+2 ;JUMP IF "MSTR RDY DLY 1" SET, SHOULD HAVE
2665 ERROR MRD1,"MSTR RDY DLY 1" DIDN'T SET,^_
2666 002425 1 117721 4 7 1721 DIAG GENERATED A "DEV WR INIT"
2667
2668 ERLOOP MRD1 ^SALL
2669 002426 1 002007 0 1 0 007
2670 002427 1 117713 4 7 1713
2671 002430 1 114361 4 6 0361
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 20-2
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2672 002431 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2673 002432 1 014000 0 6 0 000 SHR ;MOVE "MSTR RDY DLY 2" TO BIT 4
2674 002433 1 106435 4 3 0435 JMPB4 .+2 ;JUMP IF IT SET, SHOULD HAVE
2675 ERROR MRD1,"MSTR RDY DLY 2" DIDN'T SET,^_
2676 002434 1 117721 4 7 1721 DIAG GENERATED A "DEV WR INIT"
2677
2678 ERLOOP MRD1 ^SALL
2679 002435 1 002010 0 1 0 010
2680 002436 1 117713 4 7 1713
2681 002437 1 114361 4 6 0361
2682 002440 1 117723 4 7 1723 REPEAT TST
2683 002441 1 114331 4 6 0331
2684
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 21
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2685 TEST 217,TEST MSTR SIDE HANDSHAKING LOGIC
2686 ;***********************************************************************
2687 ;* MCODE4 * TEST 217 * TEST MSTR SIDE HANDSHAKING LOGIC
2688 ;***********************************************************************
2689 SALL
2690 002442 1 002331 0 1 0 331
2691 002443 1 117710 4 7 1710
2692
2693 002444 TST217: SALL
2694
2695 ;*CLEAR "DIAG MSTR REQ".
2696 ;*CHECK THAT "MSTR ACK" IS CLEARED.
2697
2698 002444 1 002000 0 1 0 000 LDBR 0 ;CLEAR "DIAG MSTR REQ"
2699 002445 1 064031 3 2 0 01 11 MOVB REG1
2700 002446 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1 FOR "MSTR ACK"
2701 002447 1 014000 0 6 0 000 SHR ;MOVE IT TO BIT 4
2702 002450 1 106452 4 3 0452 JMPB4 .+2 ;JUMP IF SET
2703 002451 1 100453 4 0 0453 JMP .+2 ;JUMP IF CLEARED
2704 002452 1 117721 4 7 1721 ERROR TST,"MSTR ACK" DID NOT CLEAR WHEN "DIAG MSTR REQ" CLEARED
2705
2706 ERLOOP TST ^SALL
2707 002453 1 002000 0 1 0 000
2708 002454 1 117713 4 7 1713
2709 002455 1 114444 4 6 0444
2710 ;*SET "MSTR RDY DLY 2" WITH A "DEV WR INIT".
2711 ;*CHECK THAT "MSTR REQ HLDOFF" IS CLEARED.
2712
2713 002456 1 117605 4 7 1605 JMPSUB DEVWR ;SETUP DEVICE WRITE
2714 002457 1 064271 3 2 0 13 11 MOVB HSDPIN ;SET "MSTR RDY DLY 2"
2715 002460 1 022002 1 1 0 00 02 DATI REG2,BR ;READ REG2 FOR "MSTR REQ HLDOFF"
2716 002461 1 110463 4 4 0463 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2717 002462 1 100464 4 0 0464 JMP .+2 ;JUMP IF CLEARED
2718 002463 1 117721 4 7 1721 ERROR TST,"MSTR REQ HLDOFF" DIDN'T CLEAR AFTER HS DP INIT
2719
2720 ERLOOP TST ^SALL
2721 002464 1 002001 0 1 0 001
2722 002465 1 117713 4 7 1713
2723 002466 1 114444 4 6 0444
2724 ;*SET "DIAG MSTR REQ".
2725 ;*CHECK THAT "MSTR ACK" IS SET AND "MSTR RDY" IS CLEARED.
2726
2727 002467 1 002010 0 1 0 010 LDBR DMSTRQ ;SET "DIAG MSTR REQ"
2728 002470 1 064031 3 2 0 01 11 MOVB REG1
2729 002471 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
2730 002472 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1 FOR "MSTR ACK"
2731 002473 1 014000 0 6 0 000 SHR ;MOVE IT TO BIT 4
2732 002474 1 106476 4 3 0476 JMPB4 .+2 ;JUMP IF IT SET
2733 ERROR TST,"MSTR ACK" DID NOT SET,^_
2734 002475 1 117721 4 7 1721 DIAG SET "MSTR RDY DLY 2" AND "DIAG MSTR REQ"
2735
2736 ERLOOP TST ^SALL
2737 002476 1 002002 0 1 0 002
2738 002477 1 117713 4 7 1713
2739 002500 1 114444 4 6 0444
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 21-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2740 002501 1 032017 1 5 0 00 17 DATI REG17,AC0 ;READ REG 17
2741 002502 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "MSTR RDY" TO BIT 4
2742 002503 1 106505 4 3 0505 JMPB4 .+2 ;JUMP IF "MSTR RDY" IS SET, SHOULDN'T BE
2743 002504 1 100506 4 0 0506 JMP .+2 ;JUMP IF CLEARED
2744 ERROR TST,"MSTR RDY" DIDN'T CLEAR,^_
2745 002505 1 117721 4 7 1721 DIAG SET "MSTR RDY" THEN GENERATED "MSTR ACK"
2746
2747 ERLOOP TST ^SALL
2748 002506 1 002003 0 1 0 003
2749 002507 1 117713 4 7 1713
2750 002510 1 114444 4 6 0444
2751 ;*CLEAR "DIAG MSTR REQ".
2752 ;*CHECK THAT "MSTR ACK" IS CLEARED AND "MSTR REQ HLDOFF" IS SET.
2753
2754 002511 1 002000 0 1 0 000 LDBR 0 ;CLEAR "DIAG MSTR REQ"
2755 002512 1 064031 3 2 0 01 11 MOVB REG1
2756 002513 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1 FOR "MSTR ACK"
2757 002514 1 014000 0 6 0 000 SHR ;MOVE IT TO BIT 4
2758 002515 1 106517 4 3 0517 JMPB4 .+2 ;JUMP IF SET, SHOULDN'T BE
2759 002516 1 100520 4 0 0520 JMP .+2 ;JUMP IF CLEARED
2760 002517 1 117721 4 7 1721 ERROR TST,"MSTR ACK" DID NOT CLEAR WHEN "DIAG MSTR REQ" CLEARED
2761
2762 ERLOOP TST ^SALL
2763 002520 1 002004 0 1 0 004
2764 002521 1 117713 4 7 1713
2765 002522 1 114444 4 6 0444
2766 002523 1 022002 1 1 0 00 02 DATI REG2,BR ;READ REG2 FOR "MSTR REQ HLDOFF"
2767 002524 1 110526 4 4 0526 JMPB7 .+2 ;JUMP IF SET, SHOULD BE
2768 ERROR TST,"MSTR REQ HLDOFF" DIDN'T SET,^_
2769 002525 1 117721 4 7 1721 DIAG SET "MSTR RDY DLY 2" THEN SET AND CLEARED "DIAG MSTR REQ"
2770
2771 ERLOOP TST ^SALL
2772 002526 1 002005 0 1 0 005
2773 002527 1 117713 4 7 1713
2774 002530 1 114444 4 6 0444
2775 ;*SET "DIAG MSTR REQ".
2776 ;*CHECK THAT "MSTR ACK" DID NOT SET.
2777
2778 002531 1 002010 0 1 0 010 LDBR DMSTRQ ;SET "DIAG MSTR REQ"
2779 002532 1 064031 3 2 0 01 11 MOVB REG1
2780 002533 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
2781 002534 1 022001 1 1 0 00 01 DATI REG1,BR ;READ REG 1 FOR "MSTR ACK"
2782 002535 1 014000 0 6 0 000 SHR ;MOVE IT TO BIT 4
2783 002536 1 106540 4 3 0540 JMPB4 .+2 ;JUMP IF SET, SHOULDN'T BE
2784 002537 1 100541 4 0 0541 JMP .+2 ;JUMP IF CLEARED
2785 ERROR TST,"MSTR ACK" SET WHEN IT SHOULDN'T HAVE,^_
2786 002540 1 117721 4 7 1721 DIAG SET "MSTR REQ HLDOFF" THEN SET "DIAG MSTR REQ"
2787
2788 ERLOOP TST ^SALL
2789 002541 1 002006 0 1 0 006
2790 002542 1 117713 4 7 1713
2791 002543 1 114444 4 6 0444
2792 ;*GENERATE A SINGLE STEP PULSE.
2793 ;*CHECK THAT "MSTR RDY DLY 1" IS CLEARED.
2794
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 21-2
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2795 002544 1 064251 3 2 0 12 11 MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
2796 002545 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2797 002546 1 106550 4 3 0550 JMPB4 .+2 ;JUMP IF "MSTR RDY DLY 1" SET, SHOULDN'T BE
2798 002547 1 100551 4 0 0551 JMP .+2 ;JUMP IF CLEARED
2799 ERROR TST,"MSTR RDY DLY 1" DIDN'T CLEAR,^_
2800 <DIAG SET "MSTR RDY DLY 1" THEN CLEARED "MSTR RDY" AND
2801 002550 1 117721 4 7 1721 GENERATED A SINGLE STEP PULSE>
2802
2803 ERLOOP TST ^SALL
2804 002551 1 002007 0 1 0 007
2805 002552 1 117713 4 7 1713
2806 002553 1 114444 4 6 0444
2807 ;*GENERATE A SINGLE STEP PULSE.
2808 ;*CHECK THAT "MSTR RDY DLY 2" IS CLEARED.
2809
2810 002554 1 064251 3 2 0 12 11 MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
2811 002555 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
2812 002556 1 014000 0 6 0 000 SHR ;MOVE "MSTR RDY DLY 2" TO BIT 4
2813 002557 1 106561 4 3 0561 JMPB4 .+2 ;JUMP IF SET, SHOULDN'T BE
2814 002560 1 100562 4 0 0562 JMP .+2 ;JUMP IF CLEARED
2815 ERROR TST,"MSTR RDY DLY 2" DIDN'T CLEAR,^_
2816 <DIAG SET "MSTR RDY DLY 2" THEN CLEARED "MSTR RDY DLY 1" AND
2817 002561 1 117721 4 7 1721 GENERATED A SINGLE STEP PULSE>
2818
2819 ERLOOP TST ^SALL
2820 002562 1 002010 0 1 0 010
2821 002563 1 117713 4 7 1713
2822 002564 1 114444 4 6 0444
2823 ;*CHECK THAT "MSTR REQ HLDOFF" IS CLEARED.
2824
2825 002565 1 022002 1 1 0 00 02 DATI REG2,BR ;READ REG2 FOR "MSTR REQ HLDOFF"
2826 002566 1 110570 4 4 0570 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2827 002567 1 100571 4 0 0571 JMP .+2 ;JUMP IF CLEARED
2828 ERROR TST,"MSTR REQ HLDOFF" DIDN'T CLEAR,^_
2829 002570 1 117721 4 7 1721 DIAG SET "MSTR REQ HLDOFF" THEN CLEARED "MSTR RDY DLY 2"
2830
2831 ERLOOP TST ^SALL
2832 002571 1 002011 0 1 0 011
2833 002572 1 117713 4 7 1713
2834 002573 1 114444 4 6 0444
2835 ;*SET "MSTR REQ HLDOFF" THEN DO A HS DP INIT.
2836 ;*CHECK THAT "MSTR REQ HLDOFF" IS CLEARED.
2837
2838 002574 1 117605 4 7 1605 MHND: JMPSUB DEVWR ;SETUP DEVICE WRITE
2839 002575 1 064271 3 2 0 13 11 MOVB HSDPIN ;SET "MSTR RDY DLY 2"
2840 002576 1 002010 0 1 0 010 LDBR DMSTRQ ;SET "DIAG MSTR REQ"
2841 002577 1 064031 3 2 0 01 11 MOVB REG1
2842 002600 1 002000 0 1 0 000 LDBR 0 ;CLEAR "DIAG MSTR REQ"
2843 002601 1 064031 3 2 0 01 11 MOVB REG1
2844 002602 1 064271 3 2 0 13 11 MOVB HSDPIN ;DO AN INIT TO CLEAR "MSTR REQ HLDOFF"
2845 002603 1 022002 1 1 0 00 02 DATI REG2,BR ;READ REG2 FOR "MSTR REQ HLDOFF"
2846 002604 1 110606 4 4 0606 JMPB7 .+2 ;JUMP IF SET, SHOULDN'T BE
2847 002605 1 100607 4 0 0607 JMP .+2 ;JUMP IF CLEARED
2848 ERROR MHND,"MSTR REQ HLDOFF" DIDN'T CLEAR,^_
2849 002606 1 117721 4 7 1721 DIAG SET "MSTR REQ HLDOFF" THEN DID A HS DP INIT
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 21-3
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2850
2851 ERLOOP MHND ^SALL
2852 002607 1 002012 0 1 0 012
2853 002610 1 117713 4 7 1713
2854 002611 1 114574 4 6 0574
2855 002612 1 117723 4 7 1723 REPEAT TST
2856 002613 1 114444 4 6 0444
2857
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 22
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2858 TEST 218,TEST GENERATION OF "LD ROM ADDR 3-0"
2859 ;***********************************************************************
2860 ;* MCODE4 * TEST 218 * TEST GENERATION OF "LD ROM ADDR 3-0"
2861 ;***********************************************************************
2862 SALL
2863 002614 1 002332 0 1 0 332
2864 002615 1 117710 4 7 1710
2865
2866 002616 TST218: SALL
2867
2868 ;*TEST THAT ROM DATA BITS 19-16 ARE CLOCKED INTO ROM ADDR BITS 3-0 WHEN
2869 ;*"CLK PH 0" SETS (THIS GENERATES "LD ROM ADR TE" PULSE).
2870
2871 ;*CLEAR CLOCK PHASES.
2872 ;*LOAD ROM ADDR TO POINT TO LOC WITH BITS 19-16 ALL ONES.
2873 ;*SET "DX HIGH SPEED" AND ENABLE SINGLE STEPPING.
2874 ;*SET "RUN".
2875 ;*GENERATE A SINGLE STEP PULSE TO SET "CLK PH 0".
2876 ;*CHECK THAT ROM ADDR BITS 3-0 ARE ALL ONES.
2877
2878 002616 1 002002 0 1 0 002 LDBR BCLKEN ;CLEAR "DX HIGH SPEED" AND ENABLE BASE CLK
2879 002617 1 064031 3 2 0 01 11 MOVB REG1
2880 002620 1 002001 0 1 0 001 LDBR RMADR8 ;SET ROM ADR BIT 8
2881 002621 1 064051 3 2 0 02 11 MOVB REG2
2882 002622 1 002321 0 1 0 321 LDBR ONES ;SET ROM ADR TO POINT TO LOC WITH
2883 002623 1 064211 3 2 0 10 11 MOVB DFRMAD ;ALL ONES
2884 002624 1 117635 4 7 1635 JMPSUB ENSS ;SET "DX HIGH SPEED" AND ENABLE SINGLE STEP
2885 002625 1 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
2886 002626 1 064251 3 2 0 12 11 MOVB CLKPLS ;SET "CLK PH 0"
2887 002627 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
2888 002630 1 032010 1 5 0 00 10 DATI DFRMAD,AC0 ;READ ROM ADDR
2889 002631 1 010337 0 4 0 337 LDMEM ONES!17 ;SET EXPECTED ROM ADR VALUE
2890 002632 1 040017 2 0 0 00 17 OSM AC0 ;CHECK IF NEW ADDR IS CORRECT
2891 002633 1 114635 4 6 0635 JMPZ .+2 ;JUMP IF CORRECT
2892 ERRORM TST,ROM ADDR BITS 3-0 DIDN'T LOAD,^_
2893 <DIAG LOADED ROM ADDR THEN SET "DX HIGH SPEED" AND
2894 002634 1 117721 4 7 1721 GENERATED "CLK PH 0">
2895
2896 ERLOOP TST ^SALL
2897 002635 1 002100 0 1 0 100
2898 002636 1 117716 4 7 1716
2899 002637 1 114616 4 6 0616
2900 002640 1 117723 4 7 1723 REPEAT TST
2901 002641 1 114616 4 6 0616
2902
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 23
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2903 TEST 219,TEST "RUN DATA"
2904 ;***********************************************************************
2905 ;* MCODE4 * TEST 219 * TEST "RUN DATA"
2906 ;***********************************************************************
2907 SALL
2908 002642 1 002333 0 1 0 333
2909 002643 1 117710 4 7 1710
2910
2911 002644 TST219: SALL
2912
2913 ;*CLEAR CLOCK PHASES AND "DX HIGH SPEED" AND ENABLE SINGLE STEPPING.
2914 ;*CLEAR "MSTR RDY DLY 2" WITH A "DEV RD INIT".
2915 ;*SET "ROM 01".
2916 ;*CHECK THAT "RUN DATA" IS NOT SET.
2917
2918 002644 1 002002 0 1 0 002 LDBR BCLKEN ;CLEAR CLOCK PHASES
2919 002645 1 064031 3 2 0 01 11 MOVB REG1
2920 002646 1 002000 0 1 0 000 LDBR 0 ;CLEAR "DX HIGH SPEED" AND ENABLE SINGLE STEP
2921 002647 1 064031 3 2 0 01 11 MOVB REG1
2922 002650 1 117576 4 7 1576 JMPSUB DEVRD ;SETUP DEVICE READ
2923 002651 1 064271 3 2 0 13 11 MOVB HSDPIN ;CLEAR "MSTR RDY DLY 2"
2924 002652 1 002001 0 1 0 001 LDBR RMADR8 ;SET ROM ADDR BIT 8
2925 002653 1 064051 3 2 0 02 11 MOVB REG2
2926 002654 1 002323 0 1 0 323 LDBR CC2 ;SET "ROM 01"
2927 002655 1 064211 3 2 0 10 11 MOVB DFRMAD
2928 002656 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
2929 002657 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
2930 002660 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
2931 002661 1 110663 4 4 0663 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
2932 002662 1 100664 4 0 0664 JMP .+2 ;JUMP IF CLEARED (RUN DATA=1)
2933 ERROR TST,"RUN DATA" DIDN'T SET,^_
2934 002663 1 117721 4 7 1721 DIAG CLEARED "MSTR RDY DLY 2" AND SET "ROM 01"
2935
2936 ERLOOP TST ^SALL
2937 002664 1 002000 0 1 0 000
2938 002665 1 117713 4 7 1713
2939 002666 1 114644 4 6 0644
2940 ;*CLEAR "ROM 01".
2941 ;*CHECK THAT "RUN DATA" IS SET.
2942
2943 002667 1 002320 0 1 0 320 RNDAT1: LDBR ZEROS ;CLEAR ROM 01
2944 002670 1 064211 3 2 0 10 11 MOVB DFRMAD
2945 002671 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
2946 002672 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
2947 002673 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
2948 002674 1 110676 4 4 0676 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
2949 ERROR RNDAT1,"RUN DATA" DIDN'T CLEAR,^_
2950 002675 1 117721 4 7 1721 DIAG CLEARED THE ROM BITS AND "MSTR RDY DLY 2"
2951
2952 ERLOOP RNDAT1 ^SALL
2953 002676 1 002001 0 1 0 001
2954 002677 1 117713 4 7 1713
2955 002700 1 114667 4 6 0667
2956 ;*SET "ROM 01" AND "MSTR RDY DLY 2".
2957 ;*CHECK THAT "RUN DATA" IS NOT SET.
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 23-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
2958
2959 002701 1 002323 0 1 0 323 RNDAT2: LDBR CC2 ;SET ROM 01
2960 002702 1 064211 3 2 0 10 11 MOVB DFRMAD
2961 002703 1 117605 4 7 1605 JMPSUB DEVWR ;SETUP DEVICE WRITE
2962 002704 1 064271 3 2 0 13 11 MOVB HSDPIN ;SET "MSTR RDY DLY 2"
2963 002705 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
2964 002706 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
2965 002707 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
2966 002710 1 110712 4 4 0712 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
2967 ERROR RNDAT2,"RUN DATA" DIDN'T CLEAR,^_
2968 002711 1 117721 4 7 1721 DIAG SET "ROM 01" AND THEN SET "MSTR RDY DLY 2"
2969
2970 ERLOOP RNDAT2 ^SALL
2971 002712 1 002002 0 1 0 002
2972 002713 1 117713 4 7 1713
2973 002714 1 114701 4 6 0701
2974 ;*SET "ROM 02", "SLVE RDY DLY 2" IS ALREADY CLEARED.
2975 ;*CHECK THAT "RUN DATA" IS SET.
2976
2977 002715 1 002324 0 1 0 324 RNDAT3: LDBR CC4 ;SET ROM 02
2978 002716 1 064211 3 2 0 10 11 MOVB DFRMAD
2979 002717 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
2980 002720 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
2981 002721 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
2982 002722 1 110724 4 4 0724 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
2983 002723 1 100725 4 0 0725 JMP .+2 ;JUMP IF CLEARED (RUN DATA=1)
2984 ERROR RNDAT3,"RUN DATA" DIDN'T SET,^_
2985 002724 1 117721 4 7 1721 DIAG CLEARED "SLVE RDY DLY 2" AND SET "ROM 02"
2986
2987 ERLOOP RNDAT3 ^SALL
2988 002725 1 002003 0 1 0 003
2989 002726 1 117713 4 7 1713
2990 002727 1 114715 4 6 0715
2991 ;*SET "SLVE RDY DLY 2".
2992 ;*CHECK THAT "RUN DATA" IS CLEARED.
2993
2994 002730 1 117576 4 7 1576 RNDAT4: JMPSUB DEVRD ;SETUP DEVICE READ
2995 002731 1 064271 3 2 0 13 11 MOVB HSDPIN ;SET "SLVE RDY DLY 2"
2996 002732 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
2997 002733 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
2998 002734 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
2999 002735 1 110737 4 4 0737 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
3000 ERROR RNDAT4,"RUN DATA" DIDN'T CLEAR,^_
3001 002736 1 117721 4 7 1721 DIAG SET "ROM 02" AND THEN SET "SLVE RDY DLY 2"
3002
3003 ERLOOP RNDAT4 ^SALL
3004 002737 1 002004 0 1 0 004
3005 002740 1 117713 4 7 1713
3006 002741 1 114730 4 6 0730
3007 ;*SET "ROM 02" AND "ROM 00" AND "SLVE END XFER".
3008 ;*CHECK THAT "RUN DATA" IS SET.
3009
3010 002742 1 002325 0 1 0 325 RNDAT5: LDBR CC5 ;SET ROM 02 & 00
3011 002743 1 064211 3 2 0 10 11 MOVB DFRMAD
3012 002744 1 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED"
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 23-2
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3013 002745 1 064031 3 2 0 01 11 MOVB REG1
3014 002746 1 117664 4 7 1664 JMPSUB SWEX ;SET "SLVE END XFER"
3015 002747 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
3016 002750 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
3017 002751 1 110753 4 4 0753 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
3018 002752 1 100754 4 0 0754 JMP .+2 ;JUMP IF CLEARED (RUN DATA=1)
3019 ERROR RNDAT5,"RUN DATA" DIDN'T SET,^_
3020 002753 1 117721 4 7 1721 DIAG SET "SLVE END XFER" AND "ROM 00" AND "ROM 02"
3021
3022 ERLOOP RNDAT5 ^SALL
3023 002754 1 002005 0 1 0 005
3024 002755 1 117713 4 7 1713
3025 002756 1 114742 4 6 0742
3026 ;*CLEAR "ROM 00".
3027 ;*CHECK THAT "RUN DATA" IS CLEARED.
3028
3029 002757 1 002000 0 1 0 000 RNDAT6: LDBR 0 ;CLEAR "DX HIGH SPEED"
3030 002760 1 064031 3 2 0 01 11 MOVB REG1
3031 002761 1 002324 0 1 0 324 LDBR CC4 ;SET ROM 02 AND CLEAR ROM 00
3032 002762 1 064211 3 2 0 10 11 MOVB DFRMAD
3033 002763 1 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED"
3034 002764 1 064031 3 2 0 01 11 MOVB REG1
3035 002765 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
3036 002766 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
3037 002767 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
3038 002770 1 110772 4 4 0772 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
3039 ERROR RNDAT6,"RUN DATA" DIDN'T CLEAR,^_
3040 002771 1 117721 4 7 1721 DIAG SET "SLVE END XFER" AND "ROM 02" BUT CLEARED "ROM 00"
3041
3042 ERLOOP RNDAT6 ^SALL
3043 002772 1 002006 0 1 0 006
3044 002773 1 117713 4 7 1713
3045 002774 1 114757 4 6 0757
3046 ;*SET "ROM 00" AND CLEAR "ROM 02"
3047 ;*CHECK THAT "RUN DATA" IS CLEARED.
3048
3049 002775 1 002000 0 1 0 000 RNDAT7: LDBR 0 ;CLEAR "DX HIGH SPEED"
3050 002776 1 064031 3 2 0 01 11 MOVB REG1
3051 002777 1 002327 0 1 0 327 LDBR CC1 ;SET ROM 00 AND CLEAR ROM 02
3052 003000 1 064211 3 2 0 10 11 MOVB DFRMAD
3053 003001 1 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED"
3054 003002 1 064031 3 2 0 01 11 MOVB REG1
3055 003003 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
3056 003004 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
3057 003005 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
3058 003006 1 111010 4 4 1010 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
3059 ERROR RNDAT7,"RUN DATA" DIDN'T CLEAR,^_
3060 003007 1 117721 4 7 1721 DIAG SET "SLVE END XFER" AND "ROM 00" BUT CLEARED "ROM 02"
3061
3062 ERLOOP RNDAT7 ^SALL
3063 003010 1 002007 0 1 0 007
3064 003011 1 117713 4 7 1713
3065 003012 1 114775 4 6 0775
3066 ;*SET "ROM 02" AND CLEAR "SLVE END XFER".
3067 ;*CHECK THAT "RUN DATA" IS CLEARED.
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 23-3
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3068
3069 003013 1 002000 0 1 0 000 RNDAT8: LDBR 0 ;CLEAR "DX HIGH SPEED"
3070 003014 1 064031 3 2 0 01 11 MOVB REG1
3071 003015 1 002325 0 1 0 325 LDBR CC5 ;SET ROM 00 & 02
3072 003016 1 064211 3 2 0 10 11 MOVB DFRMAD
3073 003017 1 117675 4 7 1675 JMPSUB CLRSEX ;GO CLEAR "SLVE END XFER"
3074 003020 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
3075 003021 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
3076 003022 1 111024 4 4 1024 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
3077 ERROR RNDAT8,"RUN DATA" DIDN'T CLEAR,^_
3078 003023 1 117721 4 7 1721 DIAG SET "ROM 02" AND "ROM 00" AND CLEARED "SLVE END XFER"
3079
3080 ERLOOP RNDAT8 ^SALL
3081 003024 1 002010 0 1 0 010
3082 003025 1 117713 4 7 1713
3083 003026 1 115013 4 6 1013
3084 ;*SET "EXTEND RUN", "SLVE END XFER", AND "ROM 02".
3085 ;*CHECK THAT "RUN DATA" IS SET.
3086
3087 003027 1 002000 0 1 0 000 RNDAT9: LDBR 0 ;CLEAR "DX HIGH SPEED"
3088 003030 1 064031 3 2 0 01 11 MOVB REG1
3089 003031 1 002347 0 1 0 347 LDBR DSHF7 ;SET ROM ADDR FOR SHIFT CNT=7
3090 003032 1 064211 3 2 0 10 11 MOVB DFRMAD
3091 003033 1 117675 4 7 1675 JMPSUB CLRSEX ;CLEAR "SLVE END XFER"
3092 003034 1 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
3093 003035 1 117614 4 7 1614 JMPSUB PULSE4 ;GENERATE 4 SINGLE STEP PULSES
3094 003036 1 002324 0 1 0 324 LDBR CC4 ;SET ROM 02
3095 003037 1 064211 3 2 0 10 11 MOVB DFRMAD
3096 003040 1 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED"
3097 003041 1 064031 3 2 0 01 11 MOVB REG1
3098 003042 1 117664 4 7 1664 JMPSUB SWEX ;SET "SLVE END XFER"
3099 003043 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
3100 003044 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
3101 003045 1 111047 4 4 1047 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
3102 003046 1 101050 4 0 1050 JMP .+2 ;JUMP IF CLEARED (RUN DATA=1)
3103 ERROR RNDAT9,"RUN DATA" DIDN'T SET,^_
3104 003047 1 117721 4 7 1721 <DIAG SET "EXTEND RUN", "SLVE END XFER", AND "ROM 02">
3105
3106 ERLOOP RNDAT9 ^SALL
3107 003050 1 002011 0 1 0 011
3108 003051 1 117713 4 7 1713
3109 003052 1 115027 4 6 1027
3110 ;*CLEAR "SLVE END XFER".
3111 ;*CHECK THAT "RUN DATA" CLEARS.
3112
3113 003053 1 117675 4 7 1675 RNDT10: JMPSUB CLRSEX ;CLEAR "SLVE END XFER"
3114 003054 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
3115 003055 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
3116 003056 1 111060 4 4 1060 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
3117 ERROR RNDAT7,"RUN DATA" DIDN'T CLEAR,^_
3118 003057 1 117721 4 7 1721 DIAG SET "EXTEND RUN" AND "ROM 02" AND CLEARED "SLVE END XFER"
3119
3120 ERLOOP RNDAT7 ^SALL
3121 003060 1 002012 0 1 0 012
3122 003061 1 117713 4 7 1713
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 23-4
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3123 003062 1 114775 4 6 0775
3124 ;*SET "SLVE END XFER" AND CLEAR "ROM 02".
3125 ;*CHECK THAT "RUN DATA" IS CLEARED.
3126
3127 003063 1 002000 0 1 0 000 RNDT11: LDBR 0 ;CLEAR "DX HIGH SPEED"
3128 003064 1 064031 3 2 0 01 11 MOVB REG1
3129 003065 1 002322 0 1 0 322 LDBR CC0 ;CLEAR "ROM 02"
3130 003066 1 064211 3 2 0 10 11 MOVB DFRMAD
3131 003067 1 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED"
3132 003070 1 064031 3 2 0 01 11 MOVB REG1
3133 003071 1 117664 4 7 1664 JMPSUB SWEX ;SET "SLVE END XFER"
3134 003072 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
3135 003073 1 062005 3 1 0 00 05 SHL AC0,BR ;LEFT ADJUST "NOT RUN DATA" BIT
3136 003074 1 111076 4 4 1076 JMPB7 .+2 ;JUMP IF SET (RUN DATA=0)
3137 ERROR RNDAT7,"RUN DATA" DIDN'T CLEAR,^_
3138 003075 1 117721 4 7 1721 DIAG SET "EXTEND RUN" AND "SLVE END XFER" AND CLEARED "ROM 02"
3139
3140 ERLOOP RNDAT7 ^SALL
3141 003076 1 002013 0 1 0 013
3142 003077 1 117713 4 7 1713
3143 003100 1 114775 4 6 0775
3144 003101 1 117723 4 7 1723 REPEAT TST
3145 003102 1 114644 4 6 0644
3146
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 24
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3147 TEST 220,TEST CLOCKING OF "RUN"
3148 ;***********************************************************************
3149 ;* MCODE4 * TEST 220 * TEST CLOCKING OF "RUN"
3150 ;***********************************************************************
3151 SALL
3152 003103 1 002334 0 1 0 334
3153 003104 1 117710 4 7 1710
3154
3155 003105 TST220: SALL
3156
3157 ;*TEST THAT "RUN" SETS AND CLEARS CORRECTLY USING THE CLOCKED INPUTS.
3158
3159 ;*CLEAR "DX HIGH SPEED" AND ENABLE SINGLE STEPPING.
3160 ;*SET "RUN DATA".
3161 ;*SET "DX HIGH SPEED".
3162 ;*GENERATE 2 SINGLE STEP PULSES.
3163 ;*CHECK THAT "RUN" IS SET.
3164
3165 003105 1 002002 0 1 0 002 LDBR BCLKEN ;CLEAR CLOCK PHASES
3166 003106 1 064031 3 2 0 01 11 MOVB REG1
3167 003107 1 002000 0 1 0 000 LDBR 0 ;CLEAR "DX HIGH SPEED" AND ENABLE SINGLE STEP
3168 003110 1 064031 3 2 0 01 11 MOVB REG1
3169 003111 1 117576 4 7 1576 JMPSUB DEVRD ;SETUP DEVICE READ
3170 003112 1 064271 3 2 0 13 11 MOVB HSDPIN ;GENERATE "DEV RD INIT", SET "SLVE RDY DLY 2"
3171 003113 1 002001 0 1 0 001 LDBR RMADR8 ;SET ROM ADDR BIT 8
3172 003114 1 064051 3 2 0 02 11 MOVB REG2
3173 003115 1 002321 0 1 0 321 LDBR ONES ;SET ALL ROM BITS
3174 003116 1 064211 3 2 0 10 11 MOVB DFRMAD
3175 003117 1 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED"
3176 003120 1 064031 3 2 0 01 11 MOVB REG1
3177 003121 1 064251 3 2 0 12 11 MOVB CLKPLS ;CLEAR "CLR RUN"
3178 003122 1 064251 3 2 0 12 11 MOVB CLKPLS ;CLOCK "RUN" FLOP
3179 003123 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
3180 003124 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT RUN" BIT INTO BIT 4
3181 003125 1 107127 4 3 1127 JMPB4 .+2 ;JUMP IF SET (RUN = 0)
3182 003126 1 101130 4 0 1130 JMP .+2 ;JUMP IF CLEARED (RUN=1)
3183 ERROR TST,"RUN" DID NOT SET,^_
3184 <DIAG CLEARED "RUN" AND SET "RUN DATA" THEN
3185 003127 1 117721 4 7 1721 GENERATED 2 SINGLE STEP PULSES>
3186
3187 ERLOOP TST ^SALL
3188 003130 1 002000 0 1 0 000
3189 003131 1 117713 4 7 1713
3190 003132 1 115105 4 6 1105
3191 ;*CLEAR "RUN DATA" AND GENERATE A "SET RUN" PULSE.
3192 ;*GENERATE A SINGLE STEP PULSE.
3193 ;*CHECK THAT "RUN" IS CLEARED.
3194
3195 003133 1 002002 0 1 0 002 RUNA: LDBR BCLKEN ;CLEAR CLOCK PHASES
3196 003134 1 064031 3 2 0 01 11 MOVB REG1
3197 003135 1 002000 0 1 0 000 LDBR 0 ;ENABLE SINGLE STEPPING
3198 003136 1 064031 3 2 0 01 11 MOVB REG1
3199 003137 1 002320 0 1 0 320 LDBR ZEROS ;LOAD ROM ADDR TO POINT TO LOC WITH
3200 003140 1 064211 3 2 0 10 11 MOVB DFRMAD ;ROM BITS CLEARED
3201 003141 1 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED"
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 24-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3202 003142 1 064031 3 2 0 01 11 MOVB REG1
3203 003143 1 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
3204 003144 1 064251 3 2 0 12 11 MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
3205 003145 1 032016 1 5 0 00 16 DATI REG16,AC0 ;READ REG 16
3206 003146 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT RUN" BIT INTO BIT 4
3207 003147 1 107151 4 3 1151 JMPB4 .+2 ;JUMP IF SET (RUN = 0)
3208 ERROR RUNA,"RUN" DID NOT CLEAR,^_
3209 <DIAG CLEARED "RUN DATA" AND SET "RUN" THEN
3210 003150 1 117721 4 7 1721 GENERATED A SINGLE STEP PULSE>
3211
3212 ERLOOP RUNA ^SALL
3213 003151 1 002001 0 1 0 001
3214 003152 1 117713 4 7 1713
3215 003153 1 115133 4 6 1133
3216 003154 1 117723 4 7 1723 REPEAT TST
3217 003155 1 115105 4 6 1105
3218
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 25
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3219 TEST 221,TEST SETTING AND CLEARING OF "EN MUX/DEMUX"
3220 ;***********************************************************************
3221 ;* MCODE4 * TEST 221 * TEST SETTING AND CLEARING OF "EN MUX/DEMUX"
3222 ;***********************************************************************
3223 SALL
3224 003156 1 002335 0 1 0 335
3225 003157 1 117710 4 7 1710
3226
3227 003160 TST221: SALL
3228
3229 ;*CLEAR "DX HIGH SPEED" AND ENABLE BASE CLOCK.
3230 ;*CHECK THAT "EN MUX/DEMUX" IS CLEARED.
3231
3232 003160 1 002002 0 1 0 002 LDBR BCLKEN ;ENABLE THE BASE CLOCK
3233 003161 1 064031 3 2 0 01 11 MOVB REG1
3234 003162 1 000000 0 0 0 000 NOP ;DELAY BEFORE DOING DATI
3235 003163 1 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
3236 003164 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT EN MUX/DEMUX" TO BIT 4
3237 003165 1 107167 4 3 1167 JMPB4 .+2 ;JUMP IF SET (EN MUX/DEMUX = 0)
3238 ERROR TST,<"EN MUX/DEMUX" DID NOT CLEAR WITH DF CLOCK
3239 003166 1 117721 4 7 1721 PHASES CLEARED>
3240
3241 ERLOOP TST ^SALL
3242 003167 1 002000 0 1 0 000
3243 003170 1 117713 4 7 1713
3244 003171 1 115160 4 6 1160
3245 ;*ENABLE SINGLE STEPPING AND SET "RUN".
3246 ;*GENERATE 2 SINGLE STEP PULSES TO SET "CLK PH 1".
3247 ;*CHECK THAT "EN MUX/DEMUX" IS NOT SET YET.
3248
3249 003172 1 002000 0 1 0 000 LDBR 0 ;ENABLE SINGLE STEP MODE
3250 003173 1 064031 3 2 0 01 11 MOVB REG1
3251 003174 1 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
3252 003175 1 117616 4 7 1616 JMPSUB PULSE2 ;GENERATE 2 SINGLE STEP PULSES
3253 003176 1 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
3254 003177 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT EN MUX/DEMUX" TO BIT 4
3255 003200 1 107202 4 3 1202 JMPB4 .+2 ;JUMP IF SET (EN MUX/DEMUX = 0)
3256 ERROR TST,"EN MUX/DEMUX" SET BEFORE IT SHOULD HAVE,^_
3257 <DIAG CLEARED CLOCK PHASES THEN GENERATED
3258 003201 1 117721 4 7 1721 2 SINGLE STEP PULSES>
3259
3260 ERLOOP TST ^SALL
3261 003202 1 002001 0 1 0 001
3262 003203 1 117713 4 7 1713
3263 003204 1 115160 4 6 1160
3264 ;*GENERATE A SINGLE STEP PULSE TO CLOCK "EN MUX/DEMUX" FLOP.
3265 ;*CHECK THAT "EN MUX/DEMUX" IS SET.
3266
3267 003205 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3268 003206 1 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
3269 003207 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT EN MUX/DEMUX" TO BIT 4
3270 003210 1 107212 4 3 1212 JMPB4 .+2 ;JUMP IF SET (EN MUX/DEMUX = 0)
3271 003211 1 101213 4 0 1213 JMP .+2 ;JUMP IF CLEAR (EN MUX/DEMUX = 1)
3272 ERROR TST,"EN MUX/DEMUX" DID NOT SET,^_
3273 <DIAG CLEARED CLOCK PHASES THEN GENERATED
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 25-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3274 003212 1 117721 4 7 1721 3 SINGLE STEP PULSES>
3275
3276 ERLOOP TST ^SALL
3277 003213 1 002002 0 1 0 002
3278 003214 1 117713 4 7 1713
3279 003215 1 115160 4 6 1160
3280 ;*GENERATE A SINGLE STEP PULSE TO CLEAR "CLK PH 1".
3281 ;*CHECK THAT "EN MUX/DEMUX" IS CLEARED.
3282
3283 003216 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3284 003217 1 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
3285 003220 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "NOT EN MUX/DEMUX" TO BIT 4
3286 003221 1 107223 4 3 1223 JMPB4 .+2 ;JUMP IF SET (EN MUX/DEMUX = 0)
3287 ERROR TST,"EN MUX/DEMUX" DID NOT CLEAR,^_
3288 <DIAG CLEARED CLOCK PHASES THEN GENERATED
3289 003222 1 117721 4 7 1721 4 AND 1/2 SINGLE STEP PULSES>
3290
3291 ERLOOP TST ^SALL
3292 003223 1 002003 0 1 0 003
3293 003224 1 117713 4 7 1713
3294 003225 1 115160 4 6 1160
3295 003226 1 117723 4 7 1723 REPEAT TST
3296 003227 1 115160 4 6 1160
3297
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 26
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3298 TEST 222,TEST GENERATION OF "LD CB"
3299 ;***********************************************************************
3300 ;* MCODE4 * TEST 222 * TEST GENERATION OF "LD CB"
3301 ;***********************************************************************
3302 SALL
3303 003230 1 002336 0 1 0 336
3304 003231 1 117710 4 7 1710
3305
3306 003232 TST222: SALL
3307
3308 ;*CLEAR CLOCK PHASES AND "SLVE RDY" FLOPS.
3309 ;*SET "ROM 02".
3310 ;*SET "DX HIGH SPEED" AND ENABLE SINGLE STEPPING.
3311 ;*CLEAR "CLR RUN".
3312 ;*CHECK THAT "LD CB" IS SET.
3313
3314 003232 1 002002 0 1 0 002 LDBR BCLKEN ;CLEAR CLOCK PHASES
3315 003233 1 064031 3 2 0 01 11 MOVB REG1
3316 003234 1 117605 4 7 1605 JMPSUB DEVWR ;SET DEVICE WRITE
3317 003235 1 064271 3 2 0 13 11 MOVB HSDPIN ;CLEAR "SLVE RDY" FLOPS
3318 003236 1 002001 0 1 0 001 LDBR RMADR8 ;SET ROM ADDR BIT 8
3319 003237 1 064051 3 2 0 02 11 MOVB REG2
3320 003240 1 002324 0 1 0 324 LDBR CC4 ;SET ROM ADDR TO POINT TO LOC WITH
3321 003241 1 064211 3 2 0 10 11 MOVB DFRMAD ;"ROM 02" = 1
3322 003242 1 117635 4 7 1635 JMPSUB ENSS ;SET "DX HIGH SPEED" AND ENABLE SINGLE STEP
3323 003243 1 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN" AND CLEAR "CLR RUN"
3324 003244 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15 FOR "LD CB" BIT
3325 003245 1 107247 4 3 1247 JMPB4 .+2 ;JUMP IF SET
3326 ERROR TST,"LD CB" DID NOT SET,^_
3327 003246 1 117721 4 7 1721 DIAG CLEARED CLOCK PHASES AND "CLR RUN" AND SET "ROM 02"
3328
3329 ERLOOP TST ^SALL
3330 003247 1 002000 0 1 0 000
3331 003250 1 117713 4 7 1713
3332 003251 1 115232 4 6 1232
3333 ;*GENERATE A SINGLE STEP PULSE TO SET "CLK PH 0".
3334 ;*CHECK THAT "LD CB" IS CLEARED.
3335
3336 003252 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3337 003253 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15 FOR "LD CB" BIT
3338 003254 1 107256 4 3 1256 JMPB4 .+2 ;JUMP IF SET, SHOULDN'T BE
3339 003255 1 101257 4 0 1257 JMP .+2 ;ELSE, OKAY
3340 ERROR TST,"LD CB" DID NOT CLEAR,^_
3341 <DIAG CLEARED CLOCK PHASES AND "CLR RUN" AND SET "ROM 02" THEN
3342 003256 1 117721 4 7 1721 GENERATED A SINGLE STEP PULSE>
3343
3344 ERLOOP TST ^SALL
3345 003257 1 002001 0 1 0 001
3346 003260 1 117713 4 7 1713
3347 003261 1 115232 4 6 1232
3348 ;*CHECK THAT "SLVE RDY" IS SET.
3349
3350 003262 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
3351 003263 1 105265 4 2 1265 JMPB0 .+2 ;JUMP IF "SLVE RDY" SET, SHOULD HAVE
3352 ERROR TST,"SLVE RDY" DIDN'T SET,^_
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 26-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3353 003264 1 117721 4 7 1721 DIAG SET AND CLEARED "LD CB"
3354
3355 ERLOOP TST ^SALL
3356 003265 1 002002 0 1 0 002
3357 003266 1 117713 4 7 1713
3358 003267 1 115232 4 6 1232
3359 ;*GENERATE A SINGLE STEP PULSE.
3360 ;*CHECK THAT "SLVE RDY DLY 1" IS SET.
3361
3362 003270 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3363 003271 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
3364 003272 1 014000 0 6 0 000 SHR ;MOVE "SLVE RDY DLY 1" TO BIT 0
3365 003273 1 105275 4 2 1275 JMPB0 .+2 ;JUMP IF IT SET, SHOULD HAVE
3366 ERROR TST,"SLVE RDY DLY 1" DIDN'T SET,^_
3367 003274 1 117721 4 7 1721 DIAG SET "SLVE RDY" THEN GENERATED A SINGLE STEP PULSE
3368
3369 ERLOOP TST ^SALL
3370 003275 1 002003 0 1 0 003
3371 003276 1 117713 4 7 1713
3372 003277 1 115232 4 6 1232
3373 ;*GENERATE A SINGLE STEP PULSE.
3374 ;*CHECK THAT "LD CB" DID NOT SET.
3375
3376 003300 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3377 003301 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15 FOR "LD CB" BIT
3378 003302 1 107304 4 3 1304 JMPB4 .+2 ;JUMP IF SET, SHOULDN'T BE
3379 003303 1 101305 4 0 1305 JMP .+2 ;ELSE, OKAY
3380 ERROR TST,"LD CB" SET WHEN IT SHOULDN'T HAVE,^_
3381 <DIAG CLEARED CLOCK PHASES AND "CLR RUN" AND SET "ROM 02" THEN
3382 003304 1 117721 4 7 1721 GENERATED 3 SINGLE STEP PULSES>
3383
3384 ERLOOP TST ^SALL
3385 003305 1 002004 0 1 0 004
3386 003306 1 117713 4 7 1713
3387 003307 1 115232 4 6 1232
3388 ;*CHECK THAT "SLVE RDY DLY 2" IS SET.
3389
3390 003310 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
3391 003311 1 014000 0 6 0 000 SHR ;MOVE "SLVE RDY DLY 2" TO BIT 0
3392 003312 1 014000 0 6 0 000 SHR
3393 003313 1 105315 4 2 1315 JMPB0 .+2 ;JUMP IF IT SET, SHOULD HAVE
3394 ERROR TST,"SLVE RDY DLY 2" DIDN'T SET,^_
3395 003314 1 117721 4 7 1721 DIAG SET "SLVE RDY DLY 1" THEN GENERATED A SINGLE STEP PULSE
3396
3397 ERLOOP TST ^SALL
3398 003315 1 002005 0 1 0 005
3399 003316 1 117713 4 7 1713
3400 003317 1 115232 4 6 1232
3401 ;*CLEAR CLOCK PHASES.
3402 ;*CLEAR "ROM 02" AND "CLR RUN".
3403 ;*CHECK THAT "LD CB" IS NOT SET.
3404
3405 003320 1 064251 3 2 0 12 11 MOVB CLKPLS ;CLEAR CLOCK PHASES
3406 003321 1 002000 0 1 0 000 LDCB1: LDBR 0 ;CLEAR "DX HIGH SPEED"
3407 003322 1 064031 3 2 0 01 11 MOVB REG1
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 26-2
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3408 003323 1 002320 0 1 0 320 LDBR ZEROS ;SET ROM ADDR TO POINT TO LOC WITH
3409 003324 1 064211 3 2 0 10 11 MOVB DFRMAD ;"ROM 02"=0
3410 003325 1 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
3411 003326 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15 FOR "LD CB" BIT
3412 003327 1 107331 4 3 1331 JMPB4 .+2 ;JUMP IF SET, SHOULDN'T HAVE
3413 003330 1 101332 4 0 1332 JMP .+2 ;ELSE, OKAY
3414 ERROR LDCB1,<"LD CB" SET WITH "ROM 02" AND
3415 003331 1 117721 4 7 1721 "CLR RUN" AND CLOCK PHASES CLEARED>
3416
3417 ERLOOP LDCB1 ^SALL
3418 003332 1 002006 0 1 0 006
3419 003333 1 117713 4 7 1713
3420 003334 1 115321 4 6 1321
3421 ;*SET "ROM 02" AND "CLR RUN".
3422 ;*CHECK THAT "LD CB" IS NOT SET.
3423
3424 003335 1 002324 0 1 0 324 LDCB2: LDBR CC4 ;SET ROM ADDR TO POINT TO LOC WITH
3425 003336 1 064211 3 2 0 10 11 MOVB DFRMAD ;"ROM 02"=1
3426 003337 1 064271 3 2 0 13 11 MOVB HSDPIN ;CLEAR "RUN" AND SET "CLR RUN"
3427 003340 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15 FOR "LD CB" BIT
3428 003341 1 107343 4 3 1343 JMPB4 .+2 ;JUMP IF SET, SHOULDN'T HAVE
3429 003342 1 101344 4 0 1344 JMP .+2 ;ELSE, OKAY
3430 ERROR LDCB2,<"LD CB" SET WITH "ROM 02" AND
3431 003343 1 117721 4 7 1721 "CLR RUN" SET AND CLOCK PHASES CLEARED>
3432
3433 ERLOOP LDCB2 ^SALL
3434 003344 1 002007 0 1 0 007
3435 003345 1 117713 4 7 1713
3436 003346 1 115335 4 6 1335
3437 003347 1 117723 4 7 1723 REPEAT TST
3438 003350 1 115232 4 6 1232
3439
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 27
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3440 TEST 223,TEST GENERATION OF "LD SB"
3441 ;***********************************************************************
3442 ;* MCODE4 * TEST 223 * TEST GENERATION OF "LD SB"
3443 ;***********************************************************************
3444 SALL
3445 003351 1 002337 0 1 0 337
3446 003352 1 117710 4 7 1710
3447
3448 003353 TST223: SALL
3449
3450 ;*CLEAR CLOCK PHASES AND "MSTR RDY" FLOPS.
3451 ;*SET "ROM 01".
3452 ;*SET "DX HIGH SPEED" AND ENABLE SINGLE STEPPING.
3453 ;*CLEAR "CLR RUN".
3454 ;*CHECK THAT "LD SB" IS SET.
3455
3456 003353 1 002002 0 1 0 002 LDBR BCLKEN ;CLEAR CLOCK PHASES
3457 003354 1 064031 3 2 0 01 11 MOVB REG1
3458 003355 1 117576 4 7 1576 JMPSUB DEVRD ;SET DEVICE READ
3459 003356 1 064271 3 2 0 13 11 MOVB HSDPIN ;CLEAR "MSTR RDY" FLOPS
3460 003357 1 002001 0 1 0 001 LDBR RMADR8 ;SET ROM ADDR BIT 8
3461 003360 1 064051 3 2 0 02 11 MOVB REG2
3462 003361 1 002323 0 1 0 323 LDBR CC2 ;SET ROM ADDR TO POINT TO LOC WITH
3463 003362 1 064211 3 2 0 10 11 MOVB DFRMAD ;"ROM 01" = 1
3464 003363 1 117635 4 7 1635 JMPSUB ENSS ;SET "DX HIGH SPEED" AND ENABLE SINGLE STEP
3465 003364 1 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN" AND CLEAR "CLR RUN"
3466 003365 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15
3467 003366 1 014000 0 6 0 000 SHR ;MOVE "LD SB" BIT TO BIT 4
3468 003367 1 107371 4 3 1371 JMPB4 .+2 ;JUMP IF SET
3469 ERROR TST,"LD SB" DID NOT SET,^_
3470 003370 1 117721 4 7 1721 DIAG CLEARED CLOCK PHASES AND "CLR RUN" AND SET "ROM 01"
3471
3472 ERLOOP TST ^SALL
3473 003371 1 002000 0 1 0 000
3474 003372 1 117713 4 7 1713
3475 003373 1 115353 4 6 1353
3476 ;*GENERATE A SINGLE STEP PULSE TO SET "CLK PH 0".
3477 ;*CHECK THAT "LD SB" IS CLEARED.
3478
3479 003374 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3480 003375 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15
3481 003376 1 014000 0 6 0 000 SHR ;MOVE "LD SB" BIT TO BIT 4
3482 003377 1 107401 4 3 1401 JMPB4 .+2 ;JUMP IF SET
3483 003400 1 101402 4 0 1402 JMP .+2 ;JUMP IF CLEAR
3484 ERROR TST,"LD SB" DID NOT CLEAR,^_
3485 <DIAG CLEARED CLOCK PHASES AND "CLR RUN" AND SET "ROM 01" THEN
3486 003401 1 117721 4 7 1721 GENERATED A SINGLE STEP PULSE>
3487
3488 ERLOOP TST ^SALL
3489 003402 1 002001 0 1 0 001
3490 003403 1 117713 4 7 1713
3491 003404 1 115353 4 6 1353
3492 ;*CHECK THAT "MSTR RDY" IS SET.
3493
3494 003405 1 032017 1 5 0 00 17 DATI REG17,AC0 ;READ REG 17
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 27-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3495 003406 1 062005 3 1 0 00 05 SHL AC0,BR ;MOVE "MSTR RDY" TO BIT 4
3496 003407 1 107411 4 3 1411 JMPB4 .+2 ;JUMP IF SET, SHOULD BE
3497 ERROR TST,"MSTR RDY" DIDN'T SET,^_
3498 003410 1 117721 4 7 1721 DIAG SET AND CLEARED "LD SB"
3499
3500 ERLOOP TST ^SALL
3501 003411 1 002002 0 1 0 002
3502 003412 1 117713 4 7 1713
3503 003413 1 115353 4 6 1353
3504 ;*GENERATE A SINGLE STEP PULSE.
3505 ;*CHECK THAT "MSTR RDY DLY 1" IS SET.
3506
3507 003414 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3508 003415 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
3509 003416 1 107420 4 3 1420 JMPB4 .+2 ;JUMP IF "MSTR RDY DLY 1" SET, SHOULD BE
3510 ERROR TST,"MSTR RDY DLY 1" DIDN'T SET,^_
3511 003417 1 117721 4 7 1721 DIAG SET "MSTR RDY" THEN GENERATED A SINGLE STEP PULSE
3512
3513 ERLOOP TST ^SALL
3514 003420 1 002003 0 1 0 003
3515 003421 1 117713 4 7 1713
3516 003422 1 115353 4 6 1353
3517 ;*GENERATE A SINGLE STEP PULSE.
3518 ;*CHECK THAT "LD SB" DID NOT SET.
3519
3520 003423 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3521 003424 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15
3522 003425 1 014000 0 6 0 000 SHR ;MOVE "LD SB" BIT TO BIT 4
3523 003426 1 107430 4 3 1430 JMPB4 .+2 ;JUMP IF SET
3524 003427 1 101431 4 0 1431 JMP .+2 ;JUMP IF CLEAR
3525 ERROR TST,"LD SB" SET WHEN IT SHOULDN'T HAVE,^_
3526 <DIAG CLEARED CLOCK PHASES AND "CLR RUN" AND SET "ROM 01" THEN
3527 003430 1 117721 4 7 1721 GENERATED 3 SINGLE STEP PULSES>
3528
3529 ERLOOP TST ^SALL
3530 003431 1 002004 0 1 0 004
3531 003432 1 117713 4 7 1713
3532 003433 1 115353 4 6 1353
3533 ;*CHECK THAT "MSTR RDY DLY 2" IS SET.
3534
3535 003434 1 022017 1 1 0 00 17 DATI REG17,BR ;READ REG 17
3536 003435 1 014000 0 6 0 000 SHR ;MOVE "MSTR RDY DLY 2" INTO BIT 4
3537 003436 1 107440 4 3 1440 JMPB4 .+2 ;JUMP IF "MSTR RDY DLY 2" SET, SHOULD BE
3538 ERROR TST,"MSTR RDY DLY 2" DIDN'T SET,^_
3539 003437 1 117721 4 7 1721 DIAG SET "MSTR RDY DLY 1" THEN GENERATED A SINGLE STEP PULSE
3540
3541 ERLOOP TST ^SALL
3542 003440 1 002005 0 1 0 005
3543 003441 1 117713 4 7 1713
3544 003442 1 115353 4 6 1353
3545 ;*CLEAR CLOCK PHASES.
3546 ;*CLEAR "ROM 01" AND "CLR RUN".
3547 ;*CHECK THAT "LD SB" IS NOT SET.
3548
3549 003443 1 064251 3 2 0 12 11 MOVB CLKPLS ;CLEAR CLOCK PHASES
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 27-2
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3550 003444 1 002000 0 1 0 000 LDSB1: LDBR 0 ;CLEAR "DX HIGH SPEED"
3551 003445 1 064031 3 2 0 01 11 MOVB REG1
3552 003446 1 002320 0 1 0 320 LDBR ZEROS ;SET ROM ADDR TO POINT TO LOC WITH
3553 003447 1 064211 3 2 0 10 11 MOVB DFRMAD ;"ROM 01"=0
3554 003450 1 064311 3 2 0 14 11 MOVB SETRUN ;CLEAR "CLR RUN"
3555 003451 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15
3556 003452 1 014000 0 6 0 000 SHR ;MOVE "LD SB" BIT TO BIT 4
3557 003453 1 107455 4 3 1455 JMPB4 .+2 ;JUMP IF SET
3558 003454 1 101456 4 0 1456 JMP .+2 ;JUMP IF CLEAR
3559 ERROR LDSB1,<"LD SB" SET WITH "ROM 01" AND
3560 003455 1 117721 4 7 1721 "CLR RUN" AND CLOCK PHASES CLEARED>
3561
3562 ERLOOP LDSB1 ^SALL
3563 003456 1 002006 0 1 0 006
3564 003457 1 117713 4 7 1713
3565 003460 1 115444 4 6 1444
3566 ;*SET "ROM 01" AND "CLR RUN".
3567 ;*CHECK THAT "LD SB" IS NOT SET.
3568
3569 003461 1 002323 0 1 0 323 LDSB2: LDBR CC2 ;SET ROM ADR TO POINT TO LOC WITH
3570 003462 1 064211 3 2 0 10 11 MOVB DFRMAD ;"ROM 01"=1
3571 003463 1 064271 3 2 0 13 11 MOVB HSDPIN ;SET "CLR RUN"
3572 003464 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15
3573 003465 1 014000 0 6 0 000 SHR ;MOVE "LD SB" BIT TO BIT 4
3574 003466 1 107470 4 3 1470 JMPB4 .+2 ;JUMP IF SET
3575 003467 1 101471 4 0 1471 JMP .+2 ;JUMP IF CLEAR
3576 ERROR LDSB1,<"LD SB" SET WITH "ROM 01" AND
3577 003470 1 117721 4 7 1721 "CLR RUN" SET AND CLOCK PHASES CLEARED>
3578
3579 ERLOOP LDSB1 ^SALL
3580 003471 1 002007 0 1 0 007
3581 003472 1 117713 4 7 1713
3582 003473 1 115444 4 6 1444
3583 003474 1 117723 4 7 1723 REPEAT TST
3584 003475 1 115353 4 6 1353
3585
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 28
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3586 TEST 224,TEST GENERATION OF "CLR AR"
3587 ;***********************************************************************
3588 ;* MCODE4 * TEST 224 * TEST GENERATION OF "CLR AR"
3589 ;***********************************************************************
3590 SALL
3591 003476 1 002340 0 1 0 340
3592 003477 1 117710 4 7 1710
3593
3594 003500 TST224: SALL
3595
3596 ;*CLEAR CLOCK PHASES.
3597 ;*SET "ROM 03".
3598 ;*SET "DX HIGH SPEED" AND ENABLE SINGLE STEPPING.
3599 ;*SET "RUN" AND GENERATE A SINGLE STEP PULSE.
3600 ;*CHECK THAT "CLR AR" IS NOT SET.
3601
3602 003500 1 002002 0 1 0 002 LDBR BCLKEN ;CLEAR "DX HIGH SPEED" AND ENABLE BASE CLOCK
3603 003501 1 064031 3 2 0 01 11 MOVB REG1
3604 003502 1 002001 0 1 0 001 LDBR RMADR8 ;SET ROM ADDR BIT 8
3605 003503 1 064051 3 2 0 02 11 MOVB REG2
3606 003504 1 002326 0 1 0 326 LDBR CC8 ;SET ROM ADDR TO POINT TO LOC WITH
3607 003505 1 064211 3 2 0 10 11 MOVB DFRMAD ;"ROM 03" = 1
3608 003506 1 117635 4 7 1635 JMPSUB ENSS ;SET "DX HIGH SPEED" AND ENABLE SINGLE STEP
3609 003507 1 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN"
3610 003510 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3611 003511 1 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
3612 003512 1 002373 0 1 0 373 LDBR 373 ;SET MASK OF ALL BUT "NOT CLR AR" BIT
3613 003513 1 060014 3 0 0 00 14 LORB AC0 ;IF BIT IS SET, RESULT IS ALL ONES
3614 003514 1 115516 4 6 1516 JMPZ .+2 ;JUMP IF SET (CLR AR = 0)
3615 ERROR TST,"CLR AR" SET BEFORE IT SHOULD HAVE,^_
3616 <DIAG CLEARED CLOCK PHASES AND SET "ROM 03" THEN
3617 003515 1 117721 4 7 1721 GENERATED A SINGLE STEP PULSE>
3618
3619 ERLOOP TST ^SALL
3620 003516 1 002000 0 1 0 000
3621 003517 1 117713 4 7 1713
3622 003520 1 115500 4 6 1500
3623 ;*GENERATE A SINGLE STEP PULSE.
3624 ;*CHECK THAT "CLR AR" IS SET.
3625
3626 003521 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3627 003522 1 002373 0 1 0 373 LDBR 373 ;SET MASK OF ALL BUT "NOT CLR AR" BIT
3628 003523 1 072011 3 5 0 00 11 MOVB AC0 ;MOVE MASK TO AC0
3629 003524 1 022015 1 1 0 00 15 DATI REG15,BR ;READ REG 15
3630 003525 1 060012 3 0 0 00 12 LORCB AC0 ;IF BIT IS CLEARED, RESULT IS ALL ONES
3631 003526 1 115530 4 6 1530 JMPZ .+2 ;JUMP IF CLEARED (CLR AR = 1)
3632 ERROR TST,"CLR AR" DID NOT SET,^_
3633 <DIAG CLEARED CLOCK PHASES AND SET "ROM 03" THEN
3634 003527 1 117721 4 7 1721 GENERATED 2 SINGLE STEP PULSES>
3635
3636 ERLOOP TST ^SALL
3637 003530 1 002001 0 1 0 001
3638 003531 1 117713 4 7 1713
3639 003532 1 115500 4 6 1500
3640 ;*GENERATE A SINGLE STEP PULSE.
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 28-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3641 ;*CHECK THAT "CLR AR" IS CLEARED.
3642
3643 003533 1 117617 4 7 1617 JMPSUB PULSE1 ;GENERATE A SINGLE STEP PULSE
3644 003534 1 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
3645 003535 1 002373 0 1 0 373 LDBR 373 ;SET MASK OF ALL BUT "NOT CLR AR" BIT
3646 003536 1 060014 3 0 0 00 14 LORB AC0 ;IF BIT IS SET, RESULT IS ALL ONES
3647 003537 1 115541 4 6 1541 JMPZ .+2 ;JUMP IF SET (CLR AR = 0)
3648 ERROR TST,"CLR AR" DID NOT CLEAR,^_
3649 <DIAG CLEARED CLOCK PHASES AND SET "ROM 03" THEN
3650 003540 1 117721 4 7 1721 GENERATED 3 SINGLE STEP PULSES>
3651
3652 ERLOOP TST ^SALL
3653 003541 1 002002 0 1 0 002
3654 003542 1 117713 4 7 1713
3655 003543 1 115500 4 6 1500
3656 ;*CLEAR CLOCK PHASES AND "ROM 03".
3657 ;*SET "RUN" AND GENERATE 2 SINGLE STEP PULSES.
3658 ;*CHECK THAT "CLR AR" IS NOT SET.
3659
3660 003544 1 002002 0 1 0 002 CLRAR1: LDBR BCLKEN ;ENABLE BASE CLOCK
3661 003545 1 064031 3 2 0 01 11 MOVB REG1
3662 003546 1 002320 0 1 0 320 LDBR ZEROS ;SET ROM ADDR TO POINT TO LOC WITH
3663 003547 1 064211 3 2 0 10 11 MOVB DFRMAD ;"ROM 03"=0
3664 003550 1 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED" AND ENABLE SINGLE STEP
3665 003551 1 064031 3 2 0 01 11 MOVB REG1
3666 003552 1 064311 3 2 0 14 11 MOVB SETRUN ;SET "RUN
3667 003553 1 117616 4 7 1616 JMPSUB PULSE2 ;GENERATE 2 SINGLE STEP PULSES
3668 003554 1 032015 1 5 0 00 15 DATI REG15,AC0 ;READ REG 15
3669 003555 1 002373 0 1 0 373 LDBR 373 ;SET MASK OF ALL BUT "NOT CLR AR" BIT
3670 003556 1 060014 3 0 0 00 14 LORB AC0 ;IF BIT IS SET, RESULT IS ALL ONES
3671 003557 1 115561 4 6 1561 JMPZ .+2 ;JUMP IF SET (CLR AR = 0)
3672 ERROR CLRAR1,"CLR AR" SET WHEN IT SHOULDN'T HAVE,^_
3673 <DIAG CLEARED CLOCK PHASES AND "ROM 03" THEN
3674 003560 1 117721 4 7 1721 GENERATED 2 SINGLE STEP PULSES>
3675
3676 ERLOOP CLRAR1 ^SALL
3677 003561 1 002003 0 1 0 003
3678 003562 1 117713 4 7 1713
3679 003563 1 115544 4 6 1544
3680 003564 1 117723 4 7 1723 REPEAT TST
3681 003565 1 115500 4 6 1500
3682
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 29
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3683 003566 1 101706 4 0 1706 JMP END ;JUMP AROUND SUBROUTINES
3684
3685 ;DO A MICROBUS INIT AND CLEAR THE MAR AND ITS EXT BITS.
3686 003567 1 002222 0 1 0 222 INITL: LDBR INIT+22 ;SET INIT
3687 003570 1 066371 3 3 0 17 11 MOVB IOSEL
3688 003571 1 002022 0 1 0 022 LDBR 22 ;CLR INIT & SELECT DP
3689 003572 1 066371 3 3 0 17 11 MOVB IOSEL
3690 003573 1 001000 0 0 2 000 LDMAR 0 ;PUT MEMORY ADDRESS TO 0
3691 003574 1 010000 0 4 0 000 LDMEM 0 ;CLR MEMORY LOC. 0
3692 003575 1 016000 0 7 0 000 RETURN
3693
3694 ;CLEAR THE "DATA TO DEVICE" BIT.
3695 003576 1 002011 0 1 0 011 DEVRD: LDBR 11 ;SELECT MASSBUS INTERFACE
3696 003577 1 066371 3 3 0 17 11 MOVB IOSEL
3697 003600 1 002000 0 1 0 000 LDBR 0 ;SETUP FOR A DEVICE READ
3698 003601 1 064031 3 2 0 01 11 MOVB MPSCR1
3699 003602 1 002022 0 1 0 022 LDBR 22 ;SELECT DATA PATH
3700 003603 1 066371 3 3 0 17 11 MOVB IOSEL
3701 003604 1 016000 0 7 0 000 RETURN
3702
3703 ;SET THE "DATA TO DEVICE" BIT.
3704 003605 1 002011 0 1 0 011 DEVWR: LDBR 11 ;SELECT MASSBUS INTERFACE
3705 003606 1 066371 3 3 0 17 11 MOVB IOSEL
3706 003607 1 002010 0 1 0 010 LDBR DTD ;SETUP FOR A DEVICE WRITE
3707 003610 1 064031 3 2 0 01 11 MOVB MPSCR1
3708 003611 1 002022 0 1 0 022 LDBR 22 ;SELECT DATA PATH
3709 003612 1 066371 3 3 0 17 11 MOVB IOSEL
3710 003613 1 016000 0 7 0 000 RETURN
3711
3712 ;GENERATE FROM 2-4 SINGLE STEPS PULSES.
3713 003614 1 064251 3 2 0 12 11 PULSE4: MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
3714 003615 1 064251 3 2 0 12 11 PULSE3: MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
3715 003616 1 064251 3 2 0 12 11 PULSE2: MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
3716 003617 1 064251 3 2 0 12 11 PULSE1: MOVB CLKPLS ;GENERATE A SINGLE STEP PULSE
3717 003620 1 016000 0 7 0 000 RETURN
3718
3719 ;STORE THE ADDITIONAL PNT ROUTINE NUMBER IN THE RH OF GP REG 3.
3720 ;IT IS ASSUMED TO BE IN THE CURRENT MEMORY LOCATION.
3721 003621 1 002011 0 1 0 011 SETPNT: LDBR 11 ;SELECT MASSBUS INTERFACE
3722 003622 1 066371 3 3 0 17 11 MOVB IOSEL
3723 003623 1 044351 2 2 0 16 11 MOVMEM MPGP6 ;STORE ADDITIONAL PNT ROUTINE NUMBER
3724 003624 1 002022 0 1 0 022 LDBR 22 ;SELECT DATA PATH
3725 003625 1 066371 3 3 0 17 11 MOVB IOSEL
3726 003626 1 016000 0 7 0 000 RETURN
3727
3728 ;STORE ERROR PRINTOUT DATA IN RH OF GP REG 2.
3729 ;IT IS ASSUMED TO BE IN THE CURRENT MEMORY LOCATION.
3730 003627 1 002011 0 1 0 011 SETDAT: LDBR 11 ;SELECT MASSBUS INTERFACE
3731 003630 1 066371 3 3 0 17 11 MOVB IOSEL
3732 003631 1 044311 2 2 0 14 11 MOVMEM MPGP4 ;STORE DATA
3733 003632 1 002022 0 1 0 022 LDBR 22 ;SELECT DATA PATH
3734 003633 1 066371 3 3 0 17 11 MOVB IOSEL
3735 003634 1 016000 0 7 0 000 RETURN
3736
3737 ;ENABLE SINGLE STEPPING AND SET "DX HIGH SPEED".
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 29-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3738 003635 1 002000 0 1 0 000 ENSS: LDBR 0 ;ENABLE SINGLE STEP
3739 003636 1 064031 3 2 0 01 11 MOVB REG1
3740 003637 1 002001 0 1 0 001 LDBR DXHISP ;SET "DX HIGH SPEED"
3741 003640 1 064031 3 2 0 01 11 MOVB REG1
3742 003641 1 016000 0 7 0 000 RETURN
3743
3744 ;STORE 20-BIT CORRECT AND ACTUAL DATA FOR ERROR PRINTOUTS.
3745 ;CORRECT IS ASSUMED TO BE IN MEMORY POINTED TO BY AC2 (MAR VALUE) AND
3746 ;AC3 (MARX VALUE). ACTUAL IS ASSUMED TO BE IN AC0 (7-0), AC5 (15-8), AND
3747 ;AC4 (19-16).
3748 003642 1 002011 0 1 0 011 STRDAT: LDBR 11 ;SELECT MASSBUS INTERFACE
3749 003643 1 066371 3 3 0 17 11 MOVB IOSEL
3750 003644 1 062010 3 1 0 00 10 MOV AC0,BR ;STORE DATA BITS 7-0 FOR PRINTOUT
3751 003645 1 066111 3 3 0 04 11 MOVB MPGP14
3752 003646 1 062130 3 1 0 05 10 MOV AC5,BR ;STORE DATA BITS 15-8 FOR PRINTOUT
3753 003647 1 066131 3 3 0 05 11 MOVB MPGP15
3754 003650 1 062110 3 1 0 04 10 MOV AC4,BR ;STORE DATA BITS 19-16 FOR PRINTOUT
3755 003651 1 066171 3 3 0 07 11 MOVB MPGP17
3756 003652 1 062030 3 1 0 01 10 MOV AC1,BR ;STORE ROM ADDR 7-0 FOR PRINTOUT
3757 003653 1 064311 3 2 0 14 11 MOVB MPGP4
3758 003654 1 061050 3 0 2 02 10 MOV AC2,MAR ;SET MAR TO POINT TO CORRECT DATA
3759 003655 1 060470 3 0 1 03 10 MOV AC3,MARX ;SET MAR EXT BITS
3760 003656 1 047451 2 3 3 02 11 MOVMEM MPGP12,I ;STORE IT FOR PRINTOUT
3761 003657 1 047471 2 3 3 03 11 MOVMEM MPGP13,I ;STORE IT FOR PRINTOUT
3762 003660 1 046151 2 3 0 06 11 MOVMEM MPGP16 ;STORE IT FOR PRINTOUT
3763 003661 1 002022 0 1 0 022 LDBR 22 ;SELECT DATA PATH
3764 003662 1 066371 3 3 0 17 11 MOVB IOSEL
3765 003663 1 016000 0 7 0 000 RETURN
3766
3767 ;SET "SLVE WOR END XFER" ON THE CB BOARD. "DATA TO DEVICE" IS ASSUMED
3768 ;TO BE CLEARED.
3769 003664 1 002033 0 1 0 033 SWEX: LDBR 33 ;SELECT CHANNEL BUS INTERFACE
3770 003665 1 066371 3 3 0 17 11 MOVB IOSEL
3771 003666 1 002004 0 1 0 004 LDBR LOOPEN ;SET LOOP ENABLE
3772 003667 1 064031 3 2 0 01 11 MOVB CSR1
3773 003670 1 002001 0 1 0 001 LDBR STAINL ;SET "STA IN"
3774 003671 1 064051 3 2 0 02 11 MOVB TOR0
3775 003672 1 002022 0 1 0 022 LDBR 22 ;SELECT DATA PATH
3776 003673 1 066371 3 3 0 17 11 MOVB IOSEL
3777 003674 1 016000 0 7 0 000 RETURN
3778
3779 ;CLEAR "SLVE WOR END XFER" ON THE CB BOARD.
3780 003675 1 002033 0 1 0 033 CLRSEX: LDBR 33 ;SELECT CHANNEL BUS INTERFACE
3781 003676 1 066371 3 3 0 17 11 MOVB IOSEL
3782 003677 1 002000 0 1 0 000 LDBR 0 ;CLEAR "STA IN"
3783 003700 1 064051 3 2 0 02 11 MOVB TOR0
3784 003701 1 002000 0 1 0 000 LDBR 0 ;CLEAR LOOP ENABLE
3785 003702 1 064031 3 2 0 01 11 MOVB CSR1
3786 003703 1 002022 0 1 0 022 LDBR 22 ;SELECT DATA PATH
3787 003704 1 066371 3 3 0 17 11 MOVB IOSEL
3788 003705 1 016000 0 7 0 000 RETURN
3789
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3790 003706 1 002176 0 1 0 176 END: .ECRAM
3791 003707 1 160211 7 0 0 10 11
3792 003710 1 072131 3 5 0 05 11
3793 003711 1 002044 0 1 0 044
3794 003712 1 160211 7 0 0 10 11
3795 003713 1 072131 3 5 0 05 11
3796 003714 1 002142 0 1 0 142
3797 003715 1 160211 7 0 0 10 11
3798 003716 1 072131 3 5 0 05 11
3799 003717 1 002146 0 1 0 146
3800 003720 1 160211 7 0 0 10 11
3801 003721 1 002104 0 1 0 104
3802 003722 1 160211 7 0 0 10 11
3803 003723 1 002173 0 1 0 173
3804 003724 1 160211 7 0 0 10 11
3805 003725 777777 777777 .MEM
3806 000000 000000 000000 0 ;FIRST MEM LOC IS FOR SCRATCH
3807 000001 000000 000000 UBPAR: 0
3808 000002 000000 000056 56
3809 000003 000000 000127 127
3810 000004 000000 000144 144
3811 000005 000000 000272 272
3812 000006 000000 000311 311
3813 000007 000000 000375 375
3814 000010 000000 000020 CLKPHF: 20
3815 000011 000000 000060 60
3816 000012 000000 000040 40
3817 000013 000000 000000 0
3818 000014 000000 000016 FLTZ1: 16
3819 000015 000000 000015 15
3820 000016 000000 000013 13
3821 000017 000000 000007 7
3822 000020 000000 000001 1
3823 000021 000000 000002 2
3824 000022 000000 000004 4
3825 000023 000000 000010 10
3826 000024 000000 000076 FLTZ2: 76
3827 000025 000000 000075 75
3828 000026 000000 000073 73
3829 000027 000000 000067 67
3830 000030 000000 000057 57
3831 000031 000000 000037 37
3832 000032 000000 000001 1
3833 000033 000000 000002 2
3834 000034 000000 000004 4
3835 000035 000000 000010 10
3836 000036 000000 000020 20
3837 000037 000000 000040 40
3838 000040 000000 000376 FLTZ: 376
3839 000041 000000 000375 375
3840 000042 000000 000373 373
3841 000043 000000 000367 367
3842 000044 000000 000357 357
3843 000045 000000 000337 337
3844 000046 000000 000277 277
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-1
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3845 000047 000000 000177 177
3846 000050 000000 000001 1
3847 000051 000000 000002 2
3848 000052 000000 000004 4
3849 000053 000000 000010 10
3850 000054 000000 000020 20
3851 000055 000000 000040 40
3852 000056 000000 000100 100
3853 000057 000000 000200 200
3854 000060 000000 000372 ROMDAT: 372 ;ROM ADDR 0
3855 000061 000000 000257 257
3856 000062 000000 000001 1
3857 000063 000000 000374 374 ;ROM ADDR 1
3858 000064 000000 000057 57
3859 000065 000000 000002 2
3860 000066 000000 000014 14 ;ROM ADDR 2
3861 000067 000000 000314 314
3862 000070 000000 000003 3
3863 000071 000000 000362 362 ;ROM ADDR 3
3864 000072 000000 000303 303
3865 000073 000000 000004 4
3866 000074 000000 000374 374 ;ROM ADDR 4
3867 000075 000000 000117 117
3868 000076 000000 000005 5
3869 000077 000000 000014 14 ;ROM ADDR 5
3870 000100 000000 000000 0
3871 000101 000000 000000 0
3872 000102 000000 000000 0 ;ROM ADDR 6
3873 000103 000000 000000 0
3874 000104 000000 000000 0
3875 000105 000000 000000 0 ;ROM ADDR 7
3876 000106 000000 000000 0
3877 000107 000000 000000 0
3878 000110 000000 000375 375 ;ROM ADDR 10
3879 000111 000000 000257 257
3880 000112 000000 000011 11
3881 000113 000000 000364 364 ;ROM ADDR 11
3882 000114 000000 000057 57
3883 000115 000000 000012 12
3884 000116 000000 000005 5 ;ROM ADDR 12
3885 000117 000000 000314 314
3886 000120 000000 000013 13
3887 000121 000000 000373 373 ;ROM ADDR 13
3888 000122 000000 000303 303
3889 000123 000000 000014 14
3890 000124 000000 000365 365 ;ROM ADDR 14
3891 000125 000000 000117 117
3892 000126 000000 000015 15
3893 000127 000000 000005 5 ;ROM ADDR 15
3894 000130 000000 000160 160
3895 000131 000000 000016 16
3896 000132 000000 000373 373 ;ROM ADDR 16
3897 000133 000000 000257 257
3898 000134 000000 000011 11
3899 000135 000000 000000 0 ;ROM ADDR 17
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-2
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3900 000136 000000 000000 0
3901 000137 000000 000000 0
3902 000140 000000 000374 374 ;ROM ADDR 20
3903 000141 000000 000117 117
3904 000142 000000 000001 1
3905 000143 000000 000365 365 ;ROM ADDR 21
3906 000144 000000 000303 303
3907 000145 000000 000002 2
3908 000146 000000 000013 13 ;ROM ADDR 22
3909 000147 000000 000314 314
3910 000150 000000 000003 3
3911 000151 000000 000365 365 ;ROM ADDR 23
3912 000152 000000 000057 57
3913 000153 000000 000004 4
3914 000154 000000 000365 365 ;ROM ADDR 24
3915 000155 000000 000257 257
3916 000156 000000 000005 5
3917 000157 000000 000013 13 ;ROM ADDR 25
3918 000160 000000 000000 0
3919 000161 000000 000000 0
3920 000162 000000 000000 0 ;ROM ADDR 26
3921 000163 000000 000000 0
3922 000164 000000 000000 0
3923 000165 000000 000013 13 ;ROM ADDR 27
3924 000166 000000 000000 0
3925 000167 000000 000004 4
3926 000170 000000 000372 372 ;ROM ADDR 30
3927 000171 000000 000257 257
3928 000172 000000 000011 11
3929 000173 000000 000374 374 ;ROM ADDR 31
3930 000174 000000 000057 57
3931 000175 000000 000012 12
3932 000176 000000 000014 14 ;ROM ADDR 32
3933 000177 000000 000314 314
3934 000200 000000 000013 13
3935 000201 000000 000362 362 ;ROM ADDR 33
3936 000202 000000 000303 303
3937 000203 000000 000014 14
3938 000204 000000 000374 374 ;ROM ADDR 34
3939 000205 000000 000117 117
3940 000206 000000 000015 15
3941 000207 000000 000374 374 ;ROM ADDR 35
3942 000210 000000 000000 0
3943 000211 000000 000016 16
3944 000212 000000 000014 14 ;ROM ADDR 36
3945 000213 000000 000000 0
3946 000214 000000 000010 10
3947 000215 000000 000000 0 ;ROM ADDR 37
3948 000216 000000 000000 0
3949 000217 000000 000000 0
3950 000220 000000 000374 374 ;ROM ADDR 40
3951 000221 000000 000257 257
3952 000222 000000 000001 1
3953 000223 000000 000365 365 ;ROM ADDR 41
3954 000224 000000 000057 57
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-3
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
3955 000225 000000 000002 2
3956 000226 000000 000005 5 ;ROM ADDR 42
3957 000227 000000 000314 314
3958 000230 000000 000003 3
3959 000231 000000 000373 373 ;ROM ADDR 43
3960 000232 000000 000303 303
3961 000233 000000 000004 4
3962 000234 000000 000365 365 ;ROM ADDR 44
3963 000235 000000 000117 117
3964 000236 000000 000005 5
3965 000237 000000 000365 365 ;ROM ADDR 45
3966 000240 000000 000000 0
3967 000241 000000 000006 6
3968 000242 000000 000013 13 ;ROM ADDR 46
3969 000243 000000 000000 0
3970 000244 000000 000000 0
3971 000245 000000 000000 0 ;ROM ADDR 47
3972 000246 000000 000000 0
3973 000247 000000 000000 0
3974 000250 000000 000374 374 ;ROM ADDR 50
3975 000251 000000 000000 0
3976 000252 000000 000011 11
3977 000253 000000 000365 365 ;ROM ADDR 51
3978 000254 000000 000117 117
3979 000255 000000 000012 12
3980 000256 000000 000365 365 ;ROM ADDR 52
3981 000257 000000 000303 303
3982 000260 000000 000013 13
3983 000261 000000 000013 13 ;ROM ADDR 53
3984 000262 000000 000314 314
3985 000263 000000 000014 14
3986 000264 000000 000365 365 ;ROM ADDR 54
3987 000265 000000 000057 57
3988 000266 000000 000015 15
3989 000267 000000 000365 365 ;ROM ADDR 55
3990 000270 000000 000257 257
3991 000271 000000 000016 16
3992 000272 000000 000013 13 ;ROM ADDR 56
3993 000273 000000 000000 0
3994 000274 000000 000010 10
3995 000275 000000 000013 13 ;ROM ADDR 57
3996 000276 000000 000000 0
3997 000277 000000 000015 15
3998 000300 000000 000372 372 ;ROM ADDR 60
3999 000301 000000 000257 257
4000 000302 000000 000001 1
4001 000303 000000 000374 374 ;ROM ADDR 61
4002 000304 000000 000057 57
4003 000305 000000 000002 2
4004 000306 000000 000014 14 ;ROM ADDR 62
4005 000307 000000 000314 314
4006 000310 000000 000003 3
4007 000311 000000 000362 362 ;ROM ADDR 63
4008 000312 000000 000303 303
4009 000313 000000 000004 4
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-4
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4010 000314 000000 000374 374 ;ROM ADDR 64
4011 000315 000000 000117 117
4012 000316 000000 000005 5
4013 000317 000000 000014 14 ;ROM ADDR 65
4014 000320 000000 000357 357
4015 000321 000000 000006 6
4016 000322 000000 000362 362 ;ROM ADDR 66
4017 000323 000000 000340 340
4018 000324 000000 000007 7
4019 000325 000000 000374 374 ;ROM ADDR 67
4020 000326 000000 000157 157
4021 000327 000000 000010 10
4022 000330 000000 000314 314 ;ROM ADDR 70
4023 000331 000000 000337 337
4024 000332 000000 000011 11
4025 000333 000000 000062 62 ;ROM ADDR 71
4026 000334 000000 000320 320
4027 000335 000000 000012 12
4028 000336 000000 000374 374 ;ROM ADDR 72
4029 000337 000000 000217 217
4030 000340 000000 000013 13
4031 000341 000000 000374 374 ;ROM ADDR 73
4032 000342 000000 000017 17
4033 000343 000000 000014 14
4034 000344 000000 000014 14 ;ROM ADDR 74
4035 000345 000000 000000 0
4036 000346 000000 000000 0
4037 000347 000000 000000 0 ;ROM ADDR 75
4038 000350 000000 000000 0
4039 000351 000000 000000 0
4040 000352 000000 000000 0 ;ROM ADDR 76
4041 000353 000000 000000 0
4042 000354 000000 000000 0
4043 000355 000000 000000 0 ;ROM ADDR 77
4044 000356 000000 000000 0
4045 000357 000000 000000 0
4046 000360 000000 000374 374 ;ROM ADDR 100
4047 000361 000000 000257 257
4048 000362 000000 000001 1
4049 000363 000000 000365 365 ;ROM ADDR 101
4050 000364 000000 000057 57
4051 000365 000000 000002 2
4052 000366 000000 000005 5 ;ROM ADDR 102
4053 000367 000000 000314 314
4054 000370 000000 000003 3
4055 000371 000000 000373 373 ;ROM ADDR 103
4056 000372 000000 000303 303
4057 000373 000000 000004 4
4058 000374 000000 000365 365 ;ROM ADDR 104
4059 000375 000000 000117 117
4060 000376 000000 000005 5
4061 000377 000000 000005 5 ;ROM ADDR 105
4062 000400 000000 000357 357
4063 000401 000000 000006 6
4064 000402 000000 000373 373 ;ROM ADDR 106
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-5
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4065 000403 000000 000340 340
4066 000404 000000 000007 7
4067 000405 000000 000365 365 ;ROM ADDR 107
4068 000406 000000 000157 157
4069 000407 000000 000010 10
4070 000410 000000 000305 305 ;ROM ADDR 110
4071 000411 000000 000337 337
4072 000412 000000 000011 11
4073 000413 000000 000073 73 ;ROM ADDR 111
4074 000414 000000 000320 320
4075 000415 000000 000012 12
4076 000416 000000 000365 365 ;ROM ADDR 112
4077 000417 000000 000217 217
4078 000420 000000 000013 13
4079 000421 000000 000365 365 ;ROM ADDR 113
4080 000422 000000 000017 17
4081 000423 000000 000014 14
4082 000424 000000 000013 13 ;ROM ADDR 114
4083 000425 000000 000000 0
4084 000426 000000 000000 0
4085 000427 000000 000000 0 ;ROM ADDR 115
4086 000430 000000 000000 0
4087 000431 000000 000000 0
4088 000432 000000 000000 0 ;ROM ADDR 116
4089 000433 000000 000000 0
4090 000434 000000 000000 0
4091 000435 000000 000000 0 ;ROM ADDR 117
4092 000436 000000 000000 0
4093 000437 000000 000000 0
4094 000440 000000 000374 374 ;ROM ADDR 120
4095 000441 000000 000017 17
4096 000442 000000 000001 1
4097 000443 000000 000365 365 ;ROM ADDR 121
4098 000444 000000 000217 217
4099 000445 000000 000002 2
4100 000446 000000 000065 65 ;ROM ADDR 122
4101 000447 000000 000320 320
4102 000450 000000 000003 3
4103 000451 000000 000313 313 ;ROM ADDR 123
4104 000452 000000 000337 337
4105 000453 000000 000004 4
4106 000454 000000 000365 365 ;ROM ADDR 124
4107 000455 000000 000157 157
4108 000456 000000 000005 5
4109 000457 000000 000365 365 ;ROM ADDR 125
4110 000460 000000 000340 340
4111 000461 000000 000006 6
4112 000462 000000 000013 13 ;ROM ADDR 126
4113 000463 000000 000357 357
4114 000464 000000 000007 7
4115 000465 000000 000365 365 ;ROM ADDR 127
4116 000466 000000 000117 117
4117 000467 000000 000010 10
4118 000470 000000 000365 365 ;ROM ADDR 130
4119 000471 000000 000303 303
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-6
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4120 000472 000000 000011 11
4121 000473 000000 000013 13 ;ROM ADDR 131
4122 000474 000000 000314 314
4123 000475 000000 000012 12
4124 000476 000000 000365 365 ;ROM ADDR 132
4125 000477 000000 000057 57
4126 000500 000000 000013 13
4127 000501 000000 000365 365 ;ROM ADDR 133
4128 000502 000000 000257 257
4129 000503 000000 000014 14
4130 000504 000000 000013 13 ;ROM ADDR 134
4131 000505 000000 000000 0
4132 000506 000000 000000 0
4133 000507 000000 000000 0 ;ROM ADDR 135
4134 000510 000000 000000 0
4135 000511 000000 000000 0
4136 000512 000000 000013 13 ;ROM ADDR 136
4137 000513 000000 000000 0
4138 000514 000000 000005 5
4139 000515 000000 000013 13 ;ROM ADDR 137
4140 000516 000000 000000 0
4141 000517 000000 000013 13
4142 000520 000000 000372 372 ;ROM ADDR 140
4143 000521 000000 000303 303
4144 000522 000000 000001 1
4145 000523 000000 000374 374 ;ROM ADDR 141
4146 000524 000000 000143 143
4147 000525 000000 000002 2
4148 000526 000000 000374 374 ;ROM ADDR 142
4149 000527 000000 000003 3
4150 000530 000000 000003 3
4151 000531 000000 000014 14 ;ROM ADDR 143
4152 000532 000000 000000 0
4153 000533 000000 000004 4
4154 000534 000000 000372 372 ;ROM ADDR 144
4155 000535 000000 000303 303
4156 000536 000000 000005 5
4157 000537 000000 000374 374 ;ROM ADDR 145
4158 000540 000000 000143 143
4159 000541 000000 000006 6
4160 000542 000000 000374 374 ;ROM ADDR 146
4161 000543 000000 000003 3
4162 000544 000000 000007 7
4163 000545 000000 000014 14 ;ROM ADDR 147
4164 000546 000000 000000 0
4165 000547 000000 000000 0
4166 000550 000000 000374 374 ;ROM ADDR 150
4167 000551 000000 000303 303
4168 000552 000000 000011 11
4169 000553 000000 000365 365 ;ROM ADDR 151
4170 000554 000000 000143 143
4171 000555 000000 000012 12
4172 000556 000000 000365 365 ;ROM ADDR 152
4173 000557 000000 000003 3
4174 000560 000000 000013 13
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-7
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4175 000561 000000 000013 13 ;ROM ADDR 153
4176 000562 000000 000000 0
4177 000563 000000 000014 14
4178 000564 000000 000375 375 ;ROM ADDR 154
4179 000565 000000 000303 303
4180 000566 000000 000015 15
4181 000567 000000 000365 365 ;ROM ADDR 155
4182 000570 000000 000143 143
4183 000571 000000 000016 16
4184 000572 000000 000365 365 ;ROM ADDR 156
4185 000573 000000 000003 3
4186 000574 000000 000017 17
4187 000575 000000 000013 13 ;ROM ADDR 157
4188 000576 000000 000000 0
4189 000577 000000 000010 10
4190 000600 000000 000374 374 ;ROM ADDR 160
4191 000601 000000 000003 3
4192 000602 000000 000001 1
4193 000603 000000 000365 365 ;ROM ADDR 161
4194 000604 000000 000143 143
4195 000605 000000 000002 2
4196 000606 000000 000365 365 ;ROM ADDR 162
4197 000607 000000 000303 303
4198 000610 000000 000003 3
4199 000611 000000 000013 13 ;ROM ADDR 163
4200 000612 000000 000000 0
4201 000613 000000 000004 4
4202 000614 000000 000375 375 ;ROM ADDR 164
4203 000615 000000 000003 3
4204 000616 000000 000005 5
4205 000617 000000 000365 365 ;ROM ADDR 165
4206 000620 000000 000143 143
4207 000621 000000 000006 6
4208 000622 000000 000365 365 ;ROM ADDR 166
4209 000623 000000 000303 303
4210 000624 000000 000007 7
4211 000625 000000 000013 13 ;ROM ADDR 167
4212 000626 000000 000000 0
4213 000627 000000 000000 0
4214 000630 000000 000000 0 ;ROM ADDR 170
4215 000631 000000 000000 0
4216 000632 000000 000000 0
4217 000633 000000 000000 0 ;ROM ADDR 171
4218 000634 000000 000000 0
4219 000635 000000 000000 0
4220 000636 000000 000000 0 ;ROM ADDR 172
4221 000637 000000 000000 0
4222 000640 000000 000000 0
4223 000641 000000 000000 0 ;ROM ADDR 173
4224 000642 000000 000000 0
4225 000643 000000 000000 0
4226 000644 000000 000000 0 ;ROM ADDR 174
4227 000645 000000 000000 0
4228 000646 000000 000000 0
4229 000647 000000 000000 0 ;ROM ADDR 175
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-8
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4230 000650 000000 000000 0
4231 000651 000000 000000 0
4232 000652 000000 000013 13 ;ROM ADDR 176
4233 000653 000000 000000 0
4234 000654 000000 000005 5
4235 000655 000000 000013 13 ;ROM ADDR 177
4236 000656 000000 000000 0
4237 000657 000000 000006 6
4238 000660 000000 000372 372 ;ROM ADDR 200
4239 000661 000000 000267 267
4240 000662 000000 000001 1
4241 000663 000000 000374 374 ;ROM ADDR 201
4242 000664 000000 000107 107
4243 000665 000000 000002 2
4244 000666 000000 000214 214 ;ROM ADDR 202
4245 000667 000000 000367 367
4246 000670 000000 000003 3
4247 000671 000000 000162 162 ;ROM ADDR 203
4248 000672 000000 000360 360
4249 000673 000000 000004 4
4250 000674 000000 000374 374 ;ROM ADDR 204
4251 000675 000000 000207 207
4252 000676 000000 000005 5
4253 000677 000000 000374 374 ;ROM ADDR 205
4254 000700 000000 000037 37
4255 000701 000000 000006 6
4256 000702 000000 000014 14 ;ROM ADDR 206
4257 000703 000000 000000 0
4258 000704 000000 000000 0
4259 000705 000000 000000 0 ;ROM ADDR 207
4260 000706 000000 000000 0
4261 000707 000000 000000 0
4262 000710 000000 000374 374 ;ROM ADDR 210
4263 000711 000000 000267 267
4264 000712 000000 000011 11
4265 000713 000000 000365 365 ;ROM ADDR 211
4266 000714 000000 000107 107
4267 000715 000000 000012 12
4268 000716 000000 000205 205 ;ROM ADDR 212
4269 000717 000000 000367 367
4270 000720 000000 000013 13
4271 000721 000000 000173 173 ;ROM ADDR 213
4272 000722 000000 000360 360
4273 000723 000000 000014 14
4274 000724 000000 000365 365 ;ROM ADDR 214
4275 000725 000000 000207 207
4276 000726 000000 000015 15
4277 000727 000000 000365 365 ;ROM ADDR 215
4278 000730 000000 000037 37
4279 000731 000000 000016 16
4280 000732 000000 000013 13 ;ROM ADDR 216
4281 000733 000000 000000 0
4282 000734 000000 000010 10
4283 000735 000000 000000 0 ;ROM ADDR 217
4284 000736 000000 000000 0
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-9
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4285 000737 000000 000000 0
4286 000740 000000 000374 374 ;ROM ADDR 220
4287 000741 000000 000037 37
4288 000742 000000 000001 1
4289 000743 000000 000365 365 ;ROM ADDR 221
4290 000744 000000 000207 207
4291 000745 000000 000002 2
4292 000746 000000 000165 165 ;ROM ADDR 222
4293 000747 000000 000360 360
4294 000750 000000 000003 3
4295 000751 000000 000213 213 ;ROM ADDR 223
4296 000752 000000 000367 367
4297 000753 000000 000004 4
4298 000754 000000 000365 365 ;ROM ADDR 224
4299 000755 000000 000107 107
4300 000756 000000 000005 5
4301 000757 000000 000365 365 ;ROM ADDR 225
4302 000760 000000 000267 267
4303 000761 000000 000006 6
4304 000762 000000 000013 13 ;ROM ADDR 226
4305 000763 000000 000000 0
4306 000764 000000 000000 0
4307 000765 000000 000013 13 ;ROM ADDR 227
4308 000766 000000 000000 0
4309 000767 000000 000005 5
4310 000770 000000 000372 372 ;ROM ADDR 230
4311 000771 000000 000267 267
4312 000772 000000 000011 11
4313 000773 000000 000374 374 ;ROM ADDR 231
4314 000774 000000 000107 107
4315 000775 000000 000012 12
4316 000776 000000 000214 214 ;ROM ADDR 232
4317 000777 000000 000367 367
4318 001000 000000 000013 13
4319 001001 000000 000162 162 ;ROM ADDR 233
4320 001002 000000 000360 360
4321 001003 000000 000014 14
4322 001004 000000 000374 374 ;ROM ADDR 234
4323 001005 000000 000207 207
4324 001006 000000 000015 15
4325 001007 000000 000374 374 ;ROM ADDR 235
4326 001010 000000 000027 27
4327 001011 000000 000016 16
4328 001012 000000 000014 14 ;ROM ADDR 236
4329 001013 000000 000000 0
4330 001014 000000 000010 10
4331 001015 000000 000000 0 ;ROM ADDR 237
4332 001016 000000 000000 0
4333 001017 000000 000000 0
4334 001020 000000 000374 374 ;ROM ADDR 240
4335 001021 000000 000267 267
4336 001022 000000 000001 1
4337 001023 000000 000365 365 ;ROM ADDR 241
4338 001024 000000 000107 107
4339 001025 000000 000002 2
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-10
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4340 001026 000000 000205 205 ;ROM ADDR 242
4341 001027 000000 000367 367
4342 001030 000000 000003 3
4343 001031 000000 000173 173 ;ROM ADDR 243
4344 001032 000000 000360 360
4345 001033 000000 000004 4
4346 001034 000000 000365 365 ;ROM ADDR 244
4347 001035 000000 000207 207
4348 001036 000000 000005 5
4349 001037 000000 000365 365 ;ROM ADDR 245
4350 001040 000000 000027 27
4351 001041 000000 000006 6
4352 001042 000000 000013 13 ;ROM ADDR 246
4353 001043 000000 000000 0
4354 001044 000000 000000 0
4355 001045 000000 000000 0 ;ROM ADDR 247
4356 001046 000000 000000 0
4357 001047 000000 000000 0
4358 001050 000000 000374 374 ;ROM ADDR 250
4359 001051 000000 000027 27
4360 001052 000000 000011 11
4361 001053 000000 000365 365 ;ROM ADDR 251
4362 001054 000000 000207 207
4363 001055 000000 000012 12
4364 001056 000000 000165 165 ;ROM ADDR 252
4365 001057 000000 000360 360
4366 001060 000000 000013 13
4367 001061 000000 000213 213 ;ROM ADDR 253
4368 001062 000000 000367 367
4369 001063 000000 000014 14
4370 001064 000000 000365 365 ;ROM ADDR 254
4371 001065 000000 000107 107
4372 001066 000000 000015 15
4373 001067 000000 000365 365 ;ROM ADDR 255
4374 001070 000000 000267 267
4375 001071 000000 000016 16
4376 001072 000000 000013 13 ;ROM ADDR 256
4377 001073 000000 000000 0
4378 001074 000000 000010 10
4379 001075 000000 000013 13 ;ROM ADDR 257
4380 001076 000000 000000 0
4381 001077 000000 000015 15
4382 001100 000000 000372 372 ;ROM ADDR 260
4383 001101 000000 000217 217
4384 001102 000000 000001 1
4385 001103 000000 000374 374 ;ROM ADDR 261
4386 001104 000000 000017 17
4387 001105 000000 000002 2
4388 001106 000000 000014 14 ;ROM ADDR 262
4389 001107 000000 000000 0
4390 001110 000000 000000 0
4391 001111 000000 000000 0 ;ROM ADDR 263
4392 001112 000000 000000 0
4393 001113 000000 000000 0
4394 001114 000000 000374 374 ;ROM ADDR 264
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-11
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4395 001115 000000 000217 217
4396 001116 000000 000005 5
4397 001117 000000 000365 365 ;ROM ADDR 265
4398 001120 000000 000017 17
4399 001121 000000 000006 6
4400 001122 000000 000013 13 ;ROM ADDR 266
4401 001123 000000 000000 0
4402 001124 000000 000004 4
4403 001125 000000 000000 0 ;ROM ADDR 267
4404 001126 000000 000000 0
4405 001127 000000 000000 0
4406 001130 000000 000374 374 ;ROM ADDR 270
4407 001131 000000 000017 17
4408 001132 000000 000011 11
4409 001133 000000 000365 365 ;ROM ADDR 271
4410 001134 000000 000217 217
4411 001135 000000 000012 12
4412 001136 000000 000013 13 ;ROM ADDR 272
4413 001137 000000 000000 0
4414 001140 000000 000010 10
4415 001141 000000 000000 0 ;ROM ADDR 273
4416 001142 000000 000000 0
4417 001143 000000 000000 0
4418 001144 000000 000372 372 ;ROM ADDR 274
4419 001145 000000 000017 17
4420 001146 000000 000015 15
4421 001147 000000 000374 374 ;ROM ADDR 275
4422 001150 000000 000217 217
4423 001151 000000 000016 16
4424 001152 000000 000014 14 ;ROM ADDR 276
4425 001153 000000 000000 0
4426 001154 000000 000014 14
4427 001155 000000 000000 0 ;ROM ADDR 277
4428 001156 000000 000000 0
4429 001157 000000 000000 0
4430 001160 000000 000374 374 ;ROM ADDR 300
4431 001161 000000 000017 17
4432 001162 000000 000001 1
4433 001163 000000 000365 365 ;ROM ADDR 301
4434 001164 000000 000217 217
4435 001165 000000 000002 2
4436 001166 000000 000013 13 ;ROM ADDR 302
4437 001167 000000 000000 0
4438 001170 000000 000000 0
4439 001171 000000 000000 0 ;ROM ADDR 303
4440 001172 000000 000000 0
4441 001173 000000 000000 0
4442 001174 000000 000374 374 ;ROM ADDR 304
4443 001175 000000 000217 217
4444 001176 000000 000005 5
4445 001177 000000 000365 365 ;ROM ADDR 305
4446 001200 000000 000017 17
4447 001201 000000 000006 6
4448 001202 000000 000013 13 ;ROM ADDR 306
4449 001203 000000 000000 0
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-12
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4450 001204 000000 000004 4
4451 001205 000000 000000 0 ;ROM ADDR 307
4452 001206 000000 000000 0
4453 001207 000000 000000 0
4454 001210 000000 000372 372 ;ROM ADDR 310
4455 001211 000000 000237 237
4456 001212 000000 000011 11
4457 001213 000000 000374 374 ;ROM ADDR 311
4458 001214 000000 000017 17
4459 001215 000000 000012 12
4460 001216 000000 000014 14 ;ROM ADDR 312
4461 001217 000000 000000 0
4462 001220 000000 000013 13
4463 001221 000000 000372 372 ;ROM ADDR 313
4464 001222 000000 000237 237
4465 001223 000000 000014 14
4466 001224 000000 000374 374 ;ROM ADDR 314
4467 001225 000000 000017 17
4468 001226 000000 000015 15
4469 001227 000000 000014 14 ;ROM ADDR 315
4470 001230 000000 000000 0
4471 001231 000000 000010 10
4472 001232 000000 000000 0 ;ROM ADDR 316
4473 001233 000000 000000 0
4474 001234 000000 000000 0
4475 001235 000000 000000 0 ;ROM ADDR 317
4476 001236 000000 000000 0
4477 001237 000000 000000 0
4478 001240 000000 000374 374 ;ROM ADDR 320
4479 001241 000000 000237 237
4480 001242 000000 000001 1
4481 001243 000000 000365 365 ;ROM ADDR 321
4482 001244 000000 000017 17
4483 001245 000000 000002 2
4484 001246 000000 000013 13 ;ROM ADDR 322
4485 001247 000000 000000 0
4486 001250 000000 000003 3
4487 001251 000000 000375 375 ;ROM ADDR 323
4488 001252 000000 000237 237
4489 001253 000000 000004 4
4490 001254 000000 000365 365 ;ROM ADDR 324
4491 001255 000000 000017 17
4492 001256 000000 000005 5
4493 001257 000000 000013 13 ;ROM ADDR 325
4494 001260 000000 000000 0
4495 001261 000000 000000 0
4496 001262 000000 000000 0 ;ROM ADDR 326
4497 001263 000000 000000 0
4498 001264 000000 000000 0
4499 001265 000000 000000 0 ;ROM ADDR 327
4500 001266 000000 000000 0
4501 001267 000000 000000 0
4502 001270 000000 000374 374 ;ROM ADDR 330
4503 001271 000000 000017 17
4504 001272 000000 000011 11
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-13
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4505 001273 000000 000365 365 ;ROM ADDR 331
4506 001274 000000 000237 237
4507 001275 000000 000012 12
4508 001276 000000 000013 13 ;ROM ADDR 332
4509 001277 000000 000000 0
4510 001300 000000 000013 13
4511 001301 000000 000375 375 ;ROM ADDR 333
4512 001302 000000 000017 17
4513 001303 000000 000014 14
4514 001304 000000 000365 365 ;ROM ADDR 334
4515 001305 000000 000237 237
4516 001306 000000 000015 15
4517 001307 000000 000013 13 ;ROM ADDR 335
4518 001310 000000 000000 0
4519 001311 000000 000010 10
4520 001312 000000 000000 0 ;ROM ADDR 336
4521 001313 000000 000000 0
4522 001314 000000 000000 0
4523 001315 000000 000013 13 ;ROM ADDR 337
4524 001316 000000 000000 0
4525 001317 000000 000014 14
4526 001320 000000 000000 0 ;ROM ADDR 340-707
4527 001321 000000 000000 0
4528 001322 000000 000000 0
4529 001323 000000 000374 374 ;ROM ADDR 710
4530 001324 000000 000017 17
4531 001325 000000 000011 11
4532 001326 000000 000365 365 ;ROM ADDR 711
4533 001327 000000 000217 217
4534 001330 000000 000012 12
4535 001331 000000 000065 65 ;ROM ADDR 712
4536 001332 000000 000320 320
4537 001333 000000 000013 13
4538 001334 000000 000013 13 ;ROM ADDR 713
4539 001335 000000 000000 0
4540 001336 000000 000010 10
4541 001337 000000 000062 62 ;ROM ADDR 714
4542 001340 000000 000320 320
4543 001341 000000 000015 15
4544 001342 000000 000374 374 ;ROM ADDR 715
4545 001343 000000 000217 217
4546 001344 000000 000016 16
4547 001345 000000 000374 374 ;ROM ADDR 716
4548 001346 000000 000017 17
4549 001347 000000 000017 17
4550 001350 000000 000014 14 ;ROM ADDR 717
4551 001351 000000 000000 0
4552 001352 000000 000014 14
4553 001353 000000 000000 0 ;ROM ADDR 720
4554 001354 000000 000000 0
4555 001355 000000 000000 0
4556 001356 000000 000377 377 ;ROM ADDR 721
4557 001357 000000 000377 377
4558 001360 000000 000017 17
4559 001361 000000 000000 0 ;ROM ADDR 722
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-14
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4560 001362 000000 000000 0
4561 001363 000000 000002 2
4562 001364 000000 000002 2 ;ROM ADDR 723
4563 001365 000000 000000 0
4564 001366 000000 000003 3
4565 001367 000000 000004 4 ;ROM ADDR 724
4566 001370 000000 000000 0
4567 001371 000000 000004 4
4568 001372 000000 000005 5 ;ROM ADDR 725
4569 001373 000000 000000 0
4570 001374 000000 000005 5
4571 001375 000000 000010 10 ;ROM ADDR 726
4572 001376 000000 000000 0
4573 001377 000000 000006 6
4574 001400 000000 000011 11 ;ROM ADDR 727
4575 001401 000000 000000 0
4576 001402 000000 000007 7
4577 001403 000000 000031 31 ;ROM ADDR 730
4578 001404 000000 000000 0
4579 001405 000000 000010 10
4580 001406 000000 000051 51 ;ROM ADDR 731
4581 001407 000000 000000 0
4582 001410 000000 000011 11
4583 001411 000000 000111 111 ;ROM ADDR 732
4584 001412 000000 000000 0
4585 001413 000000 000012 12
4586 001414 000000 000211 211 ;ROM ADDR 733
4587 001415 000000 000000 0
4588 001416 000000 000013 13
4589 001417 000000 000011 11 ;ROM ADDR 734
4590 001420 000000 000001 1
4591 001421 000000 000014 14
4592 001422 000000 000011 11 ;ROM ADDR 735
4593 001423 000000 000002 2
4594 001424 000000 000015 15
4595 001425 000000 000011 11 ;ROM ADDR 736
4596 001426 000000 000004 4
4597 001427 000000 000016 16
4598 001430 000000 000011 11 ;ROM ADDR 737
4599 001431 000000 000010 10
4600 001432 000000 000017 17
4601 001433 000000 000375 375 ;ROM ADDR 740
4602 001434 000000 000017 17
4603 001435 000000 000000 0
4604 001436 000000 000375 375 ;ROM ADDR 741
4605 001437 000000 000037 37
4606 001440 000000 000001 1
4607 001441 000000 000375 375 ;ROM ADDR 742
4608 001442 000000 000057 57
4609 001443 000000 000002 2
4610 001444 000000 000375 375 ;ROM ADDR 743
4611 001445 000000 000077 77
4612 001446 000000 000003 3
4613 001447 000000 000375 375 ;ROM ADDR 744
4614 001450 000000 000117 117
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-15
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4615 001451 000000 000004 4
4616 001452 000000 000375 375 ;ROM ADDR 745
4617 001453 000000 000137 137
4618 001454 000000 000005 5
4619 001455 000000 000375 375 ;ROM ADDR 746
4620 001456 000000 000157 157
4621 001457 000000 000006 6
4622 001460 000000 000375 375 ;ROM ADDR 747
4623 001461 000000 000177 177
4624 001462 000000 000007 7
4625 001463 000000 000375 375 ;ROM ADDR 750
4626 001464 000000 000217 217
4627 001465 000000 000010 10
4628 001466 000000 000375 375 ;ROM ADDR 751
4629 001467 000000 000237 237
4630 001470 000000 000011 11
4631 001471 000000 000375 375 ;ROM ADDR 752
4632 001472 000000 000257 257
4633 001473 000000 000012 12
4634 001474 000000 000375 375 ;ROM ADDR 753
4635 001475 000000 000277 277
4636 001476 000000 000013 13
4637 001477 000000 000375 375 ;ROM ADDR 754
4638 001500 000000 000317 317
4639 001501 000000 000014 14
4640 001502 000000 000375 375 ;ROM ADDR 755
4641 001503 000000 000337 337
4642 001504 000000 000015 15
4643 001505 000000 000375 375 ;ROM ADDR 756
4644 001506 000000 000357 357
4645 001507 000000 000016 16
4646 001510 000000 000375 375 ;ROM ADDR 757
4647 001511 000000 000377 377
4648 001512 000000 000017 17
4649 001513 000000 000373 373 ;ROM ADDR 760
4650 001514 000000 000017 17
4651 001515 000000 000000 0
4652 001516 000000 000373 373 ;ROM ADDR 761
4653 001517 000000 000037 37
4654 001520 000000 000001 1
4655 001521 000000 000373 373 ;ROM ADDR 762
4656 001522 000000 000057 57
4657 001523 000000 000002 2
4658 001524 000000 000373 373 ;ROM ADDR 763
4659 001525 000000 000077 77
4660 001526 000000 000003 3
4661 001527 000000 000373 373 ;ROM ADDR 764
4662 001530 000000 000117 117
4663 001531 000000 000004 4
4664 001532 000000 000373 373 ;ROM ADDR 765
4665 001533 000000 000137 137
4666 001534 000000 000005 5
4667 001535 000000 000373 373 ;ROM ADDR 766
4668 001536 000000 000157 157
4669 001537 000000 000006 6
MCODE4 DX20 MICRO-DIAGNOSTIC OF THE DATA PATH - PART 1 VERSION 0.1 MACRO %53B(1252) 15:46 6-Mar-89 Page 30-16
MCOD4M MAC 6-Mar-89 15:13 DATA PATH TEST - PART 1
4670 001540 000000 000373 373 ;ROM ADDR 767
4671 001541 000000 000177 177
4672 001542 000000 000007 7
4673 001543 000000 000373 373 ;ROM ADDR 770
4674 001544 000000 000217 217
4675 001545 000000 000010 10
4676 001546 000000 000373 373 ;ROM ADDR 771
4677 001547 000000 000237 237
4678 001550 000000 000011 11
4679 001551 000000 000373 373 ;ROM ADDR 772
4680 001552 000000 000257 257
4681 001553 000000 000012 12
4682 001554 000000 000373 373 ;ROM ADDR 773
4683 001555 000000 000277 277
4684 001556 000000 000013 13
4685 001557 000000 000373 373 ;ROM ADDR 774
4686 001560 000000 000317 317
4687 001561 000000 000014 14
4688 001562 000000 000373 373 ;ROM ADDR 775
4689 001563 000000 000337 337
4690 001564 000000 000015 15
4691 001565 000000 000373 373 ;ROM ADDR 776
4692 001566 000000 000357 357
4693 001567 000000 000016 16
4694 001570 000000 000373 373 ;ROM ADDR 777
4695 001571 000000 000377 377
4696 001572 000000 000017 17
4697 .END
4698
4699 END
NO ERRORS DETECTED
PROGRAM BREAK IS 000000
ABSOLUTE BREAK IS 005521
CPU TIME USED 03:13.626
29P CORE USED
AC0 752 862 864 865 879 880 881 894 896 897 913 915 916 951
953 954 967 968 969 982 984 985 1001 1003 1004 1038 1039 1052
1053 1068 1069 1103 1104 1117 1118 1133 1134 1168 1169 1182 1183 1198
1199 1233 1234 1247 1248 1263 1264 1298 1300 1301 1309 1311 1312 1320
1322 1323 1331 1333 1334 1342 1344 1345 1377 1379 1406 1408 1442 1444
1475 1476 1489 1490 1502 1503 1535 1537 1539 1558 1560 1561 1579 1581
1582 1633 1634 1647 1648 1661 1662 1677 1678 1745 1754 1822 1823 1837
1838 1853 1854 1874 1875 1922 1923 1940 1941 1957 1958 1979 1980 2003
2004 2027 2028 2047 2048 2071 2072 2092 2093 2113 2114 2134 2135 2162
2163 2176 2177 2191 2192 2364 2365 2413 2414 2474 2475 2495 2496 2582
2583 2616 2617 2653 2654 2740 2741 2888 2890 2929 2930 2946 2947 2964
2965 2980 2981 2997 2998 3015 3016 3036 3037 3056 3057 3074 3075 3099
3100 3114 3115 3134 3135 3179 3180 3205 3206 3235 3236 3253 3254 3268
3269 3284 3285 3494 3495 3611 3613 3628 3630 3644 3646 3668 3670 3750
AC1 750 821 836 910 925 998 1013 1065 1078 1130 1143 1195 1208 1260
1273 1577 1592 1674 1687 1722 1729 1734 1770 1773 1786 1789 3756
AC2 1726 1752 1776 3758
AC3 1723 1753 1779 3759
AC4 680 685 1747 1749 1760 3754
AC5 648 650 652 658 692 693 695 714 716 721 725 730 733 736
741 747 754 1737 1741 1746 1757 3752 3792 3795 3798
AC6 661 665 675 772
AC7 633 668 669 702 707 711 715 728 731
ADVPTR 1775# 1790
AR1716 140#
ARHI 59#
ARHIBT 136#
ARLO 58#
ARLOBT 132#
ATA 344# 694 720 732 783
BCHI 54# 1232 1233 1246 1247 1262 1263
BCHIBT 116#
BCLKEN 79# 1533 1629 1719 1811 1914 1993 2017 2878 2918 3165 3195 3232 3314
3456 3602 3660
BCLO 53# 1167 1168 1181 1182 1197 1198
BCLOBT 112#
BCOVF 73#
BEGEND 778# 3790
BEGIN 618# 786
BORLO 174#
C 401#
CATAB 767 2235 2245 2256 2272 2283 2295 2310 2320 2331 2358 2373 2388 2398
2412 2422 2438 2454 2471 2484 2505 2531 2545 2558 2591 2600 2610 2626
2636 2647 2662 2671 2681 2709 2723 2739 2750 2765 2774 2791 2806 2822
2834 2854 2899 2939 2955 2973 2990 3006 3025 3045 3065 3083 3109 3123
3143 3190 3215 3244 3263 3279 3294 3332 3347 3358 3372 3387 3400 3420
3436 3475 3491 3503 3516 3532 3544 3565 3582 3622 3639 3655 3679
CBILO 173#
CC0 199# 1974 3129
CC1 200# 3051
CC2 201# 2926 2959 3462 3569
CC4 202# 2977 3031 3094 3320 3424
CC5 203# 3010 3071
CC8 204# 3606
CHANL 180#
CHKLOP 755#
CHKLP 756#
CLKDRL 175#
CLKLP1 1578# 1594
CLKPHF 1553 3814#
CLKPLS 65# 1421 1440 1557 1578 1977 2442 2458 2795 2810 2886 3177 3178 3204
3405 3549 3713 3714 3715 3716
CLRAR1 3660# 3679
CLRFLG 186#
CLRGO 337# 651
CLRSEX 3073 3091 3113 3780#
CLRUN1 1390# 1415
CLRUN2 1404# 1433
CLRUN3 1437# 1453
CMDF0 627 643#
CMPERR 338#
CORF 831# 833 868# 870 884# 886 901# 903 920# 922 957# 959 972# 974
989# 991 1008# 1010 1042# 1044 1056# 1058 1073# 1075 1107# 1109 1121# 1123
1138# 1140 1172# 1174 1186# 1188 1203# 1205 1237# 1239 1251# 1253 1268# 1270
1304# 1306 1315# 1317 1326# 1328 1337# 1339 1348# 1350 1382# 1384 1396# 1398
1411# 1413 1429# 1431 1449# 1451 1480# 1482 1493# 1495 1507# 1509 1544# 1546
1566# 1568 1587# 1589 1604# 1606 1637# 1639 1651# 1653 1665# 1667 1682# 1684
1763# 1765 1827# 1829 1843# 1845 1858# 1860 1879# 1881 1928# 1930 1947# 1949
1962# 1964 1984# 1986 2008# 2010 2032# 2034 2052# 2054 2076# 2078 2097# 2099
2118# 2120 2139# 2141 2166# 2168 2181# 2183 2195# 2197 2231# 2233 2241# 2243
2252# 2254 2268# 2270 2279# 2281 2291# 2293 2306# 2308 2316# 2318 2327# 2329
2354# 2356 2369# 2371 2384# 2386 2394# 2396 2408# 2410 2418# 2420 2434# 2436
2450# 2452 2467# 2469 2480# 2482 2501# 2503 2527# 2529 2541# 2543 2554# 2556
2587# 2589 2596# 2598 2606# 2608 2622# 2624 2632# 2634 2643# 2645 2658# 2660
2667# 2669 2677# 2679 2705# 2707 2719# 2721 2735# 2737 2746# 2748 2761# 2763
2770# 2772 2787# 2789 2802# 2804 2818# 2820 2830# 2832 2850# 2852 2895# 2897
2935# 2937 2951# 2953 2969# 2971 2986# 2988 3002# 3004 3021# 3023 3041# 3043
3061# 3063 3079# 3081 3105# 3107 3119# 3121 3139# 3141 3186# 3188 3211# 3213
3240# 3242 3259# 3261 3275# 3277 3290# 3292 3328# 3330 3343# 3345 3354# 3356
3368# 3370 3383# 3385 3396# 3398 3416# 3418 3432# 3434 3471# 3473 3487# 3489
3499# 3501 3512# 3514 3528# 3530 3540# 3542 3561# 3563 3578# 3580 3618# 3620
3635# 3637 3651# 3653 3675# 3677
CSR0 168#
CSR1 169# 3772 3785
CUADRS 431 518 2216 2231 2235 2241 2245 2252 2256 2268 2272 2279 2283 2291
2295 2306 2310 2316 2320 2327 2331 2333 2342 2354 2358 2369 2373 2384
2388 2394 2398 2408 2412 2418 2422 2434 2438 2450 2454 2467 2471 2480
2484 2501 2505 2507 2516 2527 2531 2541 2545 2554 2558 2560 2569 2587
2591 2596 2600 2606 2610 2622 2626 2632 2636 2643 2647 2658 2662 2667
2671 2677 2681 2683 2692 2705 2709 2719 2723 2735 2739 2746 2750 2761
2765 2770 2774 2787 2791 2802 2806 2818 2822 2830 2834 2850 2854 2856
2865 2895 2899 2901 2910 2935 2939 2951 2955 2969 2973 2986 2990 3002
3006 3021 3025 3041 3045 3061 3065 3079 3083 3105 3109 3119 3123 3139
3143 3145 3154 3186 3190 3211 3215 3217 3226 3240 3244 3259 3263 3275
3279 3290 3294 3296 3305 3328 3332 3343 3347 3354 3358 3368 3372 3383
3387 3396 3400 3416 3420 3432 3436 3438 3447 3471 3475 3487 3491 3499
3503 3512 3516 3528 3532 3540 3544 3561 3565 3578 3582 3584 3593 3618
3622 3635 3639 3651 3655 3675 3679 3681
DB 370#
DBEVEN 373#
DBPAR 371#
DBPARE 372#
DEVRD 1813 2224 2299 2362 2488 2614 2922 2994 3169 3458 3695#
DEVWR 2260 2580 2651 2713 2838 2961 3316 3704#
DFCLK1 1600# 1608
DFCPH0 153# 1536 1559 1580
DFCPH1 154# 1536 1559 1580
DFRMAD 55# 1632 1633 1646 1647 1661 1676 1677 1730 1735 1747 1819 1870 1919
1975 1996 2020 2067 2088 2109 2130 2883 2888 2927 2944 2960 2978 3011
3032 3052 3072 3090 3095 3130 3174 3200 3321 3409 3425 3463 3553 3570
3607 3663
DIAGAD 191# 1788
DISACK 182#
DMSTRQ 81# 2522 2549 2727 2778 2840
DMXSHF 193#
DONE 334#
DPPEFG 72#
DRLO 172#
DSHF0 217#
DSHF1 218#
DSHF10 225#
DSHF11 226#
DSHF12 227#
DSHF13 228#
DSHF14 229#
DSHF15 230#
DSHF16 231#
DSHF17 232# 2066
DSHF2 219#
DSHF3 220# 2087
DSHF4 221#
DSHF5 222# 2108
DSHF6 223# 2129
DSHF7 224# 1918 1995 2019 3089
DSLVRQ 80# 2160 2189 2377 2426 2490
DTD 340# 649 694 3706
DXHISP 78# 1419 1732 1871 3012 3033 3053 3096 3131 3175 3201 3664 3740
EBL 335#
EDIT 2# 2 616
ELOOPC 757 762#
END 3683 3790#
ENSS 1820 1920 1997 2021 2884 3322 3464 3608 3738#
ERLP 736# 831 1304 1315 1326 1337 1348 1382 1396 1411 1429 1449 1480 1493
1507 1604 1763 1827 1843 1858 1879 1928 1947 1962 1984 2008 2032 2052
2076 2097 2118 2139 2166 2181 2195 2231 2234 2241 2244 2252 2255 2268
2271 2279 2282 2291 2294 2306 2309 2316 2319 2327 2330 2354 2357 2369
2372 2384 2387 2394 2397 2408 2411 2418 2421 2434 2437 2450 2453 2467
2470 2480 2483 2501 2504 2527 2530 2541 2544 2554 2557 2587 2590 2596
2599 2606 2609 2622 2625 2632 2635 2643 2646 2658 2661 2667 2670 2677
2680 2705 2708 2719 2722 2735 2738 2746 2749 2761 2764 2770 2773 2787
2790 2802 2805 2818 2821 2830 2833 2850 2853 2898 2935 2938 2951 2954
2969 2972 2986 2989 3002 3005 3021 3024 3041 3044 3061 3064 3079 3082
3105 3108 3119 3122 3139 3142 3186 3189 3211 3214 3240 3243 3259 3262
3275 3278 3290 3293 3328 3331 3343 3346 3354 3357 3368 3371 3383 3386
3396 3399 3416 3419 3432 3435 3471 3474 3487 3490 3499 3502 3512 3515
3528 3531 3540 3543 3561 3564 3578 3581 3618 3621 3635 3638 3651 3654
3675 3678
ERLP0 737# 3796
ERLPA 747# 2235 2245 2256 2272 2283 2295 2310 2320 2331 2358 2373 2388 2398
2412 2422 2438 2454 2471 2484 2505 2531 2545 2558 2591 2600 2610 2626
2636 2647 2662 2671 2681 2709 2723 2739 2750 2765 2774 2791 2806 2822
2834 2854 2899 2939 2955 2973 2990 3006 3025 3045 3065 3083 3109 3123
3143 3190 3215 3244 3263 3279 3294 3332 3347 3358 3372 3387 3400 3420
3436 3475 3491 3503 3516 3532 3544 3565 3582 3622 3639 3655 3679
ERLPA0 748#
ERLPH 2234 2244 2255 2271 2282 2294 2309 2319 2330 2357 2372 2387 2397 2411
2421 2437 2453 2470 2483 2504 2530 2544 2557 2590 2599 2609 2625 2635
2646 2661 2670 2680 2708 2722 2738 2749 2764 2773 2790 2805 2821 2833
2853 2938 2954 2972 2989 3005 3024 3044 3064 3082 3108 3122 3142 3189
3214 3243 3262 3278 3293 3331 3346 3357 3371 3386 3399 3419 3435 3474
3490 3502 3515 3531 3543 3564 3581 3621 3638 3654 3678 3795#
ERLPM 741# 868 884 901 920 957 972 989 1008 1042 1056 1073 1107 1121
1138 1172 1186 1203 1237 1251 1268 1544 1566 1587 1637 1651 1665 1682
2235 2245 2256 2272 2283 2295 2310 2320 2331 2358 2373 2388 2398 2412
2422 2438 2454 2471 2484 2505 2531 2545 2558 2591 2600 2610 2626 2636
2647 2662 2671 2681 2709 2723 2739 2750 2765 2774 2791 2806 2822 2834
2854 2895 2898 2939 2955 2973 2990 3006 3025 3045 3065 3083 3109 3123
3143 3190 3215 3244 3263 3279 3294 3332 3347 3358 3372 3387 3400 3420
3436 3475 3491 3503 3516 3532 3544 3565 3582 3622 3639 3655 3679
ERLPM0 742# 3799
ERLPMH 2898 3798#
ERRCA 745 752#
ERRCHK 707# 737 742 748
ERRCOM 739 754#
ERRSET 701# 830 867 883 900 919 956 971 988 1007 1041 1055 1072 1106
1120 1137 1171 1185 1202 1236 1250 1267 1303 1314 1325 1336 1347 1381
1395 1410 1428 1448 1479 1492 1506 1543 1565 1586 1603 1636 1650 1664
1681 1762 1826 1842 1857 1878 1927 1946 1961 1983 2007 2031 2051 2075
2096 2117 2138 2165 2180 2194 3801
ERSETH 2230 2240 2251 2267 2278 2290 2305 2315 2326 2353 2368 2383 2393 2407
2417 2433 2449 2466 2479 2500 2526 2540 2553 2586 2595 2605 2621 2631
2642 2657 2666 2676 2704 2718 2734 2745 2760 2769 2786 2801 2817 2829
2849 2894 2934 2950 2968 2985 3001 3020 3040 3060 3078 3104 3118 3138
3185 3210 3239 3258 3274 3289 3327 3342 3353 3367 3382 3395 3415 3431
3470 3486 3498 3511 3527 3539 3560 3577 3617 3634 3650 3674 3801#
EVPAR 183#
EXC 336#
EXRUN0 1993#
EXRUN1 2012 2017# 2036
EXRUN2 2026# 2056
EXRUN3 2063# 2080
EXRUN4 2086# 2101
EXRUN5 2107# 2122
EXRUN6 2128# 2143
EXTRUN 145#
F0 324#
F1 325#
F2 326#
F3 327#
F4 328#
FEX1 1835# 1847
FEX2 1851# 1862
FEX3 1866# 1883
FLT1 912# 924 927
FLT10 1676# 1686 1689
FLT2 1000# 1012 1015
FLT4 1067# 1077 1080
FLT5 1132# 1142 1145
FLT6 1197# 1207 1210
FLT7 1262# 1272 1275
FLTZ 1066 1131 1196 1261 1675 3838#
FLTZ1 911 3818#
FLTZ2 999 3826#
FN 323#
GO 322#
HSDPIN 66# 1375 1404 1488 1575 1815 1868 2026 2063 2086 2107 2128 2226 2262
2301 2363 2489 2494 2581 2615 2652 2714 2839 2844 2923 2962 2995 3170
3317 3426 3459 3571
I 836 925 1013 1078 1143 1208 1273 1561 1592 1687 1754 1757 3760 3761
ILF 342#
INADR 407#
INIT 410# 634 3686
INITL 892 980 1659 1884 1912 3686#
INT0 397#
INT1 398#
INT2 399#
INT3 400#
IOSEL 406# 619 635 637 661 663 666 680 682 686 779 801 1739 1744
3687 3689 3696 3700 3705 3709 3722 3725 3731 3734 3749 3764 3770 3776
3781 3787
ISSET 1769 1786#
LDCB 143#
LDCB1 3406# 3420
LDCB2 3424# 3436
LDRMDA 64# 1600 1731
LDSB 144#
LDSB1 3550# 3565 3582
LDSB2 3569#
LOOPEN 181# 3771
LPADR 831# 834 868# 871 884# 887 901# 904 920# 923 957# 960 972# 975
989# 992 1008# 1011 1042# 1045 1056# 1059 1073# 1076 1107# 1110 1121# 1124
1138# 1141 1172# 1175 1186# 1189 1203# 1206 1237# 1240 1251# 1254 1268# 1271
1304# 1307 1315# 1318 1326# 1329 1337# 1340 1348# 1351 1382# 1385 1396# 1399
1411# 1414 1429# 1432 1449# 1452 1480# 1483 1493# 1496 1507# 1510 1544# 1547
1566# 1569 1587# 1590 1604# 1607 1637# 1640 1651# 1654 1665# 1668 1682# 1685
1763# 1766 1827# 1830 1843# 1846 1858# 1861 1879# 1882 1928# 1931 1947# 1950
1962# 1965 1984# 1987 2008# 2011 2032# 2035 2052# 2055 2076# 2079 2097# 2100
2118# 2121 2139# 2142 2166# 2169 2181# 2184 2195# 2198 2231# 2234 2235 2241#
2244 2245 2252# 2255 2256 2268# 2271 2272 2279# 2282 2283 2291# 2294 2295
2306# 2309 2310 2316# 2319 2320 2327# 2330 2331 2354# 2357 2358 2369# 2372
2373 2384# 2387 2388 2394# 2397 2398 2408# 2411 2412 2418# 2421 2422 2434#
2437 2438 2450# 2453 2454 2467# 2470 2471 2480# 2483 2484 2501# 2504 2505
2527# 2530 2531 2541# 2544 2545 2554# 2557 2558 2587# 2590 2591 2596# 2599
2600 2606# 2609 2610 2622# 2625 2626 2632# 2635 2636 2643# 2646 2647 2658#
2661 2662 2667# 2670 2671 2677# 2680 2681 2705# 2708 2709 2719# 2722 2723
2735# 2738 2739 2746# 2749 2750 2761# 2764 2765 2770# 2773 2774 2787# 2790
2791 2802# 2805 2806 2818# 2821 2822 2830# 2833 2834 2850# 2853 2854 2895#
2898 2899 2935# 2938 2939 2951# 2954 2955 2969# 2972 2973 2986# 2989 2990
3002# 3005 3006 3021# 3024 3025 3041# 3044 3045 3061# 3064 3065 3079# 3082
3083 3105# 3108 3109 3119# 3122 3123 3139# 3142 3143 3186# 3189 3190 3211#
3214 3215 3240# 3243 3244 3259# 3262 3263 3275# 3278 3279 3290# 3293 3294
3328# 3331 3332 3343# 3346 3347 3354# 3357 3358 3368# 3371 3372 3383# 3386
3387 3396# 3399 3400 3416# 3419 3420 3432# 3435 3436 3471# 3474 3475 3487#
3490 3491 3499# 3502 3503 3512# 3515 3516 3528# 3531 3532 3540# 3543 3544
3561# 3564 3565 3578# 3581 3582 3618# 3621 3622 3635# 3638 3639 3651# 3654
3655 3675# 3678 3679
MAR 1752 3758
MARX 1753 3759
MCHI 52# 1102 1103 1116 1117 1132 1133
MCHIBT 108#
MCLO 51# 824 1037 1038 1051 1052 1067 1068
MCLOBT 104#
MCOVF 74#
MEMCOV 91#
MEONFE 92#
MHND 2838# 2854
MPDB0 360#
MPDB1 364#
MPDB2 368#
MPDTR 352#
MPECR 348# 647 726
MPERR 343# 694 732
MPGP0 377# 664 781
MPGP1 378# 782 803
MPGP10 385#
MPGP11 386#
MPGP12 387# 3760
MPGP13 388# 3761
MPGP14 389# 3751
MPGP15 390# 3753
MPGP16 391# 3762
MPGP17 392# 3755
MPGP2 379#
MPGP3 380#
MPGP4 381# 744 751 3732 3757
MPGP5 382# 753 1742
MPGP6 383# 639 3723
MPGP7 384#
MPHVR 356#
MPSCR0 320# 620 624
MPSCR1 333# 648 653 692 696 784 3698 3707
MPSTAT 396#
MRD1 2614# 2662 2671 2681
MRHDOF 94#
MSHF0 215 234#
MSHF1 235#
MSHF10 242#
MSHF11 243#
MSHF12 244#
MSHF13 245#
MSHF14 246#
MSHF15 247#
MSHF16 248#
MSHF17 249#
MSHF2 236#
MSHF3 237#
MSHF4 238#
MSHF5 239#
MSHF6 240#
MSHF7 241#
MSK0 200 206#
MSK1 207#
MSK1S 215#
MSK2 208#
MSK3 209#
MSK4 210#
MSK5 211#
MSK6 212#
MSK7 213#
MSK8 214#
MSRDY1 163#
MSRDY2 164#
MSTACK 83#
MSTRDY 162#
MSTRPE 150#
MSTRQ 85#
MUXSHF 194#
NCLRAR 141#
NCLRN 151#
NENMDM 142#
NFEXFR 100#
NMEXFR 99#
NOFAIL 717 719#
NOTRUN 152#
NRNDAT 155#
NRTN 683# 738 743 749 773
NSEXFR 98#
NXTBNK 2205 2208#
OCC 341#
OFFGO 640 646# 758 762
ONES 197# 1869 2882 2889 3173
OUTADR 408#
PARLP 823# 835 838
PNT 461# 831 868 884 901 920 957 972 989 1008 1042 1056 1073 1107
1121 1138 1172 1186 1203 1237 1251 1268 1304 1315 1326 1337 1348 1382
1396 1411 1429 1449 1480 1493 1507 1544 1566 1587 1604 1637 1651 1665
1682 1763 1827 1843 1858 1879 1928 1947 1962 1984 2008 2032 2052 2076
2097 2118 2139 2166 2181 2195 2231 2241 2252 2268 2279 2291 2306 2316
2327 2354 2369 2384 2394 2408 2418 2434 2450 2467 2480 2501 2527 2541
2554 2587 2596 2606 2622 2632 2643 2658 2667 2677 2705 2719 2735 2746
2761 2770 2787 2802 2818 2830 2850 2895 2935 2951 2969 2986 3002 3021
3041 3061 3079 3105 3119 3139 3186 3211 3240 3259 3275 3290 3328 3343
3354 3368 3383 3396 3416 3432 3471 3487 3499 3512 3528 3540 3561 3578
3618 3635 3651 3675
PULSE1 3267 3283 3336 3362 3376 3479 3507 3520 3610 3626 3643 3716#
PULSE2 1938 1955 3252 3667 3715#
PULSE3 3714#
PULSE4 2000 2024 2045 2069 2090 2111 2132 3093 3713#
RA71R1 287#
RA71R2 288#
RA71R3 289#
RA71R4 290#
RA71R5 291#
RA72R1 294#
RA72R2 295#
RA72R3 296#
RA72R4 297#
RA72R5 298#
RAS6R1 279#
RAS6R2 280#
RAS6R3 281#
RAS6R4 282#
RAS6R5 283#
RAS6R6 284#
RAS71F 286#
RAS72F 293#
RASC6F 278#
RCBLR1 309#
RCBLR2 310#
RCBLR3 311#
RCBLR4 312#
RCDMPF 260#
RCDMR1 261#
RCDMR2 262#
RCDMR3 263#
RCDMR4 264#
RCDMR5 265#
RCOBLF 308#
RDLOBT 124# 128#
REG0 47# 823 827 1298
REG1 48# 861 862 878 879 894 912 913 1374 1420 1438 1534 1555 1630
1720 1728 1733 1812 1867 1872 1915 1973 1994 2018 2065 2161 2162 2175
2176 2190 2191 2201 2349 2350 2378 2380 2403 2404 2427 2429 2491 2493
2523 2524 2536 2537 2550 2551 2579 2699 2700 2728 2730 2755 2756 2779
2781 2841 2843 2879 2919 2921 3013 3030 3034 3050 3054 3070 3088 3097
3128 3132 3166 3168 3176 3196 3198 3202 3233 3250 3315 3407 3457 3551
3603 3661 3665 3739 3741
REG10A 1645# 1655 1669
REG15 60# 1320 1922 1940 1957 1979 2003 2027 2047 2071 2092 2113 2134 3235
3253 3268 3284 3324 3337 3377 3411 3427 3466 3480 3521 3555 3572 3611
3629 3644 3668
REG16 61# 1331 1378 1391 1407 1422 1443 1475 1489 1502 1535 1558 1579 1601
2929 2946 2964 2980 2997 3015 3036 3056 3074 3099 3114 3134 3179 3205
REG17 62# 1342 2002 2227 2236 2246 2263 2273 2284 2302 2311 2321 2389 2443
2459 2582 2592 2601 2616 2627 2637 2653 2663 2672 2740 2796 2811 3350
3363 3390 3494 3508 3535
REG1A 877# 888 905
REG2 49# 950 951 966 967 982 1000 1001 1724 1737 1768 1783 1817 1917
2364 2413 2474 2495 2715 2766 2825 2845 2881 2925 3172 3319 3461 3605
REG2A 965# 976 993
REG3 50# 1309 1822 1837 1853 1874
REG4A 1050# 1060
REG5A 1115# 1125
REG6A 1180# 1190
REG7A 1245# 1255
REM1F 300#
REM1R1 301#
REM1R2 302#
REM2F 304#
REM2R1 305#
REM2R2 306#
REPORT 712 724#
REPTU 772# 840 929 1017 1082 1147 1212 1277 1353 1454 1512 1609 1691 1793
1886 2144 2203 3803
REPTUH 2332 2506 2559 2682 2855 2900 3144 3216 3295 3437 3583 3680 3803#
RESIOS 685# 759 763
RHDATA 430 498 2216 2231 2235 2241 2245 2252 2256 2268 2272 2279 2283 2291
2295 2306 2310 2316 2320 2327 2331 2333 2342 2354 2358 2369 2373 2384
2388 2394 2398 2408 2412 2418 2422 2434 2438 2450 2454 2467 2471 2480
2484 2501 2505 2507 2516 2527 2531 2541 2545 2554 2558 2560 2569 2587
2591 2596 2600 2606 2610 2622 2626 2632 2636 2643 2647 2658 2662 2667
2671 2677 2681 2683 2692 2705 2709 2719 2723 2735 2739 2746 2750 2761
2765 2770 2774 2787 2791 2802 2806 2818 2822 2830 2834 2850 2854 2856
2865 2895 2899 2901 2910 2935 2939 2951 2955 2969 2973 2986 2990 3002
3006 3021 3025 3041 3045 3061 3065 3079 3083 3105 3109 3119 3123 3139
3143 3145 3154 3186 3190 3211 3215 3217 3226 3240 3244 3259 3263 3275
3279 3290 3294 3296 3305 3328 3332 3343 3347 3354 3358 3368 3372 3383
3387 3396 3400 3416 3420 3432 3436 3438 3447 3471 3475 3487 3491 3499
3503 3512 3516 3528 3532 3540 3544 3561 3565 3578 3582 3584 3593 3618
3622 3635 3639 3651 3655 3675 3679 3681
RHIDNF 267#
RHIDR1 268#
RHIDR2 269#
RHIDR3 270#
RHIDR4 271#
RHIDR5 272#
RHIDR6 273#
RHIDR7 274#
RHIDR8 275#
RHIDR9 276#
RINCMF 254#
RINCR1 255#
RINCR2 256#
RINCR3 257#
RINCR4 258#
RMADLO 120#
RMADR8 89# 1740 1782 1816 1916 2880 2924 3171 3318 3460 3604
RMDAHI 57# 1746
RMDALO 56# 1745
RNDAT1 2943# 2955
RNDAT2 2959# 2973
RNDAT3 2977# 2990
RNDAT4 2994# 3006
RNDAT5 3010# 3025
RNDAT6 3029# 3045
RNDAT7 3049# 3065 3123 3143
RNDAT8 3069# 3083
RNDAT9 3087# 3109
RNDT10 3113#
RNDT11 3127#
ROMDAT 1725 3854#
ROMERR 1756 1759 1762#
ROMFIN 1787 1793#
ROMLP 1727# 1767 1774 1778 1780 1784 1791
RPTCNT 42# 674
RUN 321#
RUN1 1488# 1511
RUNA 3195# 3215
SAVIOS 680# 719 724
SEBCOV 90#
SET8 1771 1782#
SETATA 692# 755
SETDAT 825 3730#
SETPNT 818 1717 3721#
SETRUN 67# 1390 1439 1474 1501 1556 1599 1851 1937 1976 1999 2023 2044 2068
2089 2110 2131 2885 3092 3203 3251 3323 3410 3465 3554 3609 3666
SHND 2488# 2505
SLAK25 176#
SLRDY1 160#
SLRDY2 161#
SLVACK 82#
SLVEPE 149#
SLVRDY 159#
SLVRQ 84#
SPRES 409# 634
SRD1 2260# 2310 2320 2331
SRHDOF 93#
SRVINL 185#
STAINL 184# 3773
START 339#
STRDAT 1750 3748#
SWEX 1835 2042 3014 3098 3133 3769#
TEST0I 658# 3793
TESTI 659# 805 849 938 1026 1091 1156 1221 1286 1362 1463 1521 1618 1700
1802 1895 2153
TESTIH 2215 2341 2515 2568 2691 2864 2909 3153 3225 3304 3446 3592 3792#
TOR0 170# 3774 3783
TOR1 171#
TST 806# 841 850# 872 930 939# 961 1018 1027# 1046 1083 1092# 1111 1148
1157# 1176 1213 1222# 1241 1278 1287# 1308 1354 1363# 1386 1400 1455 1464#
1484 1497 1513 1522# 1548 1570 1591 1610 1619# 1641 1692 1701# 1794 1803#
1831 1887 1896# 1932 1951 1966 1988 2145 2154# 2170 2185 2199 2204 2216#
2235 2245 2256 2272 2283 2295 2333 2342# 2358 2373 2388 2398 2412 2422
2438 2454 2471 2484 2507 2516# 2531 2545 2558 2560 2569# 2591 2600 2610
2626 2636 2647 2683 2692# 2709 2723 2739 2750 2765 2774 2791 2806 2822
2834 2856 2865# 2899 2901 2910# 2939 3145 3154# 3190 3217 3226# 3244 3263
3279 3294 3296 3305# 3332 3347 3358 3372 3387 3400 3438 3447# 3475 3491
3503 3516 3532 3544 3584 3593# 3622 3639 3655 3681
TST197 806 807#
TST198 850 851#
TST199 939 940#
TST200 1027 1028#
TST201 1092 1093#
TST202 1157 1158#
TST203 1222 1223#
TST204 1287 1288#
TST205 1363 1364#
TST206 1464 1465#
TST207 1522 1523#
TST208 1619 1620#
TST209 1701 1702#
TST210 1803 1804#
TST211 1896 1897#
TST212 2154 2155#
TST213 2216 2217#
TST214 2342 2343#
TST215 2516 2517#
TST216 2569 2570#
TST217 2692 2693#
TST218 2865 2866#
TST219 2910 2911#
TST220 3154 3155#
TST221 3226 3227#
TST222 3305 3306#
TST223 3447 3448#
TST224 3593 3594#
TSTART 641 789#
UBPAR 822 3807#
UBPEFG 71#
UNUSE1 1309# 1319
UNUSE2 1320# 1330
UNUSE3 1331# 1341
UNUSE4 1342# 1352
VERSIO 2# 2 616
WAITGO 620# 623 756 785
WAS71 285#
WAS72 292#
WASC6 277#
WCDMP 259#
WCLK 329#
WCOBOL 307#
WEM1 299#
WEM2 303#
WHIDN 266#
WINCM 253#
Z 402#
ZERADR 190# 1772
ZEROS 196# 1818 2943 3199 3408 3552 3662
ZRTN 760#
%ADRH 521# 2216 2216# 2231 2231# 2235 2235# 2241 2241# 2245 2245# 2252 2252# 2256
2256# 2268 2268# 2272 2272# 2279 2279# 2283 2283# 2291 2291# 2295 2295# 2306
2306# 2310 2310# 2316 2316# 2320 2320# 2327 2327# 2331 2331# 2333 2333# 2342
2342# 2354 2354# 2358 2358# 2369 2369# 2373 2373# 2384 2384# 2388 2388# 2394
2394# 2398 2398# 2408 2408# 2412 2412# 2418 2418# 2422 2422# 2434 2434# 2438
2438# 2450 2450# 2454 2454# 2467 2467# 2471 2471# 2480 2480# 2484 2484# 2501
2501# 2505 2505# 2507 2507# 2516 2516# 2527 2527# 2531 2531# 2541 2541# 2545
2545# 2554 2554# 2558 2558# 2560 2560# 2569 2569# 2587 2587# 2591 2591# 2596
2596# 2600 2600# 2606 2606# 2610 2610# 2622 2622# 2626 2626# 2632 2632# 2636
2636# 2643 2643# 2647 2647# 2658 2658# 2662 2662# 2667 2667# 2671 2671# 2677
2677# 2681 2681# 2683 2683# 2692 2692# 2705 2705# 2709 2709# 2719 2719# 2723
2723# 2735 2735# 2739 2739# 2746 2746# 2750 2750# 2761 2761# 2765 2765# 2770
2770# 2774 2774# 2787 2787# 2791 2791# 2802 2802# 2806 2806# 2818 2818# 2822
2822# 2830 2830# 2834 2834# 2850 2850# 2854 2854# 2856 2856# 2865 2865# 2895
2895# 2899 2899# 2901 2901# 2910 2910# 2935 2935# 2939 2939# 2951 2951# 2955
2955# 2969 2969# 2973 2973# 2986 2986# 2990 2990# 3002 3002# 3006 3006# 3021
3021# 3025 3025# 3041 3041# 3045 3045# 3061 3061# 3065 3065# 3079 3079# 3083
3083# 3105 3105# 3109 3109# 3119 3119# 3123 3123# 3139 3139# 3143 3143# 3145
3145# 3154 3154# 3186 3186# 3190 3190# 3211 3211# 3215 3215# 3217 3217# 3226
3226# 3240 3240# 3244 3244# 3259 3259# 3263 3263# 3275 3275# 3279 3279# 3290
3290# 3294 3294# 3296 3296# 3305 3305# 3328 3328# 3332 3332# 3343 3343# 3347
3347# 3354 3354# 3358 3358# 3368 3368# 3372 3372# 3383 3383# 3387 3387# 3396
3396# 3400 3400# 3416 3416# 3420 3420# 3432 3432# 3436 3436# 3438 3438# 3447
3447# 3471 3471# 3475 3475# 3487 3487# 3491 3491# 3499 3499# 3503 3503# 3512
3512# 3516 3516# 3528 3528# 3532 3532# 3540 3540# 3544 3544# 3561 3561# 3565
3565# 3578 3578# 3582 3582# 3584 3584# 3593 3593# 3618 3618# 3622 3622# 3635
3635# 3639 3639# 3651 3651# 3655 3655# 3675 3675# 3679 3679# 3681 3681# 3792
3795 3798 3801 3803 3805
%EMES 806# 833 836 836# 850# 870 873 873# 886 889 889# 903 906 906#
922 925 925# 939# 959 962 962# 974 977 977# 991 994 994# 1010
1013 1013# 1027# 1044 1047 1047# 1058 1061 1061# 1075 1078 1078# 1092# 1109
1112 1112# 1123 1126 1126# 1140 1143 1143# 1157# 1174 1177 1177# 1188 1191
1191# 1205 1208 1208# 1222# 1239 1242 1242# 1253 1256 1256# 1270 1273 1273#
1287# 1306 1309 1309# 1317 1320 1320# 1328 1331 1331# 1339 1342 1342# 1350
1353 1353# 1363# 1384 1387 1387# 1398 1401 1401# 1413 1416 1416# 1431 1434
1434# 1451 1454 1454# 1464# 1482 1485 1485# 1495 1498 1498# 1509 1512 1512#
1522# 1546 1549 1549# 1568 1571 1571# 1589 1592 1592# 1606 1609 1609# 1619#
1639 1642 1642# 1653 1656 1656# 1667 1670 1670# 1684 1687 1687# 1701# 1765
1768 1768# 1803# 1829 1832 1832# 1845 1848 1848# 1860 1863 1863# 1881 1884
1884# 1896# 1930 1933 1933# 1949 1952 1952# 1964 1967 1967# 1986 1989 1989#
2010 2013 2013# 2034 2037 2037# 2054 2057 2057# 2078 2081 2081# 2099 2102
2102# 2120 2123 2123# 2141 2144 2144# 2154# 2168 2171 2171# 2183 2186 2186#
2197 2200 2200# 2216# 2233 2236 2236# 2243 2246 2246# 2254 2257 2257# 2270
2273 2273# 2281 2284 2284# 2293 2296 2296# 2308 2311 2311# 2318 2321 2321#
2329 2332 2332# 2342# 2356 2359 2359# 2371 2374 2374# 2386 2389 2389# 2396
2399 2399# 2410 2413 2413# 2420 2423 2423# 2436 2439 2439# 2452 2455 2455#
2469 2472 2472# 2482 2485 2485# 2503 2506 2506# 2516# 2529 2532 2532# 2543
2546 2546# 2556 2559 2559# 2569# 2589 2592 2592# 2598 2601 2601# 2608 2611
2611# 2624 2627 2627# 2634 2637 2637# 2645 2648 2648# 2660 2663 2663# 2669
2672 2672# 2679 2682 2682# 2692# 2707 2710 2710# 2721 2724 2724# 2737 2740
2740# 2748 2751 2751# 2763 2766 2766# 2772 2775 2775# 2789 2792 2792# 2804
2807 2807# 2820 2823 2823# 2832 2835 2835# 2852 2855 2855# 2865# 2897 2900
2900# 2910# 2937 2940 2940# 2953 2956 2956# 2971 2974 2974# 2988 2991 2991#
3004 3007 3007# 3023 3026 3026# 3043 3046 3046# 3063 3066 3066# 3081 3084
3084# 3107 3110 3110# 3121 3124 3124# 3141 3144 3144# 3154# 3188 3191 3191#
3213 3216 3216# 3226# 3242 3245 3245# 3261 3264 3264# 3277 3280 3280# 3292
3295 3295# 3305# 3330 3333 3333# 3345 3348 3348# 3356 3359 3359# 3370 3373
3373# 3385 3388 3388# 3398 3401 3401# 3418 3421 3421# 3434 3437 3437# 3447#
3473 3476 3476# 3489 3492 3492# 3501 3504 3504# 3514 3517 3517# 3530 3533
3533# 3542 3545 3545# 3563 3566 3566# 3580 3583 3583# 3593# 3620 3623 3623#
3637 3640 3640# 3653 3656 3656# 3677 3680 3680#
%REQ 429# 769
%TNUM 427# 800 804 806# 848 850# 937 939# 1025 1027# 1090 1092# 1155 1157#
1220 1222# 1285 1287# 1361 1363# 1462 1464# 1520 1522# 1617 1619# 1699 1701#
1801 1803# 1894 1896# 2152 2154# 2214 2216# 2340 2342# 2514 2516# 2567 2569#
2690 2692# 2863 2865# 2908 2910# 3152 3154# 3224 3226# 3303 3305# 3445 3447#
3591 3593#
.ERROR 708 709
ADB 1773 1789
ADBR 1776
DATI 620 624 648 661 680 692 827 862 879 894 913 951 967 982
1001 1038 1052 1068 1103 1117 1133 1168 1182 1198 1233 1247 1263 1298
1309 1320 1331 1342 1378 1391 1407 1422 1443 1475 1489 1502 1535 1558
1579 1601 1633 1647 1661 1677 1737 1745 1746 1747 1768 1822 1837 1853
1874 1922 1940 1957 1979 2003 2027 2047 2071 2092 2113 2134 2162 2176
2191 2227 2236 2246 2263 2273 2284 2302 2311 2321 2350 2364 2380 2389
2404 2413 2429 2443 2459 2474 2495 2524 2537 2551 2582 2592 2601 2616
2627 2637 2653 2663 2672 2700 2715 2730 2740 2756 2766 2781 2796 2811
2825 2845 2888 2929 2946 2964 2980 2997 3015 3036 3056 3074 3099 3114
3134 3179 3205 3235 3253 3268 3284 3324 3337 3350 3363 3377 3390 3411
3427 3466 3480 3494 3508 3521 3535 3555 3572 3611 3629 3644 3668
DECR 772 836 925 1013 1078 1143 1208 1273 1592 1687
DEFTST 434# 794
ERLOOP 481# 832 869 885 902 921 958 973 990 1009 1043 1057 1074 1108
1122 1139 1173 1187 1204 1238 1252 1269 1305 1316 1327 1338 1349 1383
1397 1412 1430 1450 1481 1494 1508 1545 1567 1588 1605 1638 1652 1666
1683 1764 1828 1844 1859 1880 1929 1948 1963 1985 2009 2033 2053 2077
2098 2119 2140 2167 2182 2196 2232 2242 2253 2269 2280 2292 2307 2317
2328 2355 2370 2385 2395 2409 2419 2435 2451 2468 2481 2502 2528 2542
2555 2588 2597 2607 2623 2633 2644 2659 2668 2678 2706 2720 2736 2747
2762 2771 2788 2803 2819 2831 2851 2896 2936 2952 2970 2987 3003 3022
3042 3062 3080 3106 3120 3140 3187 3212 3241 3260 3276 3291 3329 3344
3355 3369 3384 3397 3417 3433 3472 3488 3500 3513 3529 3541 3562 3579
3619 3636 3652 3676
ERRMAC 464# 830 867 883 900 919 956 971 988 1007 1041 1055 1072 1106
1120 1137 1171 1185 1202 1236 1250 1267 1303 1314 1325 1336 1347 1381
1395 1410 1428 1448 1479 1492 1506 1543 1565 1586 1603 1636 1650 1664
1681 1762 1826 1842 1857 1878 1927 1946 1961 1983 2007 2031 2051 2075
2096 2117 2138 2165 2180 2194 2230 2240 2251 2267 2278 2290 2305 2315
2326 2353 2368 2383 2393 2407 2417 2433 2449 2466 2479 2500 2526 2540
2553 2586 2595 2605 2621 2631 2642 2657 2666 2676 2704 2718 2734 2745
2760 2769 2786 2801 2817 2829 2849 2894 2934 2950 2968 2985 3001 3020
3040 3060 3078 3104 3118 3138 3185 3210 3239 3258 3274 3289 3327 3342
3353 3367 3382 3395 3415 3431 3470 3486 3498 3511 3527 3539 3560 3577
3617 3634 3650 3674
ERROR 473# 830 1303 1314 1325 1336 1347 1381 1395 1410 1426 1446 1479 1492
1506 1603 1762 1825 1841 1856 1877 1926 1943 1960 1983 2007 2031 2051
2075 2096 2117 2138 2165 2180 2194 2229 2239 2250 2266 2277 2289 2304
2314 2325 2353 2368 2382 2392 2407 2416 2432 2447 2464 2478 2499 2526
2540 2553 2585 2594 2604 2620 2630 2641 2656 2665 2675 2704 2718 2733
2744 2760 2768 2785 2799 2815 2828 2848 2933 2949 2967 2984 3000 3019
3039 3059 3077 3103 3117 3137 3183 3208 3238 3256 3272 3287 3326 3340
3352 3366 3380 3394 3414 3430 3469 3484 3497 3510 3525 3538 3559 3576
3615 3632 3648 3672
ERRORA 477#
ERRORD 479#
ERRORM 475# 867 883 899 918 956 971 987 1006 1041 1055 1071 1106 1120
1136 1171 1185 1201 1236 1250 1266 1541 1563 1584 1636 1650 1664 1680
2892
GOINK 523# 805 830 834 840 849 867 871 883 887 900 904 919 923
929 938 956 960 971 975 988 992 1007 1011 1017 1026 1041 1045
1055 1059 1072 1076 1082 1091 1106 1110 1120 1124 1137 1141 1147 1156
1171 1175 1185 1189 1202 1206 1212 1221 1236 1240 1250 1254 1267 1271
1277 1286 1303 1307 1314 1318 1325 1329 1336 1340 1347 1351 1353 1362
1381 1385 1395 1399 1410 1414 1428 1432 1448 1452 1454 1463 1479 1483
1492 1496 1506 1510 1512 1521 1543 1547 1565 1569 1586 1590 1603 1607
1609 1618 1636 1640 1650 1654 1664 1668 1681 1685 1691 1700 1762 1766
1793 1802 1826 1830 1842 1846 1857 1861 1878 1882 1886 1895 1927 1931
1946 1950 1961 1965 1983 1987 2007 2011 2031 2035 2051 2055 2075 2079
2096 2100 2117 2121 2138 2142 2144 2153 2165 2169 2180 2184 2194 2198
2203 2215 2230 2234 2240 2244 2251 2255 2267 2271 2278 2282 2290 2294
2305 2309 2315 2319 2326 2330 2332 2341 2353 2357 2368 2372 2383 2387
2393 2397 2407 2411 2417 2421 2433 2437 2449 2453 2466 2470 2479 2483
2500 2504 2506 2515 2526 2530 2540 2544 2553 2557 2559 2568 2586 2590
2595 2599 2605 2609 2621 2625 2631 2635 2642 2646 2657 2661 2666 2670
2676 2680 2682 2691 2704 2708 2718 2722 2734 2738 2745 2749 2760 2764
2769 2773 2786 2790 2801 2805 2817 2821 2829 2833 2849 2853 2855 2864
2894 2898 2900 2909 2934 2938 2950 2954 2968 2972 2985 2989 3001 3005
3020 3024 3040 3044 3060 3064 3078 3082 3104 3108 3118 3122 3138 3142
3144 3153 3185 3189 3210 3214 3216 3225 3239 3243 3258 3262 3274 3278
3289 3293 3295 3304 3327 3331 3342 3346 3353 3357 3367 3371 3382 3386
3395 3399 3415 3419 3431 3435 3437 3446 3470 3474 3486 3490 3498 3502
3511 3515 3527 3531 3539 3543 3560 3564 3577 3581 3583 3592 3617 3621
3634 3638 3650 3654 3674 3678 3680
GOSUB 818 825 892 980 1659 1717 1750 1813 1820 1835 1884 1912 1920 1938
1955 1997 2000 2021 2024 2042 2045 2069 2090 2111 2132 2224 2260 2299
INCR 1770 1779 1786
JMP 623 631 641 673 739 745 786 829 838 927 1015 1080 1145 1210
1275 1478 1505 1594 1689 1756 1759 1778 1780 1784 1791 1840 1925 1982
2006 2030 2050 2074 2095 2116 2137 2179 2206 2265 2276 2288 2352 2367
2391 2406 2431 2446 2463 2477 2498 2539 2619 2629 2640 2703 2717 2743
2759 2784 2798 2814 2827 2847 2932 2983 3018 3102 3182 3271 3339 3379
3413 3429 3483 3524 3558 3575 3683 3791 3794 3797 3800 3802 3804
JMPB0 622 627 629 757 828 1394 1425 1769 2228 2238 2249 2264 2275 2287
2303 2313 2324 2390 2445 2462 3351 3365 3393
JMPB4 671 1477 1491 1504 1602 1824 1839 1855 1876 2351 2381 2405 2430 2584
2593 2603 2618 2628 2639 2655 2664 2674 2702 2732 2742 2758 2783 2797
2813 3181 3207 3237 3255 3270 3286 3325 3338 3378 3412 3428 3468 3482
3496 3509 3523 3537 3557 3574
JMPB7 708 712 1924 1942 1959 1981 2005 2029 2049 2073 2094 2115 2136 2164
2178 2193 2366 2415 2476 2497 2525 2538 2552 2716 2767 2826 2846 2931
2948 2966 2982 2999 3017 3038 3058 3076 3101 3116 3136
JMPC 1771 1774 1777 1787 1790
JMPSUB 640 719 724 737 742 748 755 756 758 759 762 763 785 805
819 826 830 834 840 849 867 871 883 887 893 900 904 919
923 929 938 956 960 971 975 981 988 992 1007 1011 1017 1026
1041 1045 1055 1059 1072 1076 1082 1091 1106 1110 1120 1124 1137 1141
1147 1156 1171 1175 1185 1189 1202 1206 1212 1221 1236 1240 1250 1254
1267 1271 1277 1286 1303 1307 1314 1318 1325 1329 1336 1340 1347 1351
1353 1362 1381 1385 1395 1399 1410 1414 1428 1432 1448 1452 1454 1463
1479 1483 1492 1496 1506 1510 1512 1521 1543 1547 1565 1569 1586 1590
1603 1607 1609 1618 1636 1640 1650 1654 1660 1664 1668 1681 1685 1691
1700 1718 1751 1762 1766 1793 1802 1814 1821 1826 1830 1836 1842 1846
1857 1861 1878 1882 1885 1886 1895 1913 1921 1927 1931 1939 1946 1950
1956 1961 1965 1983 1987 1998 2001 2007 2011 2022 2025 2031 2035 2043
2046 2051 2055 2070 2075 2079 2091 2096 2100 2112 2117 2121 2133 2138
2142 2144 2153 2165 2169 2180 2184 2194 2198 2203 2215 2225 2230 2234
2240 2244 2251 2255 2261 2267 2271 2278 2282 2290 2294 2300 2305 2309
2315 2319 2326 2330 2332 2341 2353 2357 2362 2368 2372 2383 2387 2393
2397 2407 2411 2417 2421 2433 2437 2449 2453 2466 2470 2479 2483 2488
2500 2504 2506 2515 2526 2530 2540 2544 2553 2557 2559 2568 2580 2586
2590 2595 2599 2605 2609 2614 2621 2625 2631 2635 2642 2646 2651 2657
2661 2666 2670 2676 2680 2682 2691 2704 2708 2713 2718 2722 2734 2738
2745 2749 2760 2764 2769 2773 2786 2790 2801 2805 2817 2821 2829 2833
2838 2849 2853 2855 2864 2884 2894 2898 2900 2909 2922 2934 2938 2950
2954 2961 2968 2972 2985 2989 2994 3001 3005 3014 3020 3024 3040 3044
3060 3064 3073 3078 3082 3091 3093 3098 3104 3108 3113 3118 3122 3133
3138 3142 3144 3153 3169 3185 3189 3210 3214 3216 3225 3239 3243 3252
3258 3262 3267 3274 3278 3283 3289 3293 3295 3304 3316 3322 3327 3331
3336 3342 3346 3353 3357 3362 3367 3371 3376 3382 3386 3395 3399 3415
3419 3431 3435 3437 3446 3458 3464 3470 3474 3479 3486 3490 3498 3502
3507 3511 3515 3520 3527 3531 3539 3543 3560 3564 3577 3581 3583 3592
3608 3610 3617 3621 3626 3634 3638 3643 3650 3654 3667 3674 3678 3680
JMPZ 717 738 743 749 773 835 837 841 866 872 882 888 898 905
917 924 926 930 955 961 970 976 986 993 1005 1012 1014 1018
1040 1046 1054 1060 1070 1077 1079 1083 1105 1111 1119 1125 1135 1142
1144 1148 1170 1176 1184 1190 1200 1207 1209 1213 1235 1241 1249 1255
1265 1272 1274 1278 1302 1308 1313 1319 1324 1330 1335 1341 1346 1352
1354 1380 1386 1400 1409 1415 1433 1445 1453 1455 1484 1497 1511 1513
1540 1548 1562 1570 1583 1591 1593 1608 1610 1635 1641 1649 1655 1663
1669 1679 1686 1688 1692 1755 1758 1761 1767 1794 1831 1847 1862 1883
1887 1932 1951 1966 1988 2012 2036 2056 2080 2101 2122 2143 2145 2170
2185 2199 2204 2235 2245 2256 2272 2283 2295 2310 2320 2331 2333 2358
2373 2388 2398 2412 2422 2438 2454 2471 2484 2505 2507 2531 2545 2558
2560 2591 2600 2610 2626 2636 2647 2662 2671 2681 2683 2709 2723 2739
2750 2765 2774 2791 2806 2822 2834 2854 2856 2891 2899 2901 2939 2955
2973 2990 3006 3025 3045 3065 3083 3109 3123 3143 3145 3190 3215 3217
3244 3263 3279 3294 3296 3332 3347 3358 3372 3387 3400 3420 3436 3438
3475 3491 3503 3516 3532 3544 3565 3582 3584 3614 3622 3631 3639 3647
3655 3671 3679 3681
JUMP 2205 3790 3793 3796 3799 3801 3803
LANDB 695 715 730 1300 1311 1322 1333 1344 1741
LANDBR 650 668 714 728 864 896 915 953 984 1003 1537 1560 1581 1749
LANDMR 880 968
LDBR 618 630 632 634 636 638 646 649 651 667 672 674 681 694
701 713 720 727 729 732 778 780 783 800 802 804 818 820
825 833 848 863 870 886 892 895 903 909 914 922 937 952
959 974 980 983 991 997 1002 1010 1025 1044 1058 1064 1075 1090
1109 1123 1129 1140 1155 1174 1188 1194 1205 1220 1239 1253 1259 1270
1285 1299 1306 1310 1317 1321 1328 1332 1339 1343 1350 1361 1373 1376
1384 1398 1405 1413 1419 1431 1437 1441 1451 1462 1482 1495 1509 1520
1533 1536 1546 1554 1559 1568 1576 1580 1589 1606 1617 1629 1639 1653
1659 1667 1673 1684 1699 1717 1719 1721 1725 1727 1732 1738 1740 1743
1748 1750 1765 1772 1775 1782 1788 1801 1811 1813 1816 1818 1820 1829
1835 1845 1860 1866 1869 1871 1881 1884 1894 1912 1914 1916 1918 1920
1930 1938 1949 1955 1964 1972 1974 1986 1993 1995 1997 2000 2010 2017
2019 2021 2024 2034 2042 2045 2054 2064 2066 2069 2078 2087 2090 2099
2108 2111 2120 2129 2132 2141 2152 2160 2168 2174 2183 2189 2197 2200
2205 2214 2224 2233 2243 2254 2260 2270 2281 2293 2299 2308 2318 2329
2340 2348 2356 2371 2377 2386 2396 2402 2410 2420 2426 2436 2452 2469
2482 2490 2492 2503 2514 2522 2529 2535 2543 2549 2556 2567 2578 2589
2598 2608 2624 2634 2645 2660 2669 2679 2690 2698 2707 2721 2727 2737
2748 2754 2763 2772 2778 2789 2804 2820 2832 2840 2842 2852 2863 2878
2880 2882 2897 2908 2918 2920 2924 2926 2937 2943 2953 2959 2971 2977
2988 3004 3010 3012 3023 3029 3031 3033 3043 3049 3051 3053 3063 3069
3071 3081 3087 3089 3094 3096 3107 3121 3127 3129 3131 3141 3152 3165
3167 3171 3173 3175 3188 3195 3197 3199 3201 3213 3224 3232 3242 3249
3261 3277 3292 3303 3314 3318 3320 3330 3345 3356 3370 3385 3398 3406
3408 3418 3424 3434 3445 3456 3460 3462 3473 3489 3501 3514 3530 3542
3550 3552 3563 3569 3580 3591 3602 3604 3606 3612 3620 3627 3637 3645
3653 3660 3662 3664 3669 3677 3686 3688 3695 3697 3699 3704 3706 3708
3721 3724 3730 3733 3738 3740 3748 3763 3769 3771 3773 3775 3780 3782
3784 3786 3790 3793 3796 3799 3801 3803
LDMAR 659 816 822 859 911 948 999 1035 1066 1100 1131 1165 1196 1230
1261 1532 1553 1628 1675 1714 3690
LDMARX 660 1715
LDMEM 662 817 860 877 949 965 1036 1050 1101 1115 1166 1180 1231 1245
1538 1631 1645 1716 2889 3691
LORB 652 3613 3646 3670
LORBR 693 702 731
LORCB 1379 1408 1444 3630
MOV 658 665 669 685 707 725 750 752 754 1729 1734 1752 1753 3750
3752 3754 3756 3758 3759
MOVB 619 633 635 637 639 647 653 664 666 675 682 686 696 721
726 733 736 741 747 751 753 779 781 782 784 801 803 821
823 910 998 1065 1130 1195 1260 1374 1375 1377 1390 1404 1406 1420
1421 1438 1439 1440 1442 1474 1488 1501 1534 1555 1556 1557 1575 1577
1578 1599 1600 1630 1674 1720 1722 1723 1724 1726 1728 1730 1731 1733
1735 1739 1742 1744 1783 1812 1815 1817 1819 1851 1867 1868 1870 1872
1915 1917 1919 1937 1973 1975 1976 1977 1994 1996 1999 2002 2018 2020
2023 2026 2044 2063 2065 2067 2068 2086 2088 2089 2107 2109 2110 2128
2130 2131 2161 2175 2190 2201 2226 2262 2301 2349 2363 2378 2403 2427
2442 2458 2489 2491 2493 2494 2523 2536 2550 2579 2581 2615 2652 2699
2714 2728 2755 2779 2795 2810 2839 2841 2843 2844 2879 2881 2883 2885
2886 2919 2921 2923 2925 2927 2944 2960 2962 2978 2995 3011 3013 3030
3032 3034 3050 3052 3054 3070 3072 3088 3090 3092 3095 3097 3128 3130
3132 3166 3168 3170 3172 3174 3176 3177 3178 3196 3198 3200 3202 3203
3204 3233 3250 3251 3315 3317 3319 3321 3323 3405 3407 3409 3410 3425
3426 3457 3459 3461 3463 3465 3549 3551 3553 3554 3570 3571 3603 3605
3607 3609 3628 3661 3663 3665 3666 3687 3689 3696 3698 3700 3705 3707
3709 3713 3714 3715 3716 3722 3725 3731 3734 3739 3741 3749 3751 3753
3755 3757 3764 3770 3772 3774 3776 3781 3783 3785 3787 3792 3795 3798
MOVMEM 663 744 824 861 878 912 950 966 1000 1037 1051 1067 1102 1116
1132 1167 1181 1197 1232 1246 1262 1632 1646 1676 3723 3732 3760 3761
3762
NAME 2# 2
NOP 1852 1873 1978 2379 2428 2729 2780 2887 2928 2945 2963 2979 2996 3035
3055 3234
OSB 716
OSM 865 881 897 916 954 969 985 1004 1039 1053 1069 1104 1118 1134
1169 1183 1199 1234 1248 1264 1301 1312 1323 1334 1345 1539 1561 1582
1634 1648 1662 1678 1754 1757 1760 2890
REPEAT 494# 840 929 1017 1082 1147 1212 1277 1353 1454 1512 1609 1691 1793
1886 2144 2203 2332 2506 2559 2682 2855 2900 3144 3216 3295 3437 3583
3680
RETURN 644 654 676 683 687 697 703 710 718 722 734 760 764 774
3692 3701 3710 3717 3726 3735 3742 3765 3777 3788
SHL 711 1476 1490 1503 1823 1838 1854 1875 1923 1941 1958 1980 2004 2028
2048 2072 2093 2114 2135 2163 2177 2192 2365 2414 2475 2496 2583 2617
2654 2741 2930 2947 2965 2981 2998 3016 3037 3057 3075 3100 3115 3135
3180 3206 3236 3254 3269 3285 3495
SHR 621 625 626 628 643 670 1392 1393 1423 1424 2237 2247 2248 2274
2285 2286 2312 2322 2323 2444 2460 2461 2602 2638 2673 2701 2731 2757
2782 2812 3364 3391 3392 3467 3481 3522 3536 3556 3573
TEST 794# 795 843 932 1020 1085 1150 1215 1280 1356 1457 1515 1612 1694
1796 1889 2147 2209 2335 2509 2562 2685 2858 2903 3147 3219 3298 3440
3586
.ECRAM 583# 3790
.END 4697
.INIT 613
.LOC 2207
.MEM 3805