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Trailing-Edge - PDP-10 Archives - klad_sources - klad.sources/mcdxdt.mac
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	XLIST
EDIT=0
VERSION=1

DEFINE	NAME	(EDT,VER),<
	LALL
	LIST




TITLE	MCDXD	DX20-V100 MAGTAPE SUBSYSTEM MICRODIAGNOSTIC VERSION EDT'.'VER





>

NAME	\EDIT,\VERSION




	COMMENT	$

	MCDXD IS A MICRODIAGNOSTIC WHICH IS RUN UNDER CONTROL OF 'DFDXD',
THE DX20-V100 MAGTAPE SUBSYSTEM DIAGNOSTIC.  FIRST IT CHECKS THAT ALL TAG
OUT LINES DROP AFTER A DX20 RESET AND THAT ALL TAG IN LINES DROP AFTER A
SYSTEM RESET.  THEN IT CHECKS FOR CORRECT 'SEL OUT' PROPAGATION AND CORRECT
'OPL IN' RESPONSE TO AN INITIAL SELECTION SEQUENCE.  A TEST I/O COMMAND
IS EXECUTED TO DEVICE ADDRESS 0.  PROPER TAG IN RESPONSES ARE CHECKED FOR
AT EACH STEP OF EXECUTION.  FINALLY, A SENSE COMMAND IS EXECUTED TO THE DEVICE
ADDRESS WHICH IS SUPPLIED BY THE HOST VIA GP REGISTERS.  THE SENSE BYTES
ARE EXAMINED FOR EXPECTED DATA.  IF ANY ERRORS ARE DETECTED, THE NEXT DEVICE ADDRESS IS REQUESTED FROM
THE HOST.  ELSE, THE CORRECT SENSE DATA IS TRANSMITTED BACK TO THE HOST
VIA THE GP REGISTERS.

$
	RPTCNT=	100			;SET REPEAT COUNT TO 100 TIMES
	SUBTTL	CHANNEL BUS INTERFACE REGISTER BIT DEFINITIONS

;DEFINE CHANNEL BUS INTERFACE REGISTERS

CSR0=0				;CONTROL AND STATUS REGISTER 0 (READ/WRITE CLEAR)
CSR1=1				;CONTROL AND STATUS REGISTER 1 (READ/WRITE)
TOR0=2				;TAG OUT REGISTER 0 (READ/WRITE)
TOR1=3				;TAG OUT REGISTER 1 (READ/WRITE)
TAGIN0=4			;TAG IN REGISTER 0 (READ ONLY)
TAGIN1=5			;TAG IN REGISTER 1 (READ ONLY BITS 7-4)
SPADR=5				;SCRATCH PAD ADDRESS REGISTER (READ/WRITE BITS 3-0)
DRLO=6				;DATA REGISTER 0 (READ ONLY)
CBILO=7				;BUS IN REGISTER 0 (READ ONLY)
SPDALO=10			;SCRATCH PAD DATA REGISTER 0 (WRITE ONLY)
BORLO=11			;BUS OUT REGISTER 0 (WRITE ONLY)
DRHI=12				;DATA REGISTER 1 (READ ONLY)
CBIHI=13			;BUS IN REGISTER 1 (READ ONLY)
SPDAHI=14			;SCRATCH PAD DATA REGISTER 1 (WRITE ONLY)
BORHI=15			;BUS OUT REGISTER 1 (WRITE ONLY)
CUSTAT=16			;CONTROL UNIT RESET STATUS REGISTER (WRITE ONLY)

;REGISTER BIT DEFINITIONS

;CSR0

;READ ONLY BITS

EXFER=1B28			;END XFER
TIMOUT=1B29			;TIME OUT FLAG
DPPE=1B30			;DP PE FLAG
UBPE=1B31			;UB PE FLAG
MKPE=1B32			;MK PE FLAG
BUS1PE=1B33			;BUS1 PE FLAG
BUS0PE=1B34			;BUS0 PE FLAG
SLVSEL=1B35			;SLVE SEL

;WRITE ONLY BITS

CLRFLG=1B34			;CLEARS ALL FLAGS
CSLVSL=1B35			;CLEARS "SLVE SEL"

;CSR1

SPEN=1B28			;SP ENABLE
DIHISP=1B29			;DIAG HIGH SPEED
EVPAR=1B30			;EVEN PAR
EXTBUS=1B31			;EXTENDED BUS
MOD360=1B32			;360 MODE
LOOPEN=1B33			;LOOP ENABLE
ONLINE=1B34			;ON LINE
CHANL=1B35			;CHANNEL MODE

;TOR0

SRVOUT=1B28			;TOR SRV OUT
CLKOUT=1B29			;TOR CLK OUT
MTROUT=1B30			;TOR MTR OUT
ADROUT=1B31			;TOR ADR OUT
HLDOUT=1B32			;TOR HLD OUT
TMREN=1B33			;TIMER INTERRUPT ENABLE
SELOUT=1B34			;TOR SEL OUT
CMDOUT=1B35			;TOR CMD OUT

;TOR1

OPLOUT=1B28			;TOR OPL OUT
CURSEN=1B29			;ENABLE CU RESET
SUPOUT=1B30			;TOR SUP OUT
DATOUT=1B31			;TOR DAT OUT
DISACK=1B32			;DIAG SLVE ACK
DIMUX=1B33			;DIAG MUX BIT
TODOUT=1B34			;TO DAT OUT
TOSOUT=1B35			;TO SRV OUT

;TAGIN0

OPLIN=1B28			;TI OPL IN
MK0IN=1B29			;TI MK 0 IN
MK1IN=1B30			;TI MK 1 IN
ADRIN=1B31			;TI ADR IN
TOHOUT=1B32			;TO HLD OUT
MTRIN=1B33			;TI MTR IN
SELIN=1B34			;TI SEL IN
STAIN=1B35			;TI STA IN

;TAGIN1

SRVIN=1B28			;TI SRV IN
DISIN=1B29			;TI DIS IN
REQIN=1B30			;TI REQ IN
DATIN=1B31			;TI DAT IN

;SPADR

SPABTS=17B35			;SP ADDR BITS

;CUSTAT

SELRST=1B33			;SEL RESET
SYSRST=1B34			;SYS RESET
HALTIO=1B35			;HALT I/O

;SENSE BYTE BIT DEFINITIONS

TUSTA=1B29			;TU STATUS A
WRSTA=1B33			;WRITE STATUS
NEWSUB=1B29			;NEW SUBSYSTEM

;CHANNEL BUS COMMANDS

SENSE=4				;SENSE COMMAND