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klad.sources/dbkahm.mac
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SUBTTL MACRO'S OPDEFS AND SPECIAL FLAG DEFINITIONS
LALL
LAST=774 ;LAST POSSIBLE DEVICE
;OPERATOR DEFINITIONS
OPDEF TRPPI [JSR TRAPPI] ;FILL INTERRUPT LOCATIONS
OPDEF HALTPI [JSR HALTPI] ;FILL INT. LOC. WITH HALTS
OPDEF CLRTRP [JSR TRPCLR] ;CLEAR TRAPS
;MACROS
DEFINE BLURB <
;LOCATIONS 40-60 CONTAIN A JSP TO A ROUTINE WHICH STORES
;THE CHANNEL NUMBER OF THE INTERRUPT INTO 0
;THEREFORE IF AN INTERRUPT OCCURS THEN LOCATION
;ZERO WILL CONTAIN THE NUMBER OF THE INTERRUPT CHANNEL TRAP ADRESS
>
DEFINE BLURB1 <
;LOCATIONS 40-60 CONTAIN A JSP TO A ROUTINE WHICH EXECUTES A HALT
;POINTING TO THE CHANNEL WHICH CAUSED THE REQUEST.
;OR THE CHANNEL WHICH CAUSED THE INCORRECT INTERRUPT. THE PARTICULAR
;INTERRUPT TRAP ADRESS FOR THE INTERRUPT LEVEL BEING TESTED MAY NOT
;ALWAYS HAVE A JSP TO A HALT IN CASE WE ARE TESTING FOR REAL
;INTERRUPTS ON THAT CHANNEL. IN THIS CASE ONLY THE TRAP FOR THAT
;PARTICULAR CHANNEL WILL BE LEGAL. ALL OTHERS WILL HALT.
>
DEFINE CLRAPR <CONO APR,IOCLR!ITMDIS!IASRTC!CLKDIS!CLKCLR!IIOPFC!INXCLR>
DEFINE CLRAP1 <CONO APR,IOCLR!ITMDIS!IASRTC!CLKDIS!IIOPFC!INXCLR>
DEFINE CLRPI <CONO PI,PWFCLR!PARCLR!PARDIS!IRQCLR!PICLR!CHNOFF!PIOFF!177>
DEFINE WATINT <
MOVEI 13,10 ;SET UP LOOP OF TEN TO WAIT FOR INT.
SOJG 13,. ;AND WAIT>
DEFINE STOP2<
HALT .+1 ;HALT IF WE SHOULDN'T BE HERE
JRST .+1 ;WILD TRANSFER CAUSED THIS HALT.>
DEFINE TSET<
%X=. ;DEFINE %X TO SAVE
MOVEI %X ;SAVE THIS PC IN CASE OF WILD TRANSFER
MOVEM TNUMB# ;BECAUSE OF PC MOD OR INTERRUPT>
DEFINE TGET<
MOVE TNUMB ;GET LAST PC STORED AND CHECK TO SEE
CAIE %X ;IF ITS WHERE WE REALLY SHOULD BE
STOP2>
DEFINE TBOTH<
TGET
TSET>
DEFINE PINO (A,%NO)<
;ENABLE THE PI SYSTEM. AND EXPECT NO INTERRUPTS. THEN TEST THAT THE
;HOLD FLOP FOR EACH CHANNEL IS NOT SET.
TSET
%NO: CLRBTH
CONO PI,PION ;ENABLE PI AND ,EXPECT NO INTERRUPTS
WATINT
CONSZ PI,A ;CHECK WHY INT. IN PROGRESS IS SET.
STOP
TGET
>
DEFINE PIYES (A,B,%YES)<
;SET REQUESTS FOR EACH CHANNEL BUT DO NOT SET PI ACTIVE.
;INTERRUPTS SHOULD NOT OCCUR, AND THE INTERRUPT IN PROGRESS
;FLAG SHOULD NOT BE SET FOR THE CHANNEL BEING TESTED
TSET
%YES: CLRBTH
CONO PI,REQSET+A ;SET CHANNEL REQUEST BUT NOT ACTIVE
WATINT
CONSZ PI,B ;CHECK WHY INT. IN PROGRESS IS SET.
STOP
TGET
>
DEFINE PIHCLR (A,B,%HCLR)<
;CHECK THAT PICLR CLEARS THE HOLD FLOP
TSET
%HCLR: CLRBTH
CONO PI,REQSET+PION+A ;CAUSE INT. TO SET HOLD
WATINT
CONO PI,PICLR ;THEN CLEAR VIA PI RESET
CONSZ PI,B ;HOLD FLOP FAILED TO CLEAR.
STOP
TGET
>
DEFINE PIONOF (A,%ONOF)<
;CHECK THAT PICLR CLEARS THE REQUEST FLOP
;AND THAT AN INTERUPT DOES NOT OCCUR
BLURB1
TSET
%ONOF: CLRBTH
CONO PI,REQSET+A ;SET REQ. BUT NOT ACTIVE
SETZ ;THEN CLEAR REQUEST THEN SET ACTIVE
CONO PI,PICLR+A ;PI RESET FAILED TO CLEAR PIR FLAG.
WATINT
SKIPE ;MOVEI EXEC OUT OF INTERRUPT CH.?
STOP
TGET
>
DEFINE PIDIS (A,B,%PICHK)<
;CHECK THAT A JEN WILL DISMISS INTERUPTS ON ALL CHANNELS
TSET
%PICHK: MOVE [JSP 1,.+6] ;PUT THE PI TRAP INSTRUCTION
MOVEM A ;INTO A
CONO PI,CHNON+PION+REQSET+B ;TURN ON PI AND REQEST ON CH B
WATINT
JRST .+3
CONO PI,CHNON+PION+IRQCLR+B ;TURN OF INTERRUPT REQUEST
JEN @1 ;DISMISS THE INTERRUPT
CONSZ PI,77400 ;NO REQUESTS SHOULD BE SET
STOP
TGET
CLRBTH
>
DEFINE PITEST (A,%PITST)<
;TEST SETTING OF CHANNEL FLOP
TSET
%PITST: CLRBTH
CONO PI,CHNON+A ;PION FAILED TO SET
CONSO PI,A
STOP
TBOTH
CLRBTH
;TEST CLEARING OF CHANNEL FLOP
CONO PI,CHNON+A ;CHECK PIO CLR
CONO PI,CHNOFF+A ;TURN OFF CHANNELS
CONSZ PI,A ;CHECK WHY FLOP NOT CLEAR
STOP
TBOTH
CLRBTH
;CHECK RESETING OF PI SYSTEM
CONO PI,CHNON+A ;CHECK THAT PI RESET CLEARS
CONO PI,PICLR ;PI SYSTEM
CONSZ PI,A
STOP
TBOTH
CLRBTH
;TEST THAT CONO ONLY SETS PION
CONO PI,CHNON ;TEST PIO SET
CONSZ PI,A ;CHECK WHY CONO SET FLAGS WHITHOUT AN IOB BIT
STOP
TBOTH
CLRBTH
;CHECK THAT CONO DOES NOT CLEAR ACTIVE
CONO PI,CHNON+A ;TEST PIO CLR
CONO PI,CHNOFF ;MAYBE RESET OCCURED - BIT SHOULD STILL
CONSO PI,A ;BE SET
STOP
TGET
>
DEFINE EXECUT<
;FILL THE INTERRUPT LOCATIONS WITH "MOVEI'S"
MOVE 1,[MOVEI 42] ;STORE A MOVEI IN
MOVEM 1,(1) ;INTO 42-60
CAME 1,[MOVEI 57]
AOJA 1,.-2 ;LOOP>
DEFINE STOP<
HALT .+1 ;INSTRUCTION FAILED REPLACE
JRST .+1 ;WITH JRST BACK>
DEFINE STOP1<
HALT .+1 ;UUO FAILED TO STORE MA BITS
JRST .+1 ;INTO RIGHT HALF OF 40>
DEFINE XUUO (X,Y,%XUO)<
;EXECUTE AN LUUO AND CHECK THAT THE UUO AND PC STORED
;ARE CORRECT.
MLUUO==X ;THE UUO TO BE EXECUTED
TSET
%XUO: MOVE 0,[JSP 1,.+4] ;TRAP INSTRUCTION
MOVEM 0,41 ;IN TO 41
X ;EXECUTE A UUO
HALT .+1 ;UUO DID NOT TRAP TO FORTY
MOVEI 2,.-1 ;GET UUO PC
ANDI 1,-1 ;MASK FLAGS OUT
CAME 1,2 ;PC CORRECT ?
HALT .+1 ;PC OF UUO NOT = TO PC STORED
MOVE 0,40 ;GET UUO !
CAME 0,[X!0] ;CORRECT UUO STORED IN 40?
SKIPA ;NO
JRST Y ;TESTS OK !
STOP1
TGET
>
DEFINE XUUOA (X,%UUPC,%XUPC0,%XUPC1)<
;CHECK THE "E" OF THE UUO STORED IS CORRECT.
EFIELD==X ;"E" WE ARE TESTING FOR
TSET
%UUPC: MOVE [JRST .+4] ;SET A TRAP INSTRUCTION
MOVEM 41 ;INTO 41
1B8!X ;EXECUTE A UUO
%XUPC0: HALT .+1 ;UUO DIDN'T TRAP TO 40
MOVE 0,40 ;GET UUO
ANDI 0,-1 ;MASK OUT UUO FOR MA BITS
CAIE X ;MA BITS CORRECT?
%XUPC1: STOP1
TGET
>
DEFINE CLRBTH<
CLRAPR
CLRPI>
DEFINE CLRBT1<
CLRAP1
CLRPI>
DEFINE TRAP (A,B)<
MOVE [A] ;SET TRAP INSTRUCTION
MOVEM B ;INTO TRAP LOCATION>
DEFINE STUCK<
WATINT
JRST . ;LOOOP ON SELF>
DEFINE CLKWT (A,%CLKUP)<
%CLKUP: CONSO CLK ;WAIT FOR CLOCK
JRST .-1 ;NOT READY!
CONO CLKENB+A ;SET CLOCK ENABLE AND PI CHANNEL
STUCK>
DEFINE TRPCHK (%TPC)<
%TPC: SKIPE MONFLG ;RESET FLAGS IF IN MONITOR
JRST .+3 ;DONT IF STAND ALONE
JRSTF @.+1 ;AND RESTORE THEM
USERF,.+1 ;NEW PC AND FLAGS>
DEFINE XCHN2 (A,B,C)<
;REQUEST INTERRUPTS ON 2 CHANNELS AT ONCE TO SEE IF THEY TRAP
;TO THE CORRECT (I.E. HIGHEST PRIORITY) CHANNEL.
;IF ERROR OCCURS CHECK "PIN" PRINT
TRPCHK
CLRBTH
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSP A] ;SET UP FOR CORRECT
MOVEM B ;INTERRUPT TRAP
CONO PI,CHNON!PION!177 ;TURN ON PI SYSTEM
CONO PI,REQSET!C ;REQUEST INTERRUPT ON TWO CHANNELS
STUCK
>
DEFINE PSKPA (A,B,%X)<
;TEST THAT AOSE DOES NOT DISMISS INTERRUPTS, OR SKIP WHEN EXECUTED AS
;AN INTERRUPT INSTRUCTION.
CLRBTH
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [AOSE 0] ;PI TRAP INSTRUCTION
MOVEM A ;INTO TRAP LOCATION
MOVE [JSP 1,%X] ;SECOND TRAP INSTRUCTION
MOVEM A+1 ;INTO SECOND PI INSTRUCTION
MOVEI 1 ;SET AC TO NON ZERO
CONO PI,REQSET!PION!CHNON!B ;REQUEST INTERRUPT ON CH B
;IF WE FALL THROUGH THEN THE INTERRUPT WAS DISMISSED WHEN THE AOS FAILED
WATINT
STOP
%X: CLRBTH
CAIE 2 ;ONLY ONE AOSE PREFORMED?
STOP
>
DEFINE PSKPB (A,B,%X)<
;CHECK THAT SKIPE DOES NOT SKIP, OR MODIFY THE AC, OR DISMISS
;THE INTERRUPT.
CLRBTH
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [SKIPE 0,0] ;PI TRAP INSTRUCTION(SHOULD NOT SKIP)
MOVEM A ;INTO TRAP LOCATION
MOVE [JSP 1,%X] ;SECOND TRAP INSTRUCTION
MOVEM A+1 ;INTO SECOND PI INSTRUCTION
MOVEI 1 ;SET AC TO NON ZERO
CONO PI,REQSET!PION!CHNON!B ;REQUEST INTERRUPT ON CH B
;IF WE FALL THROUGH TO HERE, THEN THE INT. WAS DISMISSED AND SHOULDN'T HAVE BEEN
WATINT
STOP
%X: CLRBTH
CAIE 1 ;JUMPE SHOULD HAVE NOT MODIFIED THE AC
STOP
>
DEFINE FMUUO (A,%FMTST,%NOFM),<
;EXECUTE UUO'S OUT OF FAST MEMORY LOCATIONS 0,1,2,4,5,10,12, AND 17
;CHECK FIRST THAT THE UUO TRAPPED AND SECONDLY THAT IT STORED THE
;CORRECT PC.
AC=A ;TESTED AC
TSET
MOVE A,[XWD 1000,0] ;SET UP UUO INTO AC A TO EXECUTE
MOVE 13,[JSP 11,%FMTST] ;SET UP UUO TRAP INSTRUCTION
MOVEM 13,41 ;INTO LOCATION 41
MOVE A+1,[JRST %NOFM] ;SET UP TRAP INSTRUCTION INCASE UUO DOES NOT TRAP
JRST A ;GO EXECUTE UUO
%NOFM: HALT .+1 ;UUO DID NOT TRAP FROM FAST MEMORY
JRST .+1 ;LOOP TO %FMUUO IF ERROR
%FMTST: ANDI 11,-1 ;MASK FLAGS
CAIE 11,A+1 ;PC STORED SHOULD = A +1
STOP
TGET
>
DEFINE INDPI (A,B,%XX),<
;GET OURSELVES INTO A TIGHT INDIRECT LOOP.
;AND SEE IF WE ARE ABLE TO INTERRUPT OUT OF IT.
;THE LOOP IS DONE TEN TIMES. EACH TIME THE INTERRUPT IS DISMISSED AND
;WE WILL RETURN TO THE "JRST @." INSTRUCTION.
TSET
MOVEI 10,^D10 ;TIMES TO DO THIS TEST
MOVEM 10,COUNTX# ;STORE IT
MOVE 10,[JSP 1,%XX] ;INTERRUPT TRAP INSTRUCTION
MOVEM 10,A ;STORE FOR INTERRUPT REQUEST
CLRBT1
CONO PI,2377 ;TURN ON PI AND CHANNELS
CONO APR,CLKENB+B ;ENABLE CLOCK,CLEAR CLOCK FLAG,ENABLE CH B
JRST @. ;LOOP
HALT .+1 ;ERROR IF HERE (GOT OUT OF INDIRECT LOOP)
%XX: TGET
ANDI 1,-1 ;MASK PC BITS
CAIE 1,%XX-2 ;WAS CORRECT PC STORED?
STOP
SOSE COUNTX ;LOOP TEST
JEN @1 ;DISMISS INTERRUPT
CLRBTH
>
SUBTTL IOT TESTING
;THIS ROUTINE CHECKS THE CPU FOR BEING A KI10
;IF THE CPU IS A 166(PDP-6) OR A KA10 THE PROGRAM WILL
;HALT OTHERWISE IT WILL CONTINUE.
IOTXXX: SETOM ITERAT# ;INITIAL ITERATION COUNTER [-1]
JFCL 17,.+1 ;CLEAR ALL FLAGS
JRST .+1 ;TRY TO SET PC CHANGE(PDP-6)
JFCL 1,PDP6 ;IS IT THERE?(GO TO A HALT)
MOVNI 1 ;SET UP FOR AOBJN
AOBJN .+1 ;IF AC=0 THEN KI-10
JUMPE IOTXX ;IF BIT 17 SET THEN KA-10
KA10: HALT . ;THIS IS A KA10
PDP6: HALT . ;THIS IS A PDP-6 (166)
;IF IOT HANGS - CHECK ARRT AND ARLT CLR
;AND OR AR SIGN SMEAR..
;TEST THE IOT'S
IOTXX:
IOT0: JSR TRPSET ;FILL THE TRAP LOCATIONS
SETO 1, ;THE IOTS FAIL
DATAI 1 ;TO STORE C(E)
CONI 1 ;CHECK IR DECODE
CAMN 1,[-1] ;IR IOT ,IOT0-T9 ,ET2
STOP
IOT1: MOVE 1,[123456654321] ;CHECK DATAI STORING C(E)
DATAI 1 ;CONTENTS OF LOC 1
CAMN 1,[123456654321] ;NOT MODIFIED
STOP
IOT2: MOVE 1,[123456654321] ;CHECK CONI STOR THE CONTENTS OF "E" NOT SET OR
CONI 1 ;SAC INH NOT SET - CONTENTS OF LOC 1
CAMN 1,[123456654321] ;NOT MODIFIED
STOP
IOT3: SETO ;CHECK SAC INH FOR
CONI 1 ;CONI LOC 0
CAME [-1] ;MODIFIED
STOP
IOT4: CONO LAST,0 ;CLEAR LAST DEV (774)
CONI LAST,2
CAIN 2,2 ;IOT GOT E OF LAST INST.
STOP
IOT5: DATAO LAST,[0] ;AR CLR FAILED ON
DATAI LAST,3 ;DATAI
CAIN 3,3 ;GET E AS DATA
STOP
TSET
IOT6: SETZ ;CONSZ FAILED TO SKIP
CONSZ ;CHECK PC CLOCK ENABLE AND AD=0 ON IOT CONSZ
STOP
TBOTH
IOT7: CONO LAST,0 ;CONSZ FAILED TO SKIP
CONSZ LAST,700000 ;CHECK PC CLK EN AT ET2 ON IOT CONSZ
STOP
TBOTH
IOT8: CONO LAST,0 ;CONSO SKIPPED CHK PC CLK EN(0)
CONSO LAST,0 ;AD=0, IOT CONSO
SKIPA ;IOT CONSZ
STOP
TBOTH
IOT9: SETZ 1, ;CHK AD+1 TO BOTH ON IOT
BLKO LAST,1 ;BLK, IF C(E)=0 THEN AD+1
SKIPA ;BOTH OR ARFMAD(1) FAILED
JFCL ;IF IR 12 FAILED TO SET
CAME 1,[XWD 1,1] ;PROGRAM BLOWS MIND
STOP
TBOTH
IOT10: JFCL
TBOTH
IOT11: SETZ 1, ;BLKO PC CLK EN AT ET2 FAILED
BLKO LAST,1 ;BLKO SHOULD SKIP
STOP
TBOTH
IOT12: SETO 1, ;BLKO PREFORMED A SKIP
BLKO LAST,1 ;PC CLK EN ASSERTED?
SKIPA
STOP
IOT13: JUMP .+1 ;NEVER DO 13
IOT14: CONO PI,10000 ;CLR PI SYSTEM
CONO 77 ;SET SOME CPA BITS
CONI 0 ;IF FAILED EITHER CONO FAILED
SKIPN 0 ;IO SET OR CONI FAILED READ
STOP
;OR ARRT OR ARLT EN OR AR SIGN
;SMEAR OR CPA SELECT NOT ASSERTED
SUBTTL TEST APR FLAGS
IOT15: CONO ;APR CLOCK PIA FAILED EITHER
CONO 1 ;TO SET OR BE READ
CONI ;CHECK APR PIA 35 CLOCK
TRNN 1
STOP
IOT15A: CONO ;APR CLOCK PIA FAILED EITHER
CONO 2 ;TO SET OR BE READ
CONI ;CHECK APR PIA 34 CLOCK
TRNN 2
STOP
IOT16: CONO ;APR CLOCK PIA FAILED EITHER
CONO 4 ;TO SET OR BE READ
CONI ;CHECK APR PIA 33 CLOCK
TRNN 4 ;
STOP
IOT16A: CONO ;APR ERROR PIA FAILED EITHER
CONO 10 ;TO SET OR BE READ
CONI ;CHECK APR PIA 32 ERROR
TRNN 10
STOP
IOT17: CONO ;APR ERROR PIA FAILED EITHER
CONO 20 ;TO SET OR BE READ
CONI ;CHECK APR PIA 31 ERROR
TRNN 20
STOP
IOT17A: CONO ;APR ERROR PIA FAILED EITHER
CONO 40 ;TO SET OR BE READ
CONI ;CHECK APR PIA 30 ERROR
TRNN 40
STOP
IOT18: CONO 1 ;APR PIA 35 CLOCK
CONO ;FAILED TO CLEAR
CONI
TRNE 1
STOP
IOT19: CONO 2 ;APR PIA 34 CLOCK
CONO ;FAILED TO CLEAR
CONI
TRNE 2
STOP
IOT20: CONO 4 ;APR PIA 33 CLOCK
CONO ;FAILED TO CLEAR
CONI
TRNE 4
STOP
IOT21: CONO 10 ;APR PIA 32 ERROR
CONO ;FAILED TO CLEAR
CONI
TRNE 10
STOP
IOT22: CONO 20 ;APR PIA 31 ERROR
CONO ;FAILED TO CLEAR
CONI
TRNE 20
STOP
IOT23: CONO 40 ;APR PIA 30 ERROR
CONO ;FAILED TO CLEAR
CONI
TRNE 40
STOP
TBOTH
IOT24: CONO 7 ;SET SOME FLAGS
CONSO ;CONSO FAILED CK PC CLOCK ENABLE
SKIPA ;INH
STOP
TBOTH
IOT25: CONO 7 ;SET SOME FLAGS
CONSO 7 ;CONSO FAILED CH PC CLOCK ENABLE
STOP
TBOTH
IOT26: CONO 7 ;CONSZ FAILED
CONSZ 7 ;CK PC CLOCK ENABLE IF AD=0
SKIPA ;AND IOT TIME
STOP
TBOTH
IOT27: CONO CLKDIS ;DISABLE CLOCK THEN ENABLE
CONO CLKENB ;FAILS IF CLOCK ENABLE NOT SET.
CONSO 2000 ;SET
STOP
IOT28: CONO 2000 ;CK CLK EN FOR NOT
CONO 4000 ;CLEARING
CONSZ 2000
STOP
;THE NEXT TWO TESTS ARE NOT DONE IF WE ARE DOING
;MARGINS, BECAUSE THE DATAO IN THE NEXT TEST WILL CLEAR
;THE MARGIN WORD, AND THE TEST FOLLOWING MAY NOT BE ASSURED
;THAT THE CONSOLE SWITCHES 30-35 WILL BE = 0
IOT29: SKIPE MARGIN ;ARE DOING MARGINS?
JRST IOT31A ;YEP SKIP THIS
SETZ ;SO THE "DATAO" SENDS ZERO'S
CONO APR,77 ;SET SOME BITS
DATAO APR,0 ;TRY TO CLEAR VIA DATAO
CONSO APR,77 ;BITS SHOULD STILL BE SET
STOP
IOT30: CONO APR,77 ;SET SOME CPA BITS
DATAI APR,0 ;GET DATA SWITCHES
TRNE 0,77 ;DATAI DECODED AS CONI
STOP
IOT31A: TBOTH
IOT31: JRSTF @.+1 ;SET BIS FLAG VIA JRSTF
BIS,.+1 ;BYTF6 AND NEW PC
DATAO LAST, ;TRY TO CLEAR BIS FLAG VIA DATAO
JSP .+1 ;GET CPU FLAGS(BIS) SHOULD BE CLEAR
TLNE BIS ;AT ET2 OF THE IOT
STOP
TGET
IOT32: JFCL
IOT33: CONSO CLK ;WAIT FOR CLOCK FLAG
AOJA .-2
CONI ;CHECK WHY CLOCK
TRNN CLK ;FLAG NOT SET
STOP
;THIS TEST WILL FAIL IF IN MAINTAINENCE MODE OR IF MAINT MODE UN-
;DETECTABLE VIA APR CONI.. IF MAINT MODE IS SET THE ROUTINE SHOULD BE
;COMPLETLY BYPASSED IF THE ROUTINE FAILS THEN YOU SHOULD CHECK
;THAT MAINT MODE IS SET OR THE CLOCK FLAG IS NOT CLEAR
CONI APR,15 ;GET APR FLAGS
TLNE 15,IMAINT ;IN MAINT MODE?
JRST IOT33B ;SKIP THIS TEST
IOT33A: CONSO CLK ;CHECK WHY CLOCK
JRST .-1 ;FLAG NOT CLEAR
CONO CLKCLR ;AT CONI TIME
CONI
TRNE 1000
STOP
SUBTTL TEST PI FLAGS
IOT33B: CONO 7 ;CONO PI MODIFIED
CONO PI,0 ;CPU AS A DEVICE
CONSO 7 ;CPA SELECT IS CONFUSED
STOP
CONO 0 ;RESET BITS
IOT34: CONO PI,200 ;CHK WHY PI ON
CONI PI, ;FLOP NOT SET
TRNN 200
STOP
IOT35: CONO PI,200 ;CHK WHY PI ON
CONO PI,400 ;NOT CLEARED
CONI PI, ;
TRNE 200
STOP
IOT36: CONO PI,40000 ;CHK WHY APR PAR ERROR
CONI ;ENABLE NOT SET
TRNN 100000
STOP
IOT37: CONO PI,100000 ;CHK WHY APR
CONI ;PAR ERR ENABLE
TRNE 100000 ;NOT CLEAR
STOP
JFCL
SUBTTL BASIC PI SYSTEM TESTING
;BEGIN TESTING THE PI SYSTEM
BLURB
;AND THE PROGRAM WILL HALT POINTING TO THE INTERUPTED ADRESS.
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
IOT38: CONO PI,2001 ;PI CHANNEL 7
CONI PI, ;FAILED TO SET
TRNN 1 ;
STOP
IOT39: CONO PI,2001 ;PI CHANNEL 7
CONO PI,1001 ;FAILED TO CLEAR
CONI
TRNE 1
STOP
IOT40: CONO PI,2002 ;PI CHANNEL 6
CONI PI, ;FAILED TO SET
TRNN 2
STOP
IOT41: CONO PI,2002 ;PI CHANNEL 6
CONO PI,1002 ;FAILED TO CLEAR
CONI PI,
TRNE 2
STOP
IOT42: CONO PI,2004 ;PI CHANNEL 5
CONI PI, ;FAILED TO SET
TRNN 4
STOP
IOT43: CONO PI,2004 ;PI CHANNEL 5
CONO PI,1004 ;FAILED TO CLEAR
CONI PI,
TRNE 4
STOP
IOT44: CONO PI,2010 ;PI CHANNEL 4
CONI PI, ;FAILED TO SET
TRNN 10
STOP
IOT45: CONO PI,2010 ;PI CHAN 4
CONO PI,1010 ;FAILED TO CLEAR
CONI PI,
TRNE 10
STOP
IOT46: CONO PI,2020 ;PI CHAN 3
CONI PI, ;FAILED TO SET
TRNN 20
STOP
IOT47: CONO PI,2020 ;PI CHAN 3
CONO PI,1020 ;FAILED TO CLEAR
CONI PI,
TRNE 10
STOP
IOT48: CONO PI,2040 ;PI CHAN 2
CONI PI, ;FAILED TO SET
TRNN 40
STOP
IOT49: CONO PI,2040 ;PI CHAN 2
CONO PI,1040 ;FAILED TO CLR
CONI PI,
TRNE 40
STOP
IOT50: CONO PI,2100 ;PI CHAN 1
CONI PI, ;FAILED TO SET
TRNN 100
STOP
IOT51: CONO PI,2100 ;PI CHAN 1
CONO PI,1100 ;FAILED TO CLEAR
CONI PI,
TRNE 100
STOP
IOTXYZ: JFCL
X=40000
BLURB
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
PIOT00:
REPEAT 7,<
PINO X
X=X_-1
>
JFCL
BLURB
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
X=40000
Y=100
PIOT01:
REPEAT 7,<
PIYES Y,X
X=X_-1
Y=Y_-1
>
JFCL
BLURB
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
X=100
PIOT02:
REPEAT 7,<
PIONOF X
X=X_-1
>
JFCL
BLURB
;TEST THE SETTING AND CLEARING OF THE PI FLOPS WITHOUT CREATING INTERRUPTS
;THE TEST WILL HALT IF AN INTERRUPT OCCURS AND THE CHANNEL NUMBER OF THE
;INTERRUPT WILL BE STORED IN AC0
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
BIGPI1: PITEST 100
BIGPI2: PITEST 40
BIGPI3: PITEST 20
BIGPI4: PITEST 10
BIGPI5: PITEST 4
BIGPI6: PITEST 2
BIGPI7: PITEST 1
BIGPIX: PITEST 177
BIGPIY: PITEST 125
BIGPIZ: PITEST 52
JFCL
BLURB
;CHECK THE SETTING AND CLEARING OF THE HOLD FLOPS
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
X=40000
Y=100
PIOT03: REPEAT 7,<
PIHCLR Y,X
X=X_-1
Y=Y_-1
>
JFCL
SUBTTL INTERRUPT TESTING WITH REAL INTERRUPTS
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CLOCK--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAP1
MOVE [JSP UUO] ;SET TRAP TO HALT
MOVEM 41 ;IN THE UUO TRAP LOCATION
MOVE [JSP TRP0A] ;SET PROPER RECOVERY INST.
MOVEM 42 ;INTO CH1 TRAP
CONO PI,2300 ;TURN ON CHAN1
CONO 2001 ;TURN ON CLOCK AND CHAN
STUCK
TRP0A: TRPCHK
CLRPI
CLRAP1
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CLOCK--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSP TRP1A] ;RECOVERY INSTRUCTION INTO
MOVEM 44 ;PROPER CHAN TRAP (2)
CONO PI,2240 ;TURN CHAN 2 ON
CONO 2002 ;TURN CLOCK AND CHN ON
STUCK
TRP1A: TRPCHK
CLRPI
CLRAP1
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CLOCK--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSP TRP2A] ;RECOVERY INSTRUCTION
MOVEM 46 ;INTO PROPER CHAN TRAP (3)
CONO PI,2220 ;TURN CHAN 3 ON
CONO 2003 ;TURN CLOCK AND CHAN ON
STUCK
TRP2A: TRPCHK
CLRPI
CLRAP1
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CLOCK--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSP TRP3A] ;RECOVERY INSTRUCTION
MOVEM 50 ;INTO PROPER CHAN TRAP (4)
CONO PI,2210 ;TURN CHAN 4 ON
CONO 2004 ;TURN CLOCK AND CHAN ON
STUCK
TRP3A: TRPCHK
CLRPI
CLRAP1
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CLOCK--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSP TRP4A] ;RECOVERY INSTRUCTION
MOVEM 52 ;INTO PROPER CHAN TRAP (5)
CONO PI,2204 ;TURN CHAN 5 ON
CONO 2005 ;TURN CLOCK AND CHAN ON
STUCK
TRP4A: TRPCHK
CLRPI
CLRAP1
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CLOCK--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSP TRP5A] ;RECOVERY INSTRUCTION
MOVEM 54 ;INTO PROPER CHAN TRAP (6)
CONO PI,2202 ;TURN CHAN 6 ON
CONO 2006 ;TURN CLOCK AND CHAN ON
STUCK
TRP5A: TRPCHK
CLRPI
CLRAP1
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
;TEST PROPER TRAP WHEN INTERRUPTING ON EACH CHANNEL
;VIA THE CLOCK--ILLEGAL TRAPS HALT--NO TRAP LOOPS
;THE HALT POINTS TO THE CHANNEL THOUGHT TO BE REQUESTED
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
MOVE [JSP TRP6A] ;RECOVERY INSTRUCTION
MOVEM 56 ;INTO PROPER CHAN TRAP (7)
CONO PI,2201 ;TURN CHAN 7 ON
CONO 2007 ;TURN CLOCK AND CHAN ON
STUCK
TRP6A: TRPCHK
JFCL
SUBTTL INTERNAL INTERRUPT REQUEST TESTING
;CHECK THE ABILITY TO GENERATE PI REQUESTS VIA PROGRAM REQEST ON ALL
;CHANNELS.
JSP .+1 ;GET FLAGS
TLNE USERF ;USER MODE BIT ON
JRST MULTI ;DONT DO IF USER MODE!
CLRBTH
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSP CKI01>,42
CONO PI,6300 ;INTERRUPT ON CH1
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI01: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSP CKI02>,44
CONO PI,6240 ;INTERRUPT ON CH 2
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI02: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSP CKI03>,46
CONO PI,6220 ;INTERRUPT ON CH 3
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI03: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSP CKI04>,50
CONO PI,6210 ;INTERRUPT ON CH 4
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI04: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSP CKI05>,52
CONO PI,6204 ;INTERRUPT ON CH 5
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI05: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSP CKI06>,54
CONO PI,6202 ;INTERRUPT ON CH 6
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI06: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRPI
CLRAPR
TRAP <JSP CKI07>,56
CONO PI,6201 ;INTERRUPT ON CH 7
STUCK
;IF PI HANGS OR BLOWS UP THEN SEE 'PII' PRINT OR 'PIR' PRINT
CKI07: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRTRP
CLRPI
CLRAPR
JFCL
SUBTTL PRIORITY TESTING
;THIS TEST CHECKS TO SEE IF INTERRUPTS RECOGNIZE THE PROPER PRIORITY
;IMPROPER TRAPS WILL HALT - NO TRAPS WILL CAUSE PROGRAM TO HANG
;IF PROGRAM STUCK THEN REPLACE "JRST ." WITH JRST BACK TO MULT7
;IF PROGRAM HALTS THEN REPLACE "JSP" IN INTERRUPT LOCATION
;TO "JSP" TO ROUTINE WHICH CAUSED THE TRAP +1
;FOR EXAMPLE IF ROUTINE TRAPPED TO LOCATION '50' IN 50
;YOU WOULD PUT A JSP 17, TO "MULTX ROUTINE+3
MULTI: CLRBT1
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSP MULT6>,56
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
CLKWT 7
MULT6: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSP MULT5>,54
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
CLKWT 6
MULT5: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSP MULT4>,52
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
CLKWT 5
MULT4: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSP MULT3>,50
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
CLKWT 4
MULT3: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSP MULT2>,46
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
CLKWT 3
MULT2: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSP MULT1>,44
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
CLKWT 2
MULT1: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
TRAP <JSP MULT0>,42
CONO PI,CHNON+PION+177 ;TURN ON PI SYSTEM
CLKWT 1
MULT0: TRPCHK
HALTPI ;FILL INTERRUPT LOCATIONS WITH HALTS
CLRBTH
JFCL
SUBTTL DUAL REQUEST TESTING
;TEST THAT INTERRUPTING ON 2 CHANNELS AT ONCE TRAPS
;TO THE CORRECT TRAP. TEST IS DONE ON ALL POSSIBLE CHANNELS I.E.
;7,1 7,2 7,3 7,4 7,5 7,6 6,1 6,2...ETC
C2A: TSET
XCHN2 C2B,42,101
C2B: TBOTH
XCHN2 C2C,44,41
C2C: TBOTH
XCHN2 C2D,46,21
C2D: TBOTH
XCHN2 C2E,50,11
C2E: TBOTH
XCHN2 C2F,52,5
C2F: TBOTH
XCHN2 C2G,54,3
C2G: TBOTH
XCHN2 C2H,42,102
C2H: TBOTH
XCHN2 C2I,44,42
C2I: TBOTH
XCHN2 C2J,46,22
C2J: TBOTH
XCHN2 C2K,50,12
C2K: TBOTH
XCHN2 C2L,52,6
C2L: TBOTH
XCHN2 C2M,42,104
C2M: TBOTH
XCHN2 C2N,44,44
C2N: TBOTH
XCHN2 C2O,46,24
C2O: TBOTH
XCHN2 C2P,50,14
C2P: TBOTH
XCHN2 C2Q,42,110
C2Q: TBOTH
XCHN2 C2R,44,50
C2R: TBOTH
XCHN2 C2S,46,30
C2S: TBOTH
XCHN2 C2T,42,120
C2T: TBOTH
XCHN2 C2U,44,60
C2U: TBOTH
XCHN2 C2V,42,140
JFCL
C2V: TGET
CLRBTH
SUBTTL BASIC NO-SKIP TESTING
;TEST THE PREFORMANCE OF NO SKIPPING INSTRUCTIONS IN THE INTERRUPT LOCATIONS
;OUT OF EACH POSSIBLE INTERRUPT LOCATION
X=100
Y=42
SKIPNO: REPEAT 7,<
PSKPA Y,X
PSKPB Y,X
Y=Y+2
X=X_-1
>
SUBTTL TEST THE ABILITY TO DISMISS INTERRUPTS
;CHECK THAT "JEN" DISMISSES INTERRUPTS
X=42
Z1=100
JENDIS: REPEAT 7,<
PIDIS X,Z1
X=X+2
Z1=Z1_-1
>
JFCL
SUBTTL TICKLE THE INTERRUPT SYSTEM WITH THE CLOCK
;TEST THAT THE CLOCK WILL NOT CAUSE AN INTERRUPT WHEN ENABLED AND
;NO APR CLOCK CHANNEL IS SET..
BLURB
CKCK0: CLRBTH
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
CONSO CLK ;WAIT FOR THE CLOCK
JRST .-1 ;IF STUCK NO CLOCK FLAG
SETZ ;CLEAR 0
CONO PI,CHNON!PION!177 ;TURN ON PI SYSTEM
CONO APR,CLKENB ;ENABLE THE CLOCK
WATINT
SKIPE ;AC0=0
STOP
;TEST THAT THE CLOCK WILL NOT INTERRUPT WITHOUT CLOCK ENABLE SET
;ON ALL CHANNELS
X=1
CKCK1: REPEAT 7,<
;THE PROGRAM WILL WAIT FOR THE CLOCK TO INTERRUPT ON EACH CHANNEL
;WITHOUT CLOCK ENABLE SET. IF AC0 BECOMES NON-ZERO THE PROGRAM WILL
;HALT AND AC0 HAS THE NUMBER OF THE CHANNEL THAT THE INTERRUPT OCCURED
;ON. NO INTERRUPTS SHOULD OCCUR DURING THIS TEST.
CLRBTH
TRPPI ;FILL INTERRUPT LOCATIONS WITH TRAPS
SETZ 0, ;INSURE ZERO AC0.
CONSO APR,CLK ;WAIT FOR THE CLOCK
JRST .-1
CONO PI,PION!CHNON!177 ;ENABLE PI'S
CONO APR,CLKDIS!X ;DISABLE THE CLOCK AN SET CH X
WATINT
SKIPE ;AC0=0
STOP
X=X+1
>
SUBTTL TEST VARIOUS RESETS
;TRY TO RESET THE PI BITS VIA CONO RESET TO THE APR
RESET1: CLRBTH
CONO PI,PION!CHNON!177 ;TURN ON PI SYSTEM
CONO APR,IOCLR ;RESET THE I/O BUS
CONSO PI,PION!177 ;ALL PI BITS SHOULD STILL BE SET
STOP
;TRY TO RESET THE APR WITH A RESET TO THE PI.
RESET2: CLRBTH
CONO APR,77 ;SET CLOCK AND ERROR PIA'S
CONO PI,PICLR ;CLEAR THE PI SYSTEM
CONSO APR,77 ;AND APR BITS SHOULD STILL BE SET
STOP
X=1
RESET3: REPEAT ^D18,<
;TRY TO RESET THE PI AND APR VIA A CONO BIT TO DEVICE 774
CLRBTH
CONO PI,PION!CHNON!177
CONO APR,77 ;TURN ON PI AND APR BITS
CONO LAST,X ;SEND AND IOB BIT OUT
CONSO PI,PION!177 ;PI BITS SHOULD STILL BE SET
STOP
CONSO APR,77 ;AND APR BITS SHOULD STILL BE SET
STOP
X=X_1 ;NEXT BIT
>
SUBTTL INTERRUPT OUT OF INDIRECT LOOP
INDPI 42,1
INDPI 44,2
INDPI 46,3
INDPI 50,4
INDPI 52,5
INDPI 54,6
INDPI 56,7
SUBTTL LOCAL UUO TESTING (LUUO)
;TEST UUO'S IN RANGE 1-37
;TEST TO SEE THAT UUO TRAPS CORRECTLY AND THAT PC
;OF UUO IS CORRECT AND THAT UUO STORED IN 40 IS ALSO CORRECT
;MONITOR UUO'S ARE NOT TESTED.
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO01: XUUO 1B8,UUO02
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO02: XUUO 2B8,UUO03
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO03: XUUO 3B8,UUO04
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO04: XUUO 4B8,UUO05
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO05: XUUO 5B8,UUO06
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO06: XUUO 6B8,UUO07
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO07: XUUO 7B8,UUO10
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO10: XUUO 10B8,UUO11
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO11: XUUO 11B8,UUO12
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO12: XUUO 12B8,UUO13
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO13: XUUO 13B8,UUO14
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO14: XUUO 14B8,UUO15
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO15: XUUO 15B8,UUO16
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO16: XUUO 16B8,UUO17
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO17: XUUO 17B8,UUO20
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO20: XUUO 20B8,UUO21
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO21: XUUO 21B8,UUO22
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO22: XUUO 22B8,UUO23
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO23: XUUO 23B8,UUO24
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO24: XUUO 24B8,UUO25
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO25: XUUO 25B8,UUO26
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO26: XUUO 26B8,UUO27
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO27: XUUO 27B8,UUO30
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO30: XUUO 30B8,UUO31
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO31: XUUO 31B8,UUO32
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO32: XUUO 32B8,UUO33
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO33: XUUO 33B8,UUO34
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO34: XUUO 34B8,UUO35
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO35: XUUO 35B8,UUO36
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO36: XUUO 36B8,UUO37
;POSSIBLE CAUSES OF FAILURES IN LUUO FLOW.
;MA SPECIAL BITS NOT SETTING
;AD MAGIC # 40 @ET1
;XCTF SET AT FETCH CYCLE
;AR IR ENABLE @ET1
;AR SIGN SMEAR
;AD MAGIC NUMBER ENABLE
;AB AD EN @ET1
;INSTRUCTION FETCH @ET2
UUO37: XUUO 37B8,UUOPC
JFCL
SUBTTL TEST UUO STORING CORRECTLY
;TEST THE MA PORTION OF THE UUO TO SEE IF BITS 18-35 ARE STORED CORRECTLY
;ROUTINE ROTATES A BIT LEFT THROUGH THE MA OF THE UUO
;THEN DOES ALTERNATING PATTERN, ALL ONES AND ALL ZEROS
X=1
UUOPC:
UUOPCA:
REPEAT ^D18,<
XUUOA X
X=X_1
>
X=777777
XUUOA X
X=0
XUUOA X
X=252525
XUUOA X
X=525252
XUUOA X
X=0
JFCL
SUBTTL TEST CLEARING OF INDEX AND INDIRECT BITS ON UUO
;TEST THAT THE INDEX BITS ARE CLEARED WHEN EXECUTING A UUO
UUOIND: CLRBTH
SETZ 17, ;CLEAR INDEX FIELD
MOVE [JRST .+4] ;SET UP UUO TRAP INSTR.
MOVEM 41 ;INTO TRAP LOCATION
1B8!(17) ;EXECUTE A UUO WITH INDEXING
HALT .+1 ;UUO DID NOT TRAP
MOVE 0,40 ;GET UUO
TLNE 0,17 ;INDEX FIELD CLEAR?
STOP
;TEST THAT THE INDIRECT BIT IS CLEARED WHEN EXECUTING A UUO
UUOINX: CLRBTH
SETZB 17,0 ;CLEAR INDEX FIELD
MOVE [JRST .+4] ;SET UUO TRAP INSTR.
MOVEM 41 ;INTO TRAP LOCATION
1B8!@17 ;EXECUTE A UUO WITH INDIRECTING
HALT .+1 ;UUO DID NOT TRAP
MOVE 0,40 ;GET UUO
TLNE 0,20 ;INDIRECT BIT CLEAR?
STOP
;TEST THAT BOTH INDEX AND INDIRECT BITS CLEAR WHEN EXECUTING A UUO
UUOBTH: CLRBTH
SETZB 17,0 ;CLEAR INDEX FIELD
MOVE [JRST .+4] ;SET UP TRAP INSTR.
MOVEM 41 ;INTO TRAP LOCATION
1B8!@17(17) ;EXECUTE WITH INDIRECT AND INDEX
HALT .+1 ;UUO DID NOT TRAP
MOVE 0,40 ;GET UUO
TLNE 0,37 ;INDIRECT OR INDEX BITS STILL SET?
STOP
SUBTTL TEST UUOS OUT OF FAST MEMORY
FMUUO 0
FMUUO 1
FMUUO 2
FMUUO 4
FMUUO 5
FMUUO 10
FMUUO 12
FMUUO 17
SUBTTL SIMPLE MUUO TEST
;TEST MONITOR UUO "0" TO SEE IF IT TRAPS AT ALL
;TRAPPING TO 40 CAUSES IT TO HALT. TRAPPING TO SUPERVISOR KERNAL PUBLIC
;OR CONCEALED IS ALLOWED AND IS CONSIERED CORRECT.
TSET
JSP .+1 ;GET FLAGS
TLNE USERF ;IF USER MODE THEN EXIT
JRST USRIO0 ;SKIP IF USER MODE TO USER IO TEST
CLRBTH
XMUUO: MOVEI XMUPC ;SET UP A TRAP FOR MONITOR UUO
MOVEM KNTRP ;INTO ALL POSSIBLE TRAP LOCATIONS
MOVEM KTRP
MOVEM SNTRP
MOVEM STRP
MOVEM CNTRP
MOVEM CTRP
MOVEM PNTRP
MOVEM PTRP
SETOM MUUO ;SET THE TRAP LOCATIONS
SETOM MUUO+1 ;TO ENABLE CHECKING
MOVE [JRST MUHLT] ;SET UP A LUUO TRAP HALT
MOVEM 41
SETZM .+1 ;MAKE A MUUO IN THE NEXT LOCATION
XMUUO0: 0 ;THIS IS A MONITOR UUO
HALT .+1 ;THE UUO DIDN'T TRAP
HALT .+1 ;MUUO SKIPPED?
MUHLT: HALT .+1 ;UUO TRAPPED TO 40(DECODE AS LUUO?)
HALT .+1 ;SPARE HALT
XMUPC: SKIPE MUUO ;MON UUO "0" DIDN'T STORE A ZERO
STOP
HRRZ MUUO+1 ;GET THE STORED PC
CAIE XMUUO0+1 ;DID WE STORE THE CORRECT PC?
STOP
JFCL
TGET
SUBTTL TEST THE USER IOT BIT
;CHECK CLEARING AND SETTING OF THE USER IOT BIT
USRIO0: CLRBTH
SKIPN MONFLG ;IN SPECIAL USER MODE?
JRST ENDIT ;YES LOOP TEST
JRSTF @.+1 ;CLEAR BITS
0,,.+1 ;PC AND FLAGS
JSP .+1 ;CHECK WHY USER I/O FLAG IS SET
TLNE EXIOT ;SHOULD BE CLEAR VIA JRSTF
STOP
SKIPN MONFLG ;IN USER MODE?
JRST ENDIT ;YES CANNOT SET USER IO FLAG
;IN USER MODE
USRIO1: CLRBTH
SETZ 0 ;CLEAR 0
MOVE 1,[1B6!.+2] ;FLAGS AND PC
JRSTF (1) ;USER I/O FLAG DID
JSP .+1 ;NOT SET
TLNN EXIOT ;CHECK WHY BIT IS NOT SET
STOP
ENDIT: SETZM TNUMB ;CLEAR TEST NUMBER FLAG
JRST BEGEND ;GO TO BEG/END SEQUENCE
$PGMIN: HALT BEGEND
SUBTTL DBKAH SUBROUTINES
;HERE ARE SOME USEFUL SUBROUTINES FOR THE DIAGNOSTIC
;THIS ROUTINE CLEARS ALL THE TRAP LOCATIONS(42-56)
TRPCLR: 0 ;FOR PC RETURN
MOVEM 15,XAC15# ;SAVE AC15
MOVEI 15,42
SETZM @15 ;CLEAR LOCATION
ADDI 15,1 ;BUMP POINTER
CAIG 15,56 ;DONE LAST?
JRST .-3 ;LOOP
MOVE 15,XAC15 ;RESTORE AC15
JRST @TRPCLR
;THIS ROUTINE PUTS A JSP TO A HALT INTO EACH TRAP LOCATION (42-57)
HALTPI: 0 ;FOR RETURN PC
MOVEM 0,XAC0# ;SAVE AC0
MOVEM 1,XAC1# ;SAVE AC1
MOVE [JSP 1,HLTCK] ;PUT JSP INTO EACH TRAP LOCATION
MOVEI 1,42 ;IN CASE INCORRECT INTERRUPT
MOVEM @1 ;STORE
ADDI 2
ADDI 1,2
CAIGE 1,60 ;DONE?
JRST .-4
MOVE 0,XAC0 ;RESTORE AC0
MOVE 1,XAC1 ;AND AC1
JRST @HALTPI ;RETURN
;THIS ROUTINE PUTS A JSP INTO EACH INTERRUPT LOCATION WHICH WILL
;IGNORE INTERRUPTS..
TRAPPI: 0 ;FOR JSR
MOVEM 0,XAC0# ;SAVE AC0
MOVEM 1,XAC1# ;SAVE AC1
MOVE [JSP 1,TRPFIL] ;SET UP TRAP INSTRUCTION
MOVEI 1,42
MOVEM @1
ADDI 1,2
ADDI 0,2 ;STORAGE POINTER
CAIGE 1,60 ;DONE?
JRST .-4 ;NO LOOP
MOVE 0,XAC0 ;RESTORE AC0
MOVE 1,XAC1 ;AND AC1
JRST @TRAPPI ;RETURN
;THIS ROUTINE PLACES THE VALUE OF THE CHANNEL WHICH INTERRUPTED INTO
;AC0. IT DOES NOTHING ELSE (IT EFFECTIVLY IGNORES THE INTERRUPT).
TRPFIL: MOVEI 1 ;POINTER
JRST TPEND
MOVEI 2
JRST TPEND
MOVEI 3
JRST TPEND
MOVEI 4
JRST TPEND
MOVEI 5
JRST TPEND
MOVEI 6
JRST TPEND
MOVEI 7
JRST TPEND
HALT TPEND ;"JRST @" OR "JRSTF @" FAILS
TPEND: SKIPE MONFLG ;IN USER MODE?
JRST @1 ;RETURN
JRSTF @1 ;RESTORE FLAGS
HALT . ;JRST @ OR JRSTF FAILS ?
;THIS ROUTINE PLACES THE VALUE OF THE CHANNEL WHICH INTERRUPTED
;INTO AC0. AFTER WHICH IT WILL HALT. THIS ROUTINE IS CALLED WHENEVER AN
;INTERRUPT OCCURS ON AN INCORRECT CHANNEL.
HLTCK: MOVEI 1
HALT @1
MOVEI 2
HALT @1
MOVEI 3
HALT @1
MOVEI 4
HALT @1
MOVEI 5
HALT @1
MOVEI 6
HALT @1
MOVEI 7
HALT @7
SETO 0
HALT . ;SHOULD NEVER GET HERE
SUBTTL DBKAH TRAPS
;HERE LIE THE VARIOUS TRAPS TRAPS HERE REPRESENT ERRORS
;NOT CHECKED IN THE DIAGNOSTIC. THE LISTING SHOWS THE CAUSE OF THE
;TRAP.
UUO: HALT . ;ERROR-UUO (LOC 0 HAS PC OF UUO)
MACHTP: HALT @425 ;KERNAL NO TRAP
HALT @425 ;KERNAL TRAP
HALT @425 ;SUPERVISOR NO TRAP
HALT @425 ;SUPERVISOR TRAP
HALT @425 ;CONCEAL NO TRAP
HALT @425 ;CONCEAL TRAP
HALT @425 ;PUBLIC NO TRAP
HALT @425 ;PUBLIC TRAP
TABLE: HALT . ;PAGE FAILURE TRAP
JFCL ;IGNORE ARITHMETIC TRAPS
HALT .
HALT .
-1 ;IF UUO THEN NOT =O-1
-1
0
0
MACHTP
MACHTP+1
MACHTP+2
MACHTP+3
MACHTP+4
MACHTP+5
MACHTP+6
MACHTP+7
TRPSET: 0 ;FOR JSR
MOVEM 0,XAC0# ;SAVE AC0
MOVEM 1,XAC1# ;SAVE AC1
MOVEM 16,XAC16# ;SAVE AC16
MOVEI 0,TABLE ;TRAP TABLE POINTER
MOVEI 1,420 ;STORAGE ADRESS
MOVE 16,@0 ;PUT TRAP WORD INTO
MOVEM 16,(1) ;TRAP LOCATION
ADDI 0,1 ;BUMP
ADDI 1,1 ;POINTERS
CAIE 1,440 ;DONE LAST
JRST .-5 ;NO KEEP LOOPING
MOVE 0,XAC0 ;RESTORE AC0
MOVE 1,XAC1 ;AND AC1
MOVE 16,XAC16 ;AND AC16
JRST @TRPSET ;RETURN TO CALLER
SUBTTL BASIC CONSOLE TTY TEST
;THIS IS A BASIC TTY TEST TO SEE IF THE CONSOLE TTY LOGIC IS
;UP TO TYPING OUT VARIOUS ERROR MESSAGES IN THE DIAGNOSTICS TO
;FOLLOW. THE ROUTINE TYPES THE ALPHABET 10 TIMES ETC. AND THEN ENTERS ECHO
;MODE. YOU MAY THEN TYPE CHARACTERS ON THE TTY AND THEY WILL ECHO
;TYPING A ^Z(CONTROL AND Z KEYS DEPRESSED AT THE SAME TIME) WILL CAUSE
;ALL YOUR INPUT TO BE TYPED OUT TO YOU UNTILL ANOTHER CHARACTER IS
;TYPED ON THE CONSOLE. WHEN THAT HAPPENS YOU WILL ENTER ECHO MODE
;AGAIN
TTYBUF=END+1 ;TTY TEST DATA BUFFER
TTYBEG: MOVEI 10,^D10 ;TIMES TO DO THIS TEST
CONO 200000 ;RESET APR ETC.
MOVE 16,[IOWD TTYEND+1-TTYDAT,TTYDAT] ;SET UP BLKO POINTER
BLKO TTY,16 ;DO IT
JRST TTYECH ;ALL DONE - DO ECHO
CONSO TTY,10 ;TTY DONE
JRST .-1 ;NO
JRST .-4 ;FINISH!
TTYECH: SOJG 10,TTYBEG+1 ;LOOP 10 TIMES
JRST .+3 ;ECHO TEST!
TTY01: SETZ 4, ;CLEAR CHARACTER COUNTER
CONSO TTY,40 ;INPUT DONE?
JRST .-1 ;LOOP
CONO TTY,1B26 ;RESET INPUT DONE!
DATAO TTY,TTYDAT ;CARRIAGE RETURN
CONSO TTY,10 ;DONE?
JRST .-1
DATAO TTY,TTYDAT+1 ;LINE FEED
CONSO TTY,10
JRST .-1
MOVEI 1,TTYBUF ;TTY I/O POINTER
TTY02: CONSO TTY,100 ;TTY BUSY
JRST .-1 ;WAIT FOR INPUT
CONSO TTY,40 ;TTY DONE INPUT
JRST .-1
DATAI TTY,(1) ;INPUT CHAR
DATAO TTY,(1) ;ECHO
CONSO TTY,10
JRST .-1
MOVE 5,(1) ;GET CHAR.
CAIN 5,232 ;CNTRL Z??
JRST TTY03
ADDI 4,1 ;BUMP CHAR. COUNTER
CAILE 4,^D802 ;DONE 10 LINES?
JRST TTY03
ADDI 1,1 ;BUMP POINTER
JRST TTY02 ;LOOP UNTILL ^Z
TTY03: DATAI TTY,1 ;CLEAR FLAGS
MOVEI 1,TTYBUF ;OUTPUT POINTER
TTY04: MOVE 0,(1) ;GET CHARACTER
CAIN 232 ;REACHED END OF BUFFER?
JRST TTY03 ;LOOP FOREVER
DATAO TTY, ;OUTPUT CHARACTER
CONSO TTY,10 ;DONE?
JRST .-1 ;NO LOOP
CONSZ TTY,100 ;DID HE STRIKE A KEY
JRST TTY01 ;YES GET NEW DATA
ADDI 1,1 ;BUMP OUTPUT POINTER
JRST TTY04 ;LOOP TILL DONE
TTYDAT: 215 ;CARRIAGE RETURN
12 ;LINE FEED
"A"
"B"
"C"
"D"
"E"
"F"
"G"
"H"
"I"
"J"
"K"
"L"
"M"
"N"
"O"
"P"
"Q"
"R"
"S"
"T"
"U"
"V"
"W"
"X"
"Y"
"Z"
" " ;SPACE
"1"
"2"
"3"
"4"
"5"
"6"
"7"
"8"
"9"
"0"
":"
"-"
";"
"/"
"."
","
"!"
"#"
"$"
"%"
"&"
"'"
"("
")"
"*"
"="
"@"
"["
"\"
"<"
">"
"?"
"]"
"^"
TTYEND: 0 ;END TEST PATTERN
TTYCHR: 0
SUBTTL DBKAH STORAGE
$ERHL1: HALT BEGIN
PGMNAM: ASCIZ/
DBKAH PI,UUO AND IOT TEST
/